Linus,
Attached patch breaks the "PPro/Celeron/Pentium-II" compile option into
separate "PPro" and "Pentium-II/Celeron" options.
This allows us to explicitly support the Pentium II and Celeron,
specifically adding the `-march' option for the chip and enabling the
unaligned copy optimizations. PPro support remains unchanged.
This patch is by Luuk van der Duim with some changes by me (primarily to
also support the pre-Coppermine Celeron chips, since those use Pentium
II cores). This patch has been in 2.5-mm for awhile and Andrew ack'ed
this submission.
Patch is against current BK. Please, apply.
Robert Love
arch/i386/Kconfig | 34 ++++++++++++++++++++++------------
arch/i386/Makefile | 1 +
2 files changed, 23 insertions(+), 12 deletions(-)
diff -urN linux-2.5.56/arch/i386/Kconfig linux/arch/i386/Kconfig
--- linux-2.5.56/arch/i386/Kconfig 2003-01-10 15:11:26.000000000 -0500
+++ linux/arch/i386/Kconfig 2003-01-12 13:55:01.000000000 -0500
@@ -117,9 +117,9 @@
(time stamp counter) register.
- "Pentium-Classic" for the Intel Pentium.
- "Pentium-MMX" for the Intel Pentium MMX.
- - "Pentium-Pro" for the Intel Pentium Pro/Celeron/Pentium II.
- - "Pentium-III" for the Intel Pentium III
- and Celerons based on the Coppermine core.
+ - "Pentium-Pro" for the Intel Pentium Pro.
+ - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
+ - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
- "Pentium-4" for the Intel Pentium 4.
- "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
- "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
@@ -159,18 +159,28 @@
extended instructions.
config M686
- bool "Pentium-Pro/Celeron/Pentium-II"
+ bool "Pentium-Pro"
help
- Select this for a Pro/Celeron/Pentium II. This enables the use of
+ Select this for Intel Pentium Pro chips. This enables the use of
Pentium Pro extended instructions, and disables the init-time guard
against the f00f bug found in earlier Pentiums.
+config MPENTIUMII
+ bool "Pentium-II/Celeron(pre-Coppermine)"
+ help
+ Select this for Intel chips based on the Pentium-II and
+ pre-Coppermine Celeron core. This option enables an unaligned
+ copy optimization, compiles the kernel with optimization flags
+ tailored for the chip, and applies any applicable Pentium Pro
+ optimizations.
+
config MPENTIUMIII
bool "Pentium-III/Celeron(Coppermine)"
help
Select this for Intel chips based on the Pentium-III and
- Celeron-Coppermine core. Enables use of some extended prefetch
- instructions, in addition to the Pentium II extensions.
+ Celeron-Coppermine core. This option enables use of some
+ extended prefetch instructions in addition to the Pentium II
+ extensions.
config MPENTIUM4
bool "Pentium-4"
@@ -258,7 +268,7 @@
config X86_L1_CACHE_SHIFT
int
- default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MCYRIXIII || MK6 || MPENTIUMIII || M686 || M586MMX || M586TSC || M586
+ default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586
default "4" if MELAN || M486 || M386
default "6" if MK7 || MK8
default "7" if MPENTIUM4
@@ -310,22 +320,22 @@
config X86_TSC
bool
- depends on MWINCHIP3D || MWINCHIP2 || MCRUSOE || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || M686 || M586MMX || M586TSC || MK8
+ depends on MWINCHIP3D || MWINCHIP2 || MCRUSOE || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8
default y
config X86_GOOD_APIC
bool
- depends on MK7 || MPENTIUM4 || MPENTIUMIII || M686 || M586MMX || MK8
+ depends on MK7 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8
default y
config X86_INTEL_USERCOPY
bool
- depends on MPENTIUM4 || MPENTIUMIII || M586MMX
+ depends on MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M586MMX
default y
config X86_USE_PPRO_CHECKSUM
bool
- depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || M686 || MK8
+ depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M686 || MK8
default y
config X86_USE_3DNOW
diff -urN linux-2.5.56/arch/i386/Makefile linux/arch/i386/Makefile
--- linux-2.5.56/arch/i386/Makefile 2003-01-10 15:11:44.000000000 -0500
+++ linux/arch/i386/Makefile 2003-01-12 13:53:46.000000000 -0500
@@ -34,6 +34,7 @@
cflags-$(CONFIG_M586TSC) += -march=i586
cflags-$(CONFIG_M586MMX) += $(call check_gcc,-march=pentium-mmx,-march=i586)
cflags-$(CONFIG_M686) += -march=i686
+cflags-$(CONFIG_MPENTIUMII) += $(call check_gcc,-march=pentium2,-march=i686)
cflags-$(CONFIG_MPENTIUMIII) += $(call check_gcc,-march=pentium3,-march=i686)
cflags-$(CONFIG_MPENTIUM4) += $(call check_gcc,-march=pentium4,-march=i686)
cflags-$(CONFIG_MK6) += $(call check_gcc,-march=k6,-march=i586)
On Sun, 2003-01-12 at 19:03, Robert Love wrote:
> This patch is by Luuk van der Duim with some changes by me (primarily to
> also support the pre-Coppermine Celeron chips, since those use Pentium
> II cores). This patch has been in 2.5-mm for awhile and Andrew ack'ed
> this submission.
Looks good. Might also be good to clarify in the help whether the PII/PIII
option also skips using lock decb for the spinlocks and the other fence
workarounds for the PPro fence errata.
Alan
On 12 Jan 2003, Alan Cox wrote:
>
> Looks good. Might also be good to clarify in the help whether the PII/PIII
> option also skips using lock decb for the spinlocks and the other fence
> workarounds for the PPro fence errata.
The thing I reacted to was that the P4 entry should include the P4-based
celerons. I have no idea what those are called, though.
Anyway, applied.
Linus
On Sun, 2003-01-12 at 14:26, Linus Torvalds wrote:
> The thing I reacted to was that the P4 entry should include the
> P4-based celerons. I have no idea what those are called, though.
>
> Anyway, applied.
I was thinking the same thing, but the lame name of the chips held me
back - the new Celerons are also called "Celerons".
Regardless, I updated the comments and I call the new Celerons "P4-based
Celerons" which should be descriptive enough.
Patch is against current BK.
Robert Love
arch/i386/Kconfig | 12 +++++++-----
1 files changed, 7 insertions(+), 5 deletions(-)
diff -urN linux-2.5.56/arch/i386/Kconfig linux/arch/i386/Kconfig
--- linux-2.5.56/arch/i386/Kconfig 2003-01-12 15:05:16.000000000 -0500
+++ linux/arch/i386/Kconfig 2003-01-12 15:10:45.000000000 -0500
@@ -120,7 +120,7 @@
- "Pentium-Pro" for the Intel Pentium Pro.
- "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
- "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
- - "Pentium-4" for the Intel Pentium 4.
+ - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
- "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
- "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
- "Crusoe" for the Transmeta Crusoe series.
@@ -183,11 +183,13 @@
extensions.
config MPENTIUM4
- bool "Pentium-4"
+ bool "Pentium-4/Celeron(P4-based)"
help
- Select this for Intel Pentium 4 chips. Presently these are
- treated almost like Pentium IIIs, but with a different cache
- shift.
+ Select this for Intel Pentium 4 chips. This includes both
+ the Pentium 4 proper and P4-based Celeron chips. This option
+ enables compile flags optimized for the core, uses the
+ correct cache shift, and applies any applicable Pentium III
+ optimizations.
config MK6
bool "K6/K6-II/K6-III"
On Sun, 2003-01-12 at 21:13, Robert Love wrote:
> On Sun, 2003-01-12 at 14:26, Linus Torvalds wrote:
>
> > The thing I reacted to was that the P4 entry should include the
> > P4-based celerons. I have no idea what those are called, though.
> >
> > Anyway, applied.
>
> I was thinking the same thing, but the lame name of the chips held me
> back - the new Celerons are also called "Celerons".
>
> Regardless, I updated the comments and I call the new Celerons "P4-based
> Celerons" which should be descriptive enough.
>
> Patch is against current BK.
>
> Robert Love
>
> arch/i386/Kconfig | 12 +++++++-----
> 1 files changed, 7 insertions(+), 5 deletions(-)
>
>
> diff -urN linux-2.5.56/arch/i386/Kconfig linux/arch/i386/Kconfig
> --- linux-2.5.56/arch/i386/Kconfig 2003-01-12 15:05:16.000000000 -0500
> +++ linux/arch/i386/Kconfig 2003-01-12 15:10:45.000000000 -0500
> @@ -120,7 +120,7 @@
> - "Pentium-Pro" for the Intel Pentium Pro.
> - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
> - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
> - - "Pentium-4" for the Intel Pentium 4.
> + - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
Aren't those called Willamette based Celerons?
--
Luuk van der Duim
Robert Love wrote:
> I was thinking the same thing, but the lame name of the chips held me
> back - the new Celerons are also called "Celerons".
>
> Regardless, I updated the comments and I call the new Celerons "P4-based
> Celerons" which should be descriptive enough.
Would a reference to clock frequency be useful? It seems the old Celeron went up
to 1200 MHz, and the P4 Celeron started at 1700 MHz.
Thomas
On Sun, 2003-01-12 at 16:20, Luuk van der Duim wrote:
> Aren't those called Willamette based Celerons?
The current ones are, but future ones will surely be based on future
cores (i.e. I suspect we will see Northwood-based Celerons, soon) and
this option will be applicable to those, too.
More importantly, the consumer name is just "Celeron" i.e. the box does
not mention the core or anything. The best I think we can offer is
"P4-based Celeron" which is a nice blanket name.
Robert Love
On Sun, 2003-01-12 at 15:27, Thomas Tonino wrote:
> Would a reference to clock frequency be useful? It seems the old
> Celeron went up to 1200 MHz, and the P4 Celeron started at 1700
> MHz.
I think the current text is descriptive enough without venturing into
over-engineering an otherwise simple feature.
Robert Love
On 12 Jan 2003, Robert Love wrote:
> On Sun, 2003-01-12 at 16:20, Luuk van der Duim wrote:
>
> > Aren't those called Willamette based Celerons?
>
> The current ones are, but future ones will surely be based on future
> cores (i.e. I suspect we will see Northwood-based Celerons, soon) and
> this option will be applicable to those, too.
>
> More importantly, the consumer name is just "Celeron" i.e. the box does
> not mention the core or anything. The best I think we can offer is
> "P4-based Celeron" which is a nice blanket name.
I believe these have HT (although only one sibling) if someone is really
looking for a descriptive name. I have no problem with the proposed name,
just a thought if something else is desired.
--
bill davidsen <[email protected]>
CTO, TMR Associates, Inc
Doing interesting things with little computers since 1979.
> > > Aren't those called Willamette based Celerons?
> >
> > The current ones are, but future ones will surely be based on future
> > cores (i.e. I suspect we will see Northwood-based Celerons, soon) and
> > this option will be applicable to those, too.
Indeed, the 2ghz and above celeron's are northwood based(.13 micron)
At least according to the last PC Magazine I got :)
Mike