I can find a patch for the i7500 chipset IRQ problem.
Is it still unsolved ? ... I have a full custom PCI device that does not
receive an IRQ...
Any suggestion ??
tnx in advance
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
I experienced the same problem with Supermicro and Intel E7500 board. Look
on
http://sourceforge.net/projects/lse
for the apic routing patch. This patch, when applied, will solve the issue
-----Original Message-----
From: Emiliano Gabrielli [mailto:[email protected]]
Sent: Friday, November 22, 2002 8:05 AM
To: [email protected]
Subject: i7500 and IRQ assignment
I can find a patch for the i7500 chipset IRQ problem.
Is it still unsolved ? ... I have a full custom PCI device that does not
receive an IRQ...
Any suggestion ??
tnx in advance
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
On 19:25, venerd? 22 novembre 2002, Manish Lachwani wrote:
> I experienced the same problem with Supermicro and Intel E7500 board. Look
> on
>
> http://sourceforge.net/projects/lse
>
> for the apic routing patch. This patch, when applied, will solve the issue
uhmm I have tried to apply it against the 2.4.18-18.7.1xsmp by RH, but of sure
it gave conflicts... I wan not able to resolve them by hand, in paticular I
can't find the funcion/macro "processor()"...
Has this patch been applied agaist a more recent kernel yet ?!? 2.4.18 is quit
out of date, expecially for the APIC-related problems...
My final goal is only to have an IRQ assigne to my custom PCI device by the
SuperMicro P4DP6 MB (e7500), with HT enabled
tnx in advance
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
On Mon, 25 Nov 2002, Emiliano Gabrielli wrote:
> On 19:25, venerd? 22 novembre 2002, Manish Lachwani wrote:
> > I experienced the same problem with Supermicro and Intel E7500 board. Look
> > on
> >
> > http://sourceforge.net/projects/lse
> >
> > for the apic routing patch. This patch, when applied, will solve the issue
>
> uhmm I have tried to apply it against the 2.4.18-18.7.1xsmp by RH, but of sure
> it gave conflicts... I wan not able to resolve them by hand, in paticular I
> can't find the funcion/macro "processor()"...
>
> Has this patch been applied agaist a more recent kernel yet ?!? 2.4.18 is quit
> out of date, expecially for the APIC-related problems...
>
> My final goal is only to have an IRQ assigne to my custom PCI device by the
> SuperMicro P4DP6 MB (e7500), with HT enabled
>
2.4.20-rc2 or -rc3 work fine on my E7500 boards. I've appiled the
irqbalance patch from Ingo Molnar though. It gives me better interrupt
latency compared to the APIC routing patch (with GbE it is ~10us faster on
ping-pong/2 tests).
Regards,
--
Steffen Persvold | Scali AS
mailto:[email protected] | http://www.scali.com
Tel: (+47) 2262 8950 | Olaf Helsets vei 6
Fax: (+47) 2262 8951 | N0621 Oslo, NORWAY
On 15:16, luned? 25 novembre 2002, Emiliano Gabrielli wrote:
> On 19:25, venerd? 22 novembre 2002, Manish Lachwani wrote:
> > I experienced the same problem with Supermicro and Intel E7500 board.
> > Look on
> >
> > http://sourceforge.net/projects/lse
> >
> > for the apic routing patch. This patch, when applied, will solve the
> > issue
>
> uhmm I have tried to apply it against the 2.4.18-18.7.1xsmp by RH, but of
> sure it gave conflicts... I wan not able to resolve them by hand, in
> paticular I can't find the funcion/macro "processor()"...
>
> Has this patch been applied agaist a more recent kernel yet ?!? 2.4.18 is
> quit out of date, expecially for the APIC-related problems...
>
> My final goal is only to have an IRQ assigne to my custom PCI device by the
> SuperMicro P4DP6 MB (e7500), with HT enabled
>
> tnx in advance
ok, i'm in desperire.
I have just patched a 2.4.19-vanilla with the patch mentioned above and the
"irqsharing.patch" by Ingo Molnar ... my machine does NOT work yet !!
Here follows a dmesg:
ting enabled on CPU#0.
CPU: After generic, caps: 3febfbff 00000000 00000000 00000000
CPU: Common caps: 3febfbff 00000000 00000000 00000000
CPU0: Intel(R) XEON(TM) CPU 2.00GHz stepping 04
per-CPU timeslice cutoff: 1462.69 usecs.
task migration cache decay timeout: 1 msecs.
enabled ExtINT on CPU#0
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Booting processor 1/1 eip 2000
Initializing CPU#1
masked ExtINT on CPU#1
ESR value before enabling vector: 00000000
ESR value after enabling vector: 00000000
Calibrating delay loop... 3986.55 BogoMIPS
CPU: Before vendor init, caps: 3febfbff 00000000 00000000, vendor = 0
CPU: L1 I cache: 0K, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
CPU: After vendor init, caps: 3febfbff 00000000 00000000 00000000
Intel machine check reporting enabled on CPU#1.
CPU: After generic, caps: 3febfbff 00000000 00000000 00000000
CPU: Common caps: 3febfbff 00000000 00000000 00000000
CPU1: Intel(R) XEON(TM) CPU 2.00GHz stepping 04
Total of 2 processors activated (7948.80 BogoMIPS).
cpu_sibling_map[0] = 1
cpu_sibling_map[1] = 0
ENABLING IO-APIC IRQs
Setting 2 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 2 ... ok.
Setting 3 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 3 ... ok.
Setting 4 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 4 ... ok.
Setting 5 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 5 ... ok.
Setting 6 in the phys_id_present_map
...changing IO-APIC physical APIC ID to 6 ... ok.
init IO_APIC IRQs
IO-APIC (apicid-pin) 2-0, 2-10, 2-11, 2-20, 2-21, 2-22, 2-23, 3-0, 3-1, 3-2,
3-3, 3-4, 3-5, 3-6, 3-7, 3-8, 3-9, 3-10, 3-11, 3-12, 3-13, 3-14, 3-15, 3-16,
3-17, 3-18, 3-19, 3-20, 3-21, 3-22, 3-23, 4-0, 4-1, 4-2, 4-3, 4-4, 4-5, 4-6,
4-7, 4-8, 4-9, 4-10, 4-11, 4-12, 4-13, 4-14, 4-15, 4-16, 4-17, 4-18, 4-19,
4-20, 4-21, 4-22, 4-23, 5-0, 5-1, 5-2, 5-3, 5-4, 5-5, 5-6, 5-7, 5-8, 5-9,
5-10, 5-11, 5-12, 5-13, 5-14, 5-15, 5-16, 5-17, 5-18, 5-19, 5-20, 5-21, 5-22,
5-23, 6-0, 6-1, 6-2, 6-3, 6-4, 6-5, 6-6, 6-7, 6-8, 6-9, 6-10, 6-11, 6-12,
6-13, 6-14, 6-15, 6-16, 6-17, 6-18, 6-19, 6-20, 6-21, 6-22, 6-23 not
connected.
..TIMER: vector=0x31 pin1=2 pin2=0
number of MP IRQ sources: 20.
number of IO-APIC #2 registers: 24.
number of IO-APIC #3 registers: 24.
number of IO-APIC #4 registers: 24.
number of IO-APIC #5 registers: 24.
number of IO-APIC #6 registers: 24.
testing the IO APIC.......................
IO APIC #2......
.... register #00: 02008000
....... : physical APIC id: 02
WARNING: unexpected IO-APIC, please mail
to [email protected]
.... register #01: 00178020
....... : max redirection entries: 0017
....... : PRQ implemented: 1
....... : IO APIC version: 0020
.... register #02: 00000000
....... : arbitration: 00
.... IRQ redirection table:
NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
00 000 00 1 0 0 0 0 0 0 00
01 003 03 0 0 0 0 0 1 1 39
02 002 02 0 0 0 0 0 1 1 31
03 003 03 0 0 0 0 0 1 1 41
04 003 03 0 0 0 0 0 1 1 49
05 003 03 0 0 0 0 0 1 1 51
06 003 03 0 0 0 0 0 1 1 59
07 003 03 0 0 0 0 0 1 1 61
08 003 03 0 0 0 0 0 1 1 69
09 003 03 0 0 0 0 0 1 1 71
0a 000 00 1 0 0 0 0 0 0 00
0b 000 00 1 0 0 0 0 0 0 00
0c 003 03 0 0 0 0 0 1 1 79
0d 003 03 0 0 0 0 0 1 1 81
0e 003 03 0 0 0 0 0 1 1 89
0f 003 03 0 0 0 0 0 1 1 91
10 003 03 1 1 0 1 0 1 1 99
11 003 03 1 1 0 1 0 1 1 A1
12 003 03 1 1 0 1 0 1 1 A9
13 003 03 1 1 0 1 0 1 1 B1
14 000 00 1 0 0 0 0 0 0 00
15 000 00 1 0 0 0 0 0 0 00
16 000 00 1 0 0 0 0 0 0 00
17 000 00 1 0 0 0 0 0 0 00
IO APIC #3......
.... register #00: 03000000
....... : physical APIC id: 03
.... register #01: 00178020
....... : max redirection entries: 0017
....... : PRQ implemented: 1
....... : IO APIC version: 0020
.... register #02: 03000000
....... : arbitration: 03
.... IRQ redirection table:
NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
00 000 00 1 0 0 0 0 0 0 00
01 000 00 1 0 0 0 0 0 0 00
02 000 00 1 0 0 0 0 0 0 00
03 000 00 1 0 0 0 0 0 0 00
04 000 00 1 0 0 0 0 0 0 00
05 000 00 1 0 0 0 0 0 0 00
06 000 00 1 0 0 0 0 0 0 00
07 000 00 1 0 0 0 0 0 0 00
08 000 00 1 0 0 0 0 0 0 00
09 000 00 1 0 0 0 0 0 0 00
0a 000 00 1 0 0 0 0 0 0 00
0b 000 00 1 0 0 0 0 0 0 00
0c 000 00 1 0 0 0 0 0 0 00
0d 000 00 1 0 0 0 0 0 0 00
[cut] ...
Best regards,
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
On Mon, 25 Nov 2002, Emiliano Gabrielli wrote:
> number of MP IRQ sources: 20.
> number of IO-APIC #2 registers: 24.
> number of IO-APIC #3 registers: 24.
> number of IO-APIC #4 registers: 24.
> number of IO-APIC #5 registers: 24.
> number of IO-APIC #6 registers: 24.
> testing the IO APIC.......................
Out of curiosity, does this box really have 5 IOAPICs?
Zwane
--
function.linuxpower.ca
On Mon, 25 Nov 2002, Steffen Persvold wrote:
> 2.4.20-rc2 or -rc3 work fine on my E7500 boards. I've appiled the
> irqbalance patch from Ingo Molnar though. It gives me better interrupt
> latency compared to the APIC routing patch (with GbE it is ~10us faster on
> ping-pong/2 tests).
How does IRQ affinity fair with respect to your interrupt latencies?
Zwane
--
function.linuxpower.ca
On 16:41, luned? 25 novembre 2002, Zwane Mwaikambo wrote:
> On Mon, 25 Nov 2002, Emiliano Gabrielli wrote:
> > number of MP IRQ sources: 20.
> > number of IO-APIC #2 registers: 24.
> > number of IO-APIC #3 registers: 24.
> > number of IO-APIC #4 registers: 24.
> > number of IO-APIC #5 registers: 24.
> > number of IO-APIC #6 registers: 24.
> > testing the IO APIC.......................
>
> Out of curiosity, does this box really have 5 IOAPICs?
>
> Zwane
no of course, but something seems to be buggy...
.. nothing changed ;((
I have patched last 2.4.20-rc3 with Ingo patch (irqsharing.patch) or/and
apic_route-2.4.18.patch ... patch applies with no problems but no change...
I have downloaded the prepatched kernel from http://www.aslab.com (linux-2.4.19-1)
(they affirm their servers use 7500) and even in this case no change
appened...
I have HT enabled in the BIOS; SMP and IO-APIC are compiled in the kernel...
but I still receive some buggy messages in dmesg (see attachement), btw my
full custom device has IRQ routed to 0 (see my lspci)
If anybody as some IDEA ... I will happy ;P
best regards,
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
On 19:34, luned? 25 novembre 2002, Emiliano Gabrielli wrote:
> I have downloaded the prepatched kernel from http://www.aslab.com (linux-2.4.19-1)
> (they affirm their servers use 7500) and even in this case no change
> appened...
>
> I have HT enabled in the BIOS; SMP and IO-APIC are compiled in the
> kernel...
>
> but I still receive some buggy messages in dmesg (see attachement), btw my
> full custom device has IRQ routed to 0 (see my lspci)
>
> If anybody as some IDEA ... I will happy ;P
>
> best regards,
sorry, I have forgotten to attach files ...
my apologises
--
Emiliano Gabrielli
dip. di Fisica
2? Universit? di Roma "Tor Vergata"
On Mon, 25 Nov 2002, Emiliano Gabrielli wrote:
> On 16:41, luned? 25 novembre 2002, Zwane Mwaikambo wrote:
> > On Mon, 25 Nov 2002, Emiliano Gabrielli wrote:
> > > number of MP IRQ sources: 20.
> > > number of IO-APIC #2 registers: 24.
> > > number of IO-APIC #3 registers: 24.
> > > number of IO-APIC #4 registers: 24.
> > > number of IO-APIC #5 registers: 24.
> > > number of IO-APIC #6 registers: 24.
> > > testing the IO APIC.......................
> >
> > Out of curiosity, does this box really have 5 IOAPICs?
> >
> > Zwane
>
> no of course, but something seems to be buggy...
>
> .. nothing changed ;((
Can't be certain without more debug output from MP boot process,
perhaps MP table parsing? Do you have ACPI enabled?
Please humour me here (you only have 20 IRQ sources and everything looks
properly wired on IOAPIC#2 ;)
Index: linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h
===================================================================
RCS file: /build/cvsroot/linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 apicdef.h
--- linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h 18 Nov 2002 01:38:42 -0000 1.1.1.1
+++ linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h 25 Nov 2002 19:30:45 -0000
@@ -115,7 +115,7 @@
#ifdef CONFIG_MULTIQUAD
#define MAX_IO_APICS 32
#else
-#define MAX_IO_APICS 8
+#define MAX_IO_APICS 1
#endif
#define APIC_BROADCAST_ID_XAPIC 0xFF
--
function.linuxpower.ca
On Mon, 25 Nov 2002, Zwane Mwaikambo wrote:
> Please humour me here (you only have 20 IRQ sources and everything looks
> properly wired on IOAPIC#2 ;)
Forgot something (cheers Bill)
Index: linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h
===================================================================
RCS file: /build/cvsroot/linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 apicdef.h
--- linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h 18 Nov 2002 01:38:42 -0000 1.1.1.1
+++ linux-2.4.20-rc1-ac4/include/asm-i386/apicdef.h 25 Nov 2002 19:30:45 -0000
@@ -115,7 +115,7 @@
#ifdef CONFIG_MULTIQUAD
#define MAX_IO_APICS 32
#else
-#define MAX_IO_APICS 8
+#define MAX_IO_APICS 1
#endif
#define APIC_BROADCAST_ID_XAPIC 0xFF
Index: linux-2.4.20-rc1-ac4/arch/i386/kernel/mpparse.c
===================================================================
RCS file: /build/cvsroot/linux-2.4.20-rc1-ac4/arch/i386/kernel/mpparse.c,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 mpparse.c
--- linux-2.4.20-rc1-ac4/arch/i386/kernel/mpparse.c 18 Nov 2002 01:39:49 -0000 1.1.1.1
+++ linux-2.4.20-rc1-ac4/arch/i386/kernel/mpparse.c 25 Nov 2002 19:46:59 -0000
@@ -299,7 +299,7 @@
if (nr_ioapics >= MAX_IO_APICS) {
printk("Max # of I/O APICs (%d) exceeded (found %d).\n",
MAX_IO_APICS, nr_ioapics);
- panic("Recompile kernel with bigger MAX_IO_APICS!.\n");
+ return;
}
if (!m->mpc_apicaddr) {
printk(KERN_ERR "WARNING: bogus zero I/O APIC address"
--
function.linuxpower.ca