I have a CAN PCI card installed on my Ubuntu box.
I understand that PCI interrupts should be level rather than edge
triggered.
The output of cat /proc/interrupts is :-
CPU0
0: 1614601 IO-APIC-edge timer
1: 164 IO-APIC-edge i8042
8: 3 IO-APIC-edge rtc
9: 1 IO-APIC-level acpi
12: 0 IO-APIC-edge CAN-ACx-PCI_01
14: 65786 IO-APIC-edge ide0
169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
177: 46459 IO-APIC-level eth1
209: 0 IO-APIC-level uhci_hcd:usb3, eth2
217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
225: 697 IO-APIC-level uhci_hcd:usb2
NMI: 0
LOC: 1614399
ERR: 0
MIS: 0
You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
Is there any way of forcing the BIOS to see the interrupt as a
level-triggered one?
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On Tue, 18 Sep 2007 [email protected] wrote:
>
> I have a CAN PCI card installed on my Ubuntu box.
> I understand that PCI interrupts should be level rather than edge
> triggered.
>
> The output of cat /proc/interrupts is :-
>
> CPU0
> 0: 1614601 IO-APIC-edge timer
> 1: 164 IO-APIC-edge i8042
> 8: 3 IO-APIC-edge rtc
> 9: 1 IO-APIC-level acpi
> 12: 0 IO-APIC-edge CAN-ACx-PCI_01
> 14: 65786 IO-APIC-edge ide0
> 169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
> 177: 46459 IO-APIC-level eth1
> 209: 0 IO-APIC-level uhci_hcd:usb3, eth2
> 217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
> 225: 697 IO-APIC-level uhci_hcd:usb2
> NMI: 0
> LOC: 1614399
> ERR: 0
> MIS: 0
>
> You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
> Is there any way of forcing the BIOS to see the interrupt as a
> level-triggered one?
It's done in the driver. IRQ12 can be shared, so the driver
needs to request the IRQ as a shared interrupt.
Cheers,
Dick Johnson
Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
My book : http://www.AbominableFirebug.com/
_
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Thank you.
The driver already does that ...
result =
request_irq(irq, can_pci_interrupt, SA_INTERRUPT | SA_SHIRQ,
pDevice->au8IrqName, pDevice);
Any other ideas?
Duncan
"linux-os \(Dick
Johnson\)"
<linux-os@analogi To
c.com> <[email protected]>
cc
18/09/2007 14:57 "Linux kernel"
<[email protected]>
Subject
Please respond to Re: PCI Interrupt
"linux-os \(Dick
Johnson\)"
<linux-os@analogi
c.com>
On Tue, 18 Sep 2007 [email protected] wrote:
>
> I have a CAN PCI card installed on my Ubuntu box.
> I understand that PCI interrupts should be level rather than edge
> triggered.
>
> The output of cat /proc/interrupts is :-
>
> CPU0
> 0: 1614601 IO-APIC-edge timer
> 1: 164 IO-APIC-edge i8042
> 8: 3 IO-APIC-edge rtc
> 9: 1 IO-APIC-level acpi
> 12: 0 IO-APIC-edge CAN-ACx-PCI_01
> 14: 65786 IO-APIC-edge ide0
> 169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
> 177: 46459 IO-APIC-level eth1
> 209: 0 IO-APIC-level uhci_hcd:usb3, eth2
> 217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
> 225: 697 IO-APIC-level uhci_hcd:usb2
> NMI: 0
> LOC: 1614399
> ERR: 0
> MIS: 0
>
> You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
> Is there any way of forcing the BIOS to see the interrupt as a
> level-triggered one?
It's done in the driver. IRQ12 can be shared, so the driver
needs to request the IRQ as a shared interrupt.
Cheers,
Dick Johnson
Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
My book : http://www.AbominableFirebug.com/
_
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Thank you.
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On Tue, Sep 18, 2007 at 03:08:46PM +0100, [email protected] wrote:
> The driver already does that ...
>
> result =
> request_irq(irq, can_pci_interrupt, SA_INTERRUPT | SA_SHIRQ,
> pDevice->au8IrqName, pDevice);
>
>
> Any other ideas?
Maybe the system thinks a ps2 mouse port owns irq 12 and messes it up as
a result.
--
Len Sorensen
On Tuesday, 18 September 2007 15:57, linux-os (Dick Johnson) wrote:
>
> On Tue, 18 Sep 2007 [email protected] wrote:
>
> >
> > I have a CAN PCI card installed on my Ubuntu box.
> > I understand that PCI interrupts should be level rather than edge
> > triggered.
> >
> > The output of cat /proc/interrupts is :-
> >
> > CPU0
> > 0: 1614601 IO-APIC-edge timer
> > 1: 164 IO-APIC-edge i8042
> > 8: 3 IO-APIC-edge rtc
> > 9: 1 IO-APIC-level acpi
> > 12: 0 IO-APIC-edge CAN-ACx-PCI_01
> > 14: 65786 IO-APIC-edge ide0
> > 169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
> > 177: 46459 IO-APIC-level eth1
> > 209: 0 IO-APIC-level uhci_hcd:usb3, eth2
> > 217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
> > 225: 697 IO-APIC-level uhci_hcd:usb2
> > NMI: 0
> > LOC: 1614399
> > ERR: 0
> > MIS: 0
> >
> > You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
> > Is there any way of forcing the BIOS to see the interrupt as a
> > level-triggered one?
>
> It's done in the driver. IRQ12 can be shared, so the driver
> needs to request the IRQ as a shared interrupt.
Hm, edge-triggered interrupts cannot be shared, AFAIK.
Greetings,
Rafael
On Tue, 18 Sep 2007 [email protected] wrote:
> The driver already does that ...
>
> result =
> request_irq(irq, can_pci_interrupt, SA_INTERRUPT | SA_SHIRQ,
> pDevice->au8IrqName, pDevice);
>
>
> Any other ideas?
>
> Duncan
>
>
> "linux-os \(Dick
> Johnson\)"
> <linux-os@analogi To
> c.com> <[email protected]>
> cc
> 18/09/2007 14:57 "Linux kernel"
> <[email protected]>
> Subject
> Please respond to Re: PCI Interrupt
> "linux-os \(Dick
> Johnson\)"
> <linux-os@analogi
> c.com>
>
> On Tue, 18 Sep 2007 [email protected] wrote:
>
>>
>> I have a CAN PCI card installed on my Ubuntu box.
>> I understand that PCI interrupts should be level rather than edge
>> triggered.
>>
>> The output of cat /proc/interrupts is :-
>>
>> CPU0
>> 0: 1614601 IO-APIC-edge timer
>> 1: 164 IO-APIC-edge i8042
>> 8: 3 IO-APIC-edge rtc
>> 9: 1 IO-APIC-level acpi
>> 12: 0 IO-APIC-edge CAN-ACx-PCI_01
>> 14: 65786 IO-APIC-edge ide0
>> 169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
>> 177: 46459 IO-APIC-level eth1
>> 209: 0 IO-APIC-level uhci_hcd:usb3, eth2
>> 217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
>> 225: 697 IO-APIC-level uhci_hcd:usb2
>> NMI: 0
>> LOC: 1614399
>> ERR: 0
>> MIS: 0
>>
>> You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
>> Is there any way of forcing the BIOS to see the interrupt as a
>> level-triggered one?
>
> It's done in the driver. IRQ12 can be shared, so the driver
> needs to request the IRQ as a shared interrupt.
>
>
> Cheers,
> Dick Johnson
> Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
> My book : http://www.AbominableFirebug.com/
> _
Okay, then in the BIOS, make sure that IRQ12 is not assigned to
a specific device. In other words, set it to PnP (if available).
As you well know, PCI requires sharable interrupts and edges
are not sharable so something is broken. As a last resort,
move your PCI board to abother slot which should pick up another
interrupt, which may not be broken. If that doesn't work, see
if a new BIOS is available for download.
Cheers,
Dick Johnson
Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
My book : http://www.AbominableFirebug.com/
_
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The information transmitted in this message is confidential and may be privileged. Any review, retransmission, dissemination, or other use of this information by persons or entities other than the intended recipient is prohibited. If you are not the intended recipient, please notify Analogic Corporation immediately - by replying to this message or by sending an email to [email protected] - and destroy all copies of this information, including any attachments, without reading or disclosing them.
Thank you.
Sorted.
A setting in the BIOS meant it was storing old configuration data.
After disabling this option, it became a level triggered interrupt and
everything now works!
Thanks.
"linux-os \(Dick
Johnson\)"
<linux-os@analogi To
c.com> <[email protected]>
cc
18/09/2007 15:34 "Linux kernel"
<[email protected]>
Subject
Please respond to Re: PCI Interrupt
"linux-os \(Dick
Johnson\)"
<linux-os@analogi
c.com>
On Tue, 18 Sep 2007 [email protected] wrote:
> The driver already does that ...
>
> result =
> request_irq(irq, can_pci_interrupt, SA_INTERRUPT | SA_SHIRQ,
> pDevice->au8IrqName, pDevice);
>
>
> Any other ideas?
>
> Duncan
>
>
> "linux-os \(Dick
> Johnson\)"
> <linux-os@analogi To
> c.com> <[email protected]>
> cc
> 18/09/2007 14:57 "Linux kernel"
> <[email protected]>
> Subject
> Please respond to Re: PCI Interrupt
> "linux-os \(Dick
> Johnson\)"
> <linux-os@analogi
> c.com>
>
> On Tue, 18 Sep 2007 [email protected] wrote:
>
>>
>> I have a CAN PCI card installed on my Ubuntu box.
>> I understand that PCI interrupts should be level rather than edge
>> triggered.
>>
>> The output of cat /proc/interrupts is :-
>>
>> CPU0
>> 0: 1614601 IO-APIC-edge timer
>> 1: 164 IO-APIC-edge i8042
>> 8: 3 IO-APIC-edge rtc
>> 9: 1 IO-APIC-level acpi
>> 12: 0 IO-APIC-edge CAN-ACx-PCI_01
>> 14: 65786 IO-APIC-edge ide0
>> 169: 3220 IO-APIC-level eth0, i915@pci:0000:00:02.0
>> 177: 46459 IO-APIC-level eth1
>> 209: 0 IO-APIC-level uhci_hcd:usb3, eth2
>> 217: 2 IO-APIC-level uhci_hcd:usb1, ehci_hcd:usb4
>> 225: 697 IO-APIC-level uhci_hcd:usb2
>> NMI: 0
>> LOC: 1614399
>> ERR: 0
>> MIS: 0
>>
>> You see that irq 12 CAN-ACx-PCI_01 is edge triggered.
>> Is there any way of forcing the BIOS to see the interrupt as a
>> level-triggered one?
>
> It's done in the driver. IRQ12 can be shared, so the driver
> needs to request the IRQ as a shared interrupt.
>
>
> Cheers,
> Dick Johnson
> Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
> My book : http://www.AbominableFirebug.com/
> _
Okay, then in the BIOS, make sure that IRQ12 is not assigned to
a specific device. In other words, set it to PnP (if available).
As you well know, PCI requires sharable interrupts and edges
are not sharable so something is broken. As a last resort,
move your PCI board to abother slot which should pick up another
interrupt, which may not be broken. If that doesn't work, see
if a new BIOS is available for download.
Cheers,
Dick Johnson
Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
My book : http://www.AbominableFirebug.com/
_
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The information transmitted in this message is confidential and may be
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is prohibited. If you are not the intended recipient, please notify
Analogic Corporation immediately - by replying to this message or by
sending an email to [email protected] - and destroy all copies of
this information, including any attachments, without reading or disclosing
them.
Thank you.
*******************Internet Email Confidentiality Footer*******************
The contents of this e-mail message (including any attachments hereto) are
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Elekta Limited is a company registered in England and Wales whose
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On Tue, 18 Sep 2007 [email protected] wrote:
> Sorted.
>
> A setting in the BIOS meant it was storing old configuration data.
> After disabling this option, it became a level triggered interrupt and
> everything now works!
>
> Thanks.
Good!
Cheers,
Dick Johnson
Penguin : Linux version 2.6.22.1 on an i686 machine (5588.30 BogoMips).
My book : http://www.AbominableFirebug.com/
_
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The information transmitted in this message is confidential and may be privileged. Any review, retransmission, dissemination, or other use of this information by persons or entities other than the intended recipient is prohibited. If you are not the intended recipient, please notify Analogic Corporation immediately - by replying to this message or by sending an email to [email protected] - and destroy all copies of this information, including any attachments, without reading or disclosing them.
Thank you.
On 18-09-2007 16:42, Rafael J. Wysocki wrote:
...
>
> Hm, edge-triggered interrupts cannot be shared, AFAIK.
>
Let's agree it's only a superstition...
http://en.wikipedia.org/wiki/Edge_triggered_interrupt
Regards,
Jarek P.
On Wednesday, 19 September 2007 12:14, Jarek Poplawski wrote:
> On 18-09-2007 16:42, Rafael J. Wysocki wrote:
> ...
> >
> > Hm, edge-triggered interrupts cannot be shared, AFAIK.
> >
>
> Let's agree it's only a superstition...
>
> http://en.wikipedia.org/wiki/Edge_triggered_interrupt
Well, if this is an MSI (which is edge-triggered), for example, it cannot be
shared.
Also, you must use a level-triggered interrupt for SCI, because that has to be
shareable.
Greetings,
Rafael
On 19 Sep 2007 at 12:14, Jarek Poplawski wrote:
> On 18-09-2007 16:42, Rafael J. Wysocki wrote:
> > Hm, edge-triggered interrupts cannot be shared, AFAIK.
> >
> Let's agree it's only a superstition...
> http://en.wikipedia.org/wiki/Edge_triggered_interrupt
>
Superstition? Depends on how stringent your requirements are.
On IBM PC compatible hardware, there's always a risky "window of
opportunity" that a shared edge-triggered interrupt line gets
electrically re-triggered before your ISR manages to service all the
devices and ACK the interrupt (I believe RTAI does that in reverse
order). In that case, you get a missed interrupt, and your
peripherial device may wait for service indefinitely.
I don't recall if the i8259 AT-pic has some useable "retrigger while
in service" register, maybe the APIC does. (I do recall that the
8259's two-register IO footprint is rather convoluted.) I seriously
doubt that the presence of such a register would completely eliminate
the critical window of time.
On PC hardware or in general, sharing edge-triggered interrupts can
be perfectly allright under very specific conditions, if you know
exactly what you're doing, e.g. you know that the collision of
interrupt sources simply cannot occur (due to some characteristic
sequencing of interrupt-generating events in the specific peripherial
hardware), or you don't quite bother (in that case, why use an
interrupt at all?).
You can certainly try to re-check your string of devices before
finally ACKing, or set up supplemental timer-based periodic polling,
but those are all kludgey workarounds that converge towards not using
interrupts at all. I believe this is one of the reasons why e.g. ISA
multi-port serial boards with a shared interrupt have been dropped
from Linux 2.6 (vs. 2.4).
The fact that some ISA peripherials do respect the open-collector
convention, so that electrical sharing of the IRQ line is possible,
doesn't help the ISR do the job in time. Even at the electric level,
this rule is far from notorious. I've had the opportunity to write a
driver for a special-purpose ISA board, where two different
generations of the hardware treated the IRQ line very differently. If
you use OC+pullup combined with active-low pulses of fixed length and
trigger on the trailing edge of the interrupt pulse, you miss the
moment of interrupt by a few bus clocks, which adds to your IRQ
latency... If you (mis)treat the IRQ line as active high, so as to be
able to send a rising edge exactly in sync with the interrupt event,
you lose the electrical-level sharing capability.
All in all I'm glad that the PCI guarantees level-triggered
interrupts, exactly because I don't have to worry much about the
pesky details of IRQ sharing.
And I'm especially glad that PCIe+MSI (direct to LAPIC delivery)
will someday make IRQ sharing a matter of the past.
Note how modern PCIe-based PC's in "IO(x)APIC legacy-compatible mode"
are still forcing most PCIe peripherials to share four (4) IRQ
numbers, unless you take care to select your OS and drivers to
support MSI on as many devices as possible...
Frank Rysanek
On Wed, Sep 19, 2007 at 02:32:12PM +0200, Rafael J. Wysocki wrote:
> On Wednesday, 19 September 2007 12:14, Jarek Poplawski wrote:
> > On 18-09-2007 16:42, Rafael J. Wysocki wrote:
> > ...
> > >
> > > Hm, edge-triggered interrupts cannot be shared, AFAIK.
> > >
> >
> > Let's agree it's only a superstition...
> >
> > http://en.wikipedia.org/wiki/Edge_triggered_interrupt
>
> Well, if this is an MSI (which is edge-triggered), for example, it cannot be
> shared.
I'd rather say: "which is handled like edge-triggered".
>
> Also, you must use a level-triggered interrupt for SCI, because that has to be
> shareable.
O.K. Let's agree we differ here a bit...
Cheers,
Jarek P.
On 19-09-2007 13:21, Frantisek Rysanek wrote:
> On 19 Sep 2007 at 12:14, Jarek Poplawski wrote:
>> On 18-09-2007 16:42, Rafael J. Wysocki wrote:
>>> Hm, edge-triggered interrupts cannot be shared, AFAIK.
>>>
>> Let's agree it's only a superstition...
>> http://en.wikipedia.org/wiki/Edge_triggered_interrupt
>>
> Superstition? Depends on how stringent your requirements are.
>
My requirements aren't stringent at all. They are general like the
sentence: "edge-triggered interrupts cannot be shared", which, IMHO,
could mislead somebody. So, it's only about "cannot" vs. "cannot (or
is not recommended/implemented) with some kind of hardware (like PC)".
Regards,
Jarek P.
On Wed, 19 Sep 2007, Frantisek Rysanek wrote:
> On IBM PC compatible hardware, there's always a risky "window of
> opportunity" that a shared edge-triggered interrupt line gets
> electrically re-triggered before your ISR manages to service all the
> devices and ACK the interrupt (I believe RTAI does that in reverse
> order). In that case, you get a missed interrupt, and your
> peripherial device may wait for service indefinitely.
That's because the 8259A does not support truly edge-triggered interrupts
-- what it supports is a signalling model where the rising edge asserts
the interrupt and the falling edge negates it if unhandled. So in some
sense it is a level-triggered interrupt with no retrigger before the
falling edge.
> I don't recall if the i8259 AT-pic has some useable "retrigger while
> in service" register, maybe the APIC does. (I do recall that the
> 8259's two-register IO footprint is rather convoluted.) I seriously
> doubt that the presence of such a register would completely eliminate
> the critical window of time.
The APIC can support truly edge-triggered interrupts as it only records
one of the edges (which one of the two it is, depends on the polarity
setting). It also records another edge happening between an ACK and an
EOI and signals another interrupt immediately after the EOI, so nothing is
lost if pulses are short (assuming there is a reasonably small number of
sources so that overlapping pulses do not continue for too long). There
are subtle differences, as usually with Intel, between APIC
implementations that may have to be taken into account here.
Also sharing at the vector level poses interesting issues, but that's
different matter.
Maciej