In certain machines, camera devices are supplied directly
by a number of regulators. This patch add the ability to drive
these regulators directly by the soc_camera driver.
What the machine code have to do to use this functionality is to:
1- Define a number of useful regulator supply descriptions such as:
static struct regulator_consumer_supply camera_reg1_consumers[] = {
...
REGULATOR_SUPPLY("camera_reg1", "soc-camera-pdrv.0"),
...
};
(Pay attention at the .N suffix of "soc-camera-pdrv" in case of
a system with multiple cameras)
2- Define the list of regulators to bind to a specific instance of
soc-camera-pdrv with their voltages:
static struct soc_camera_regulator_desc soc_camera_regs[] = {
SOCAM_REG_DESC("camera_reg1", 1300000, 1300000),
SOCAM_REG_DESC("camera_reg2", 2800000, 2800000),
...
};
3- Add the list to the corresponding soc_camera_link description:
static struct soc_camera_link iclink_my_camera = {
...
.soc_regulator_descs = soc_camera_regs,
.num_soc_regulator_descs = ARRAY_SIZE(soc_camera_regs),
};
4- And register it as usual with the platform device description:
static struct platform_device machine_my_camera = {
.name = "soc-camera-pdrv",
.id = 0,
.dev = {
.platform_data = &iclink_my_camera,
},
};
Signed-off-by: Alberto Panizzo <[email protected]>
---
drivers/media/video/soc_camera.c | 135 +++++++++++++++++++++++++++++++------
include/media/soc_camera.h | 16 +++++
2 files changed, 129 insertions(+), 22 deletions(-)
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 43848a7..8fc5831 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -43,6 +43,96 @@ static LIST_HEAD(hosts);
static LIST_HEAD(devices);
static DEFINE_MUTEX(list_lock); /* Protects the list of hosts */
+static int soc_camera_setup_regulators(struct soc_camera_device *icd,
+ struct soc_camera_link *icl)
+{
+ int i, ret;
+
+ icd->soc_regulators = kzalloc(icl->num_soc_regulator_descs *
+ sizeof(struct regulator *), GFP_KERNEL);
+ if (!icd->soc_regulators) {
+ dev_err(icd->pdev, "Not enough memory.\n");
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ for (i = 0; i < icl->num_soc_regulator_descs; i++) {
+ dev_dbg(icd->pdev, "Looking for reg:'%s' bound to dev:'%s'",
+ icl->soc_regulator_descs[i].supply,
+ dev_name(icd->pdev));
+ icd->soc_regulators[i] = regulator_get(icd->pdev,
+ icl->soc_regulator_descs[i].supply);
+ if (IS_ERR(icd->soc_regulators[i])) {
+ icd->soc_regulators[i] = NULL;
+ dev_err(icd->pdev, "Unable to get regulator: \"%s\".\n",
+ icl->soc_regulator_descs[i].supply);
+ ret = -ENODEV;
+ goto free_regs;
+ }
+ }
+
+ icd->num_soc_regulators = icl->num_soc_regulator_descs;
+
+ return 0;
+
+free_regs:
+ for (i--; i >= 0; i--)
+ regulator_put(icd->soc_regulators[i]);
+err:
+ return ret;
+}
+
+static int soc_camera_power_set(struct soc_camera_device *icd,
+ struct soc_camera_link *icl,
+ int power_on)
+{
+ int ret, i;
+
+ for (i = 0; i < icd->num_soc_regulators; i++) {
+ if (power_on) {
+ ret = regulator_set_voltage(icd->soc_regulators[i],
+ icl->soc_regulator_descs[i].value_on_min,
+ icl->soc_regulator_descs[i].value_on_max);
+ if (ret) {
+ dev_err(icd->pdev, "Cannot set '%s' to %d:%d",
+ icl->soc_regulator_descs[i].supply,
+ icl->soc_regulator_descs[i].value_on_min,
+ icl->soc_regulator_descs[i].value_on_max);
+ goto err;
+ }
+
+ ret = regulator_enable(icd->soc_regulators[i]);
+ if (ret < 0) {
+ dev_err(icd->pdev, "Cannot enable reg '%s'",
+ icl->soc_regulator_descs[i].supply);
+ goto err;
+ }
+ } else {
+ ret = regulator_disable(icd->soc_regulators[i]);
+ if (ret) {
+ dev_err(icd->pdev, "Cannot disable reg '%s'",
+ icl->soc_regulator_descs[i].supply);
+ goto err;
+ }
+ }
+ }
+
+ if (icl->power) {
+ ret = icl->power(icd->pdev, power_on);
+ if (ret < 0) {
+ dev_err(icd->pdev,
+ "Platform failed to power-%s the camera.\n",
+ power_on ? "ON" : "OFF");
+ goto err;
+ }
+ }
+
+ return 0;
+
+err:
+ return ret;
+}
+
const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
struct soc_camera_device *icd, unsigned int fourcc)
{
@@ -375,11 +465,9 @@ static int soc_camera_open(struct file *file)
},
};
- if (icl->power) {
- ret = icl->power(icd->pdev, 1);
- if (ret < 0)
- goto epower;
- }
+ ret = soc_camera_power_set(icd, icl, 1);
+ if (ret < 0)
+ goto epower;
/* The camera could have been already on, try to reset */
if (icl->reset)
@@ -425,8 +513,7 @@ esfmt:
eresume:
ici->ops->remove(icd);
eiciadd:
- if (icl->power)
- icl->power(icd->pdev, 0);
+ soc_camera_power_set(icd, icl, 0);
epower:
icd->use_count--;
mutex_unlock(&icd->video_lock);
@@ -450,8 +537,7 @@ static int soc_camera_close(struct file *file)
ici->ops->remove(icd);
- if (icl->power)
- icl->power(icd->pdev, 0);
+ soc_camera_power_set(icd, icl, 0);
}
if (icd->streamer == file)
@@ -937,18 +1023,18 @@ static int soc_camera_probe(struct device *dev)
struct device *control = NULL;
struct v4l2_subdev *sd;
struct v4l2_mbus_framefmt mf;
- int ret;
+ int ret = 0, i;
dev_info(dev, "Probing %s\n", dev_name(dev));
- if (icl->power) {
- ret = icl->power(icd->pdev, 1);
- if (ret < 0) {
- dev_err(dev,
- "Platform failed to power-on the camera.\n");
- goto epower;
- }
- }
+ if (icl->num_soc_regulator_descs)
+ ret = soc_camera_setup_regulators(icd, icl);
+ if (ret)
+ goto err;
+
+ ret = soc_camera_power_set(icd, icl, 1);
+ if (ret < 0)
+ goto epower;
/* The camera could have been already on, try to reset */
if (icl->reset)
@@ -1021,8 +1107,7 @@ static int soc_camera_probe(struct device *dev)
ici->ops->remove(icd);
- if (icl->power)
- icl->power(icd->pdev, 0);
+ soc_camera_power_set(icd, icl, 0);
mutex_unlock(&icd->video_lock);
@@ -1044,9 +1129,11 @@ eadddev:
evdc:
ici->ops->remove(icd);
eadd:
- if (icl->power)
- icl->power(icd->pdev, 0);
+ soc_camera_power_set(icd, icl, 0);
epower:
+ for (i = icd->num_soc_regulators; i >= 0; i--)
+ regulator_put(icd->soc_regulators[i]);
+err:
return ret;
}
@@ -1059,6 +1146,7 @@ static int soc_camera_remove(struct device *dev)
struct soc_camera_device *icd = to_soc_camera_dev(dev);
struct soc_camera_link *icl = to_soc_camera_link(icd);
struct video_device *vdev = icd->vdev;
+ int i;
BUG_ON(!dev->parent);
@@ -1081,6 +1169,9 @@ static int soc_camera_remove(struct device *dev)
}
soc_camera_free_user_formats(icd);
+ for (i = icd->num_soc_regulators; i >= 0; i--)
+ regulator_put(icd->soc_regulators[i]);
+
return 0;
}
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
index 86e3631..ae589a4 100644
--- a/include/media/soc_camera.h
+++ b/include/media/soc_camera.h
@@ -15,6 +15,7 @@
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm.h>
+#include <linux/regulator/consumer.h>
#include <linux/videodev2.h>
#include <media/videobuf-core.h>
#include <media/v4l2-device.h>
@@ -45,6 +46,8 @@ struct soc_camera_device {
struct mutex video_lock; /* Protects device data */
struct file *streamer; /* stream owner */
struct videobuf_queue vb_vidq;
+ struct regulator **soc_regulators;
+ int num_soc_regulators;
};
struct soc_camera_host {
@@ -96,6 +99,15 @@ struct soc_camera_host_ops {
#define SOCAM_SENSOR_INVERT_VSYNC (1 << 3)
#define SOCAM_SENSOR_INVERT_DATA (1 << 4)
+struct soc_camera_regulator_desc {
+ const char *supply;
+ int value_on_min;
+ int value_on_max;
+};
+
+#define SOCAM_REG_DESC(s, min, max) \
+ { .supply = s , .value_on_min = min , .value_on_max = max }
+
struct i2c_board_info;
struct soc_camera_link {
@@ -108,6 +120,10 @@ struct soc_camera_link {
const char *module_name;
void *priv;
+ /* Optional regulators that have to be managed on power on/off events */
+ struct soc_camera_regulator_desc *soc_regulator_descs;
+ int num_soc_regulator_descs;
+
/*
* For non-I2C devices platform platform has to provide methods to
* add a device to the system and to remove
--
1.6.3.3
This patch is tested and works with the OV2640 camera that output
YUV422 (UYVY) and RGB565 data.
The YUV422 format is managed to be converted in IPU internal YUV444 format
so this stream could be used in the future to feed directly other IPU
blocks.
The RGB565 format is managed as GENERIC and can be moved only from CSI
to memory.
Signed-off-by: Alberto Panizzo <[email protected]>
---
Before applying, please give me feedback if this break in some way other
pixel formats!
drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
1 files changed, 110 insertions(+), 16 deletions(-)
diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
index 29c5fc3..6811d6f 100644
--- a/drivers/media/video/mx3_camera.c
+++ b/drivers/media/video/mx3_camera.c
@@ -55,6 +55,31 @@
#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
+/*
+ * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
+ * 1 YUV 4:4:4 or RGB—8 bits per color component
+ * 2 YUV 4:4:4 or RGB—10 bits per color component
+ * 3 Generic data (from sensor to the system memory only)
+ * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
+ * recognized by IPU blocks.
+ *
+ * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
+ * align (or rearrange) the sampled data to fit the IPU supported formats
+ * as follows:
+ * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
+ * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
+ * The CSI output in this case can feed other IPU blocks.
+ * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
+ * 2 components of width DATA_WIDTH were the first is the alternating U V
+ * components and the second is Y. It construct the YUV444 word repeating
+ * the previous U, V samples aligning the results to a 32 bit word.
+ * The CSI output in this case can feed other IPU blocks.
+ * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
+ * The sensor data is given as is, considering _every sample_ as a pixel
+ * data. This format (combined with the GENERIC IPU pixel formats) can
+ * carry all the other sensor pixel formats to the system memory.
+ * The CSI output in this case _can not_ feed other IPU blocks.
+ */
#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
@@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
{
/* Add more formats as need arises and test possibilities appear... */
switch (fourcc) {
- case V4L2_PIX_FMT_RGB565:
- return IPU_PIX_FMT_RGB565;
case V4L2_PIX_FMT_RGB24:
return IPU_PIX_FMT_RGB24;
+ case V4L2_PIX_FMT_UYVY:
+ return IPU_PIX_FMT_UYVY;
+ case V4L2_PIX_FMT_RGB565:
case V4L2_PIX_FMT_RGB332:
- return IPU_PIX_FMT_RGB332;
- case V4L2_PIX_FMT_YUV422P:
- return IPU_PIX_FMT_YVU422P;
default:
return IPU_PIX_FMT_GENERIC;
}
@@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
/* This is the configuration of one sg-element */
video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
- video->out_width = icd->user_width;
- video->out_height = icd->user_height;
- video->out_stride = icd->user_width;
+
+ if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
+ /*
+ * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
+ * video->out_width and stride to the correct unit.
+ */
+ int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
+ icd->current_fmt->host_fmt);
+ BUG_ON(bytes_per_line <= 0);
+
+ video->out_width = bytes_per_line;
+ video->out_height = icd->user_height;
+ video->out_stride = bytes_per_line;
+ } else {
+ /* For IPU known formats the pixel unit is OK */
+ video->out_width = icd->user_width;
+ video->out_height = icd->user_height;
+ video->out_stride = icd->user_width;
+ }
#ifdef DEBUG
/* helps to see what DMA actually has written */
@@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
if (xlate) {
xlate->host_fmt = fmt;
xlate->code = code;
+ dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
+ (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
+ (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
+ (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
+ (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
xlate++;
- dev_dbg(dev, "Providing format %x in pass-through mode\n",
- xlate->host_fmt->fourcc);
}
return formats;
}
+static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
+{
+ switch (mcode) {
+ case V4L2_MBUS_FMT_YUYV8_2X8:
+ case V4L2_MBUS_FMT_YVYU8_2X8:
+ case V4L2_MBUS_FMT_VYUY8_2X8:
+ case V4L2_MBUS_FMT_YVYU10_2X10:
+ case V4L2_MBUS_FMT_YUYV10_2X10:
+ case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
+ case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
+ case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
+ case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ case V4L2_MBUS_FMT_RGB565_2X8_BE:
+ case V4L2_MBUS_FMT_BGR565_2X8_LE:
+ case V4L2_MBUS_FMT_BGR565_2X8_BE:
+ return 2;
+ case V4L2_MBUS_FMT_SBGGR8_1X8:
+ case V4L2_MBUS_FMT_SBGGR10_1X10:
+ case V4L2_MBUS_FMT_GREY8_1X8:
+ case V4L2_MBUS_FMT_Y10_1X10:
+ case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
+ case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
+ case V4L2_MBUS_FMT_SGRBG8_1X8:
+ return 1;
+ default:
+ /* Add other pixel codes as needed */
+ return 0;
+ }
+}
+
static void configure_geometry(struct mx3_camera_dev *mx3_cam,
- unsigned int width, unsigned int height)
+ unsigned int width, unsigned int height,
+ enum v4l2_mbus_pixelcode code)
{
u32 ctrl, width_field, height_field;
+ const struct soc_mbus_pixelfmt *fmt;
+
+ fmt = soc_mbus_get_fmtdesc(code);
+ BUG_ON(!fmt);
+
+ if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
+ /*
+ * As we don't have an IPU native format, the CSI will be
+ * configured to output BAYER and here we need to convert
+ * geometry unit from pixels to samples.
+ * TODO: Support vertical down sampling (YUV420)
+ */
+ width = width * samples_per_pixel(code);
+ BUG_ON(!width);
+ }
/* Setup frame size - this cannot be changed on-the-fly... */
width_field = width - 1;
@@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
return ret;
}
- configure_geometry(mx3_cam, mf.width, mf.height);
+ configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
}
dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
@@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
* mxc_v4l2_s_fmt()
*/
- configure_geometry(mx3_cam, pix->width, pix->height);
+ configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
mf.width = pix->width;
mf.height = pix->height;
@@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
(3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
(3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
- /* TODO: Support RGB and YUV formats */
+ /* TODO: Support RGB_YUV444 formats */
- /* This has been set in mx3_camera_activate(), but we clear it above */
- sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
+ switch (xlate->code) {
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
+ break;
+ default:
+ sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
+ }
if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
--
1.6.3.3
Signed-off-by: Alberto Panizzo <[email protected]>
---
drivers/media/video/Kconfig | 6 +
drivers/media/video/Makefile | 1 +
drivers/media/video/ov2640.c | 1153
+++++++++++++++++++++++++++++++++++++++
include/media/v4l2-chip-ident.h | 1 +
4 files changed, 1161 insertions(+), 0 deletions(-)
create mode 100644 drivers/media/video/ov2640.c
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 0efbb29..898f76f 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -807,6 +807,12 @@ config SOC_CAMERA_OV9640
help
This is a ov9640 camera driver
+config SOC_CAMERA_OV2640
+ tristate "ov2640 camera support"
+ depends on SOC_CAMERA && I2C
+ help
+ This is a ov2640 camera driver
+
config MX1_VIDEO
bool
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index af79d47..fac185d 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -82,6 +82,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o
obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o
obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o
obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o
+obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o
obj-$(CONFIG_SOC_CAMERA_RJ54N1) += rj54n1cb0c.o
obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o
diff --git a/drivers/media/video/ov2640.c b/drivers/media/video/ov2640.c
new file mode 100644
index 0000000..5edf23e
--- /dev/null
+++ b/drivers/media/video/ov2640.c
@@ -0,0 +1,1153 @@
+/*
+ * ov2640 Camera Driver
+ *
+ * Copyright (C) 2010 Alberto Panizzo <[email protected]>
+ *
+ * Based on ov772x, ov9640 drivers and previous non merged
implementations.
+ *
+ * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights
Reserved.
+ * Copyright (C) 2006, OmniVision
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-subdev.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+
+#define VAL_SET(x, mask, rshift, lshift) \
+ ((((x) >> rshift) & mask) << lshift)
+/*
+ * DSP registers
+ * register offset for BANK_SEL == BANK_SEL_DSP
+ */
+#define R_BYPASS 0x05 /* Bypass DSP */
+#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP. sensor out directly
*/
+#define R_BYPASS_USE_DSP 0x00 /* Bypass DSP. sensor out directly
*/
+#define QS 0x44 /* Quantization Scale Factor */
+#define CTRLI 0x50
+#define CTRLI_LP_DP 0x80
+#define CTRLI_ROUND 0x40
+#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
+#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
+#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
+#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define XOFFL 0x53 /* OFFSET_X[7:0] */
+#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define YOFFL 0x54 /* OFFSET_Y[7:0] */
+#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define VHYX 0x55 /* Offset and size completion */
+#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
+#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
+#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
+#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
+#define DPRP 0x56
+#define TEST 0x57 /* Horizontal size completion */
+#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
+#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
+#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
+#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
+#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
+#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
+#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
+#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
+#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
+#define CTRL2 0x86 /* DSP Module enable 2 */
+#define CTRL2_DCW_EN 0x20
+#define CTRL2_SDE_EN 0x10
+#define CTRL2_UV_ADJ_EN 0x08
+#define CTRL2_UV_AVG_EN 0x04
+#define CTRL2_CMX_EN 0x01
+#define CTRL3 0x87 /* DSP Module enable 3 */
+#define CTRL3_BPC_EN 0x80
+#define CTRL3_WPC_EN 0x40
+#define SIZEL 0x8C /* Image Size Completion */
+#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
+#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
+#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
+#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
+#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
+#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define CTRL0 0xC2 /* DSP Module enable 0 */
+#define CTRL0_AEC_EN 0x80
+#define CTRL0_AEC_SEL 0x40
+#define CTRL0_STAT_SEL 0x20
+#define CTRL0_VFIRST 0x10
+#define CTRL0_YUV422 0x08
+#define CTRL0_YUV_EN 0x04
+#define CTRL0_RGB_EN 0x02
+#define CTRL0_RAW_EN 0x01
+#define CTRL1 0xC3 /* DSP Module enable 1 */
+#define CTRL1_CIP 0x80
+#define CTRL1_DMY 0x40
+#define CTRL1_RAW_GMA 0x20
+#define CTRL1_DG 0x10
+#define CTRL1_AWB 0x08
+#define CTRL1_AWB_GAIN 0x04
+#define CTRL1_LENC 0x02
+#define CTRL1_PRE 0x01
+#define R_DVP_SP 0xD3 /* DVP output speed control */
+#define R_DVP_SP_AUTO_MODE 0x80
+#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0]
(YUV0);
+ * = sysclk (48)/(2*[6:0]) (RAW);*/
+#define IMAGE_MODE 0xDA /* Image Output Format Select */
+#define IMAGE_MODE_Y8_DVP_EN 0x40
+#define IMAGE_MODE_JPEG_EN 0x10
+#define IMAGE_MODE_YUV422 0x00
+#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
+#define IMAGE_MODE_RGB565 0x08
+#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG
output
+ * mode (0 for HREF is same as sensor) */
+#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
+ * 1: Low byte first UYVY (C2[4] =0)
+ * VYUY (C2[4] =1)
+ * 0: High byte first YUYV (C2[4]=0)
+ * YVYU (C2[4] = 1) */
+#define RESET 0xE0 /* Reset */
+#define RESET_MICROC 0x40
+#define RESET_SCCB 0x20
+#define RESET_JPEG 0x10
+#define RESET_DVP 0x04
+#define RESET_IPU 0x02
+#define RESET_CIF 0x01
+#define REGED 0xED /* Register ED */
+#define REGED_CLK_OUT_DIS 0x10
+#define MS_SP 0xF0 /* SCCB Master Speed */
+#define SS_ID 0xF7 /* SCCB Slave ID */
+#define SS_CTRL 0xF8 /* SCCB Slave Control */
+#define SS_CTRL_ADD_AUTO_INC 0x20
+#define SS_CTRL_EN 0x08
+#define SS_CTRL_DELAY_CLK 0x04
+#define SS_CTRL_ACC_EN 0x02
+#define SS_CTRL_SEN_PASS_THR 0x01
+#define MC_BIST 0xF9 /* Microcontroller misc register */
+#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
+#define MC_BIST_BOOT_ROM_SEL 0x40
+#define MC_BIST_12KB_SEL 0x20
+#define MC_BIST_12KB_MASK 0x30
+#define MC_BIST_512KB_SEL 0x08
+#define MC_BIST_512KB_MASK 0x0C
+#define MC_BIST_BUSY_BIT_R 0x02
+#define MC_BIST_MC_RES_ONE_SH_W 0x02
+#define MC_BIST_LAUNCH 0x01
+#define BANK_SEL 0xFF /* Register Bank Select */
+#define BANK_SEL_DSP 0x00
+#define BANK_SEL_SENS 0x01
+
+/*
+ * Sensor registers
+ * register offset for BANK_SEL == BANK_SEL_SENS
+ */
+#define GAIN 0x00 /* AGC - Gain control gain setting */
+#define COM1 0x03 /* Common control 1 */
+#define COM1_1_DUMMY_FR 0x40
+#define COM1_3_DUMMY_FR 0x80
+#define COM1_7_DUMMY_FR 0xC0
+#define COM1_VWIN_LSB_UXGA 0x0F
+#define COM1_VWIN_LSB_SVGA 0x0A
+#define COM1_VWIN_LSB_CIF 0x06
+#define REG04 0x04 /* Register 04 */
+#define REG04_DEF 0x20 /* Always set */
+#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF
*/
+#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
+#define REG04_VREF_EN 0x10
+#define REG04_HREF_EN 0x08
+#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge
Row Num */
+#define COM2 0x09 /* Common control 2 */
+#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
+ /* Output drive capability */
+#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
+#define PID 0x0A /* Product ID Number MSB */
+#define VER 0x0B /* Product ID Number LSB */
+#define COM3 0x0C /* Common control 3 */
+#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
+#define COM3_BAND_AUTO 0x02 /* Auto Banding */
+#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output
after the
+ * snapshot sequence*/
+#define AEC 0x10 /* AEC[9:2] Exposure Value */
+#define CLKRC 0x11 /* Internal clock */
+#define CLKRC_EN 0x80
+#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
+#define COM7 0x12 /* Common control 7 */
+#define COM7_SRST 0x80 /* Initiates system reset. All
registers are
+ * set to factory default values after which
+ * the chip resumes normal operation */
+#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
+#define COM7_RES_SVGA 0x40 /* SVGA */
+#define COM7_RES_CIF 0x20 /* CIF */
+#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
+#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
+#define COM8 0x13 /* Common control 8 */
+#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
+#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
+#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control
selection */
+#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
+#define COM9 0x14 /* Common control 9
+ * Automatic gain ceiling - maximum AGC value [7:5]*/
+#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
+#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
+#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
+#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
+#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
+#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
+#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
+#define COM10 0x15 /* Common control 10 */
+#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
+#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising
edge of
+ * PCLK (user can latch data at the next
+ * falling edge of PCLK).
+ * 0 otherwise. */
+#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
+ * HREF negative for valid data*/
+#define COM10_VSINC_INV 0x02 /* Invert VSYNC polarity */
+#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
+#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
+#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
+#define VEND 0x1A /* Vertical Window end MSB 8 bit */
+#define MIDH 0x1C /* Manufacturer ID byte - high */
+#define MIDL 0x1D /* Manufacturer ID byte - low */
+#define AEW 0x24 /* AGC/AEC - Stable operating region (upper
limit) */
+#define AEB 0x25 /* AGC/AEC - Stable operating region (lower
limit) */
+#define VV 0x26 /* AGC/AEC Fast mode operating region */
+#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
+#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
+#define REG2A 0x2A /* Dummy pixel insert MSB */
+#define FRARL 0x2B /* Dummy pixel insert LSB */
+#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical
direction */
+#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical
direction */
+#define YAVG 0x2F /* Y/G Channel Average value */
+#define REG32 0x32 /* Common Control 32 */
+#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
+#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
+#define ARCOM2 0x34 /* Zoom: Horizontal start point */
+#define REG45 0x45 /* Register 45 */
+#define FLL 0x46 /* Frame Length Adjustment LSBs */
+#define FLH 0x47 /* Frame Length Adjustment MSBs */
+#define COM19 0x48 /* Zoom: Vertical start point */
+#define ZOOMS 0x49 /* Zoom: Vertical start point */
+#define COM22 0x4B /* Flash light control */
+#define COM25 0x4E /* For Banding operations */
+#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
+#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
+#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight
option */
+#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight
option */
+#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight
option */
+#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight
option */
+#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
+#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
+
+/*
+ * ID
+ */
+#define MANUFACTURER_ID 0x7FA2
+#define PID_OV2640 0x2642
+#define VERSION(pid, ver) ((pid<<8)|(ver&0xFF))
+
+/*
+ * struct
+ */
+struct regval_list {
+ u8 reg_num;
+ u16 value;
+};
+
+/* supported resolutions */
+enum ov2640_width_sizes {
+ W_QCIF = 176,
+ W_QVGA = 320,
+ W_CIF = 352,
+ W_VGA = 640,
+ W_SVGA = 800,
+ W_XGA = 1024,
+ W_SXGA = 1280,
+ W_UXGA = 1600,
+};
+
+enum ov2640_height_sizes {
+ H_QCIF = 144,
+ H_QVGA = 240,
+ H_CIF = 288,
+ H_VGA = 480,
+ H_SVGA = 600,
+ H_XGA = 768,
+ H_SXGA = 1024,
+ H_UXGA = 1200,
+};
+
+struct ov2640_win_size {
+ char *name;
+ enum ov2640_width_sizes width;
+ enum ov2640_height_sizes height;
+ const struct regval_list *regs;
+};
+
+
+struct ov2640_priv {
+ struct v4l2_subdev subdev;
+ struct ov2640_camera_info *info;
+ enum v4l2_mbus_pixelcode cfmt_code;
+ const struct ov2640_win_size *win;
+ int model;
+ u16 flag_vflip:1;
+ u16 flag_hflip:1;
+};
+
+/*
+ * Registers settings
+ */
+
+#define ENDMARKER { 0xff, 0xff }
+
+static const struct regval_list ov2640_init_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0x2c, 0xff },
+ { 0x2e, 0xdf },
+ { BANK_SEL, BANK_SEL_SENS },
+ { 0x3c, 0x32 },
+ { CLKRC, CLKRC_DIV_SET(1) },
+ { COM2, COM2_OCAP_Nx_SET(3) },
+ { REG04, REG04_DEF | REG04_HREF_EN },
+ { COM8, COM8_DEF | COM8_BNDF_EN | COM8_AGC_EN | COM8_AEC_EN },
+ { COM9, COM9_AGC_GAIN_8x | 0x08},
+ { 0x2c, 0x0c },
+ { 0x33, 0x78 },
+ { 0x3a, 0x33 },
+ { 0x3b, 0xfb },
+ { 0x3e, 0x00 },
+ { 0x43, 0x11 },
+ { 0x16, 0x10 },
+ { 0x39, 0x02 },
+ { 0x35, 0x88 },
+ { 0x22, 0x0a },
+ { 0x37, 0x40 },
+ { 0x23, 0x00 },
+ { ARCOM2, 0xa0 },
+ { 0x06, 0x02 },
+ { 0x06, 0x88 },
+ { 0x07, 0xc0 },
+ { 0x0d, 0xb7 },
+ { 0x0e, 0x01 },
+ { 0x4c, 0x00 },
+ { 0x4a, 0x81 },
+ { 0x21, 0x99 },
+ { AEW, 0x40 },
+ { AEB, 0x38 },
+ { VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
+ { 0x5c, 0x00 },
+ { 0x63, 0x00 },
+ { FLL, 0x22 },
+ { COM3, 0x38 | COM3_BAND_AUTO },
+ { REG5D, 0x55 },
+ { REG5E, 0x7d },
+ { REG5F, 0x7d },
+ { REG60, 0x55 },
+ { HISTO_LOW, 0x70 },
+ { HISTO_HIGH, 0x80 },
+ { 0x7c, 0x05 },
+ { 0x20, 0x80 },
+ { 0x28, 0x30 },
+ { 0x6c, 0x00 },
+ { 0x6d, 0x80 },
+ { 0x6e, 0x00 },
+ { 0x70, 0x02 },
+ { 0x71, 0x94 },
+ { 0x73, 0xc1 },
+ { 0x3d, 0x34 },
+ { COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
+ { 0x5a, 0x57 },
+ { BD50, 0xbb },
+ { BD60, 0x9c },
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0xe5, 0x7f },
+ { MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
+ { 0x41, 0x24 },
+ { RESET, RESET_JPEG | RESET_DVP },
+ { 0x76, 0xff },
+ { 0x33, 0xa0 },
+ { 0x42, 0x20 },
+ { 0x43, 0x18 },
+ { 0x4c, 0x00 },
+ { CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
+ { 0x88, 0x3f },
+ { 0xd7, 0x03 },
+ { 0xd9, 0x10 },
+ { R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
+ { 0xc8, 0x08 },
+ { 0xc9, 0x80 },
+ { BPADDR, 0x00 },
+ { BPDATA, 0x00 },
+ { BPADDR, 0x03 },
+ { BPDATA, 0x48 },
+ { BPDATA, 0x48 },
+ { BPADDR, 0x08 },
+ { BPDATA, 0x20 },
+ { BPDATA, 0x10 },
+ { BPDATA, 0x0e },
+ { 0x90, 0x00 },
+ { 0x91, 0x0e },
+ { 0x91, 0x1a },
+ { 0x91, 0x31 },
+ { 0x91, 0x5a },
+ { 0x91, 0x69 },
+ { 0x91, 0x75 },
+ { 0x91, 0x7e },
+ { 0x91, 0x88 },
+ { 0x91, 0x8f },
+ { 0x91, 0x96 },
+ { 0x91, 0xa3 },
+ { 0x91, 0xaf },
+ { 0x91, 0xc4 },
+ { 0x91, 0xd7 },
+ { 0x91, 0xe8 },
+ { 0x91, 0x20 },
+ { 0x92, 0x00 },
+ { 0x93, 0x06 },
+ { 0x93, 0xe3 },
+ { 0x93, 0x03 },
+ { 0x93, 0x03 },
+ { 0x93, 0x00 },
+ { 0x93, 0x02 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x96, 0x00 },
+ { 0x97, 0x08 },
+ { 0x97, 0x19 },
+ { 0x97, 0x02 },
+ { 0x97, 0x0c },
+ { 0x97, 0x24 },
+ { 0x97, 0x30 },
+ { 0x97, 0x28 },
+ { 0x97, 0x26 },
+ { 0x97, 0x02 },
+ { 0x97, 0x98 },
+ { 0x97, 0x80 },
+ { 0x97, 0x00 },
+ { 0x97, 0x00 },
+ { 0xa4, 0x00 },
+ { 0xa8, 0x00 },
+ { 0xc5, 0x11 },
+ { 0xc6, 0x51 },
+ { 0xbf, 0x80 },
+ { 0xc7, 0x10 },
+ { 0xb6, 0x66 },
+ { 0xb8, 0xA5 },
+ { 0xb7, 0x64 },
+ { 0xb9, 0x7C },
+ { 0xb3, 0xaf },
+ { 0xb4, 0x97 },
+ { 0xb5, 0xFF },
+ { 0xb0, 0xC5 },
+ { 0xb1, 0x94 },
+ { 0xb2, 0x0f },
+ { 0xc4, 0x5c },
+ { 0xa6, 0x00 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x1b },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0x7f, 0x00 },
+ { 0xe5, 0x1f },
+ { 0xe1, 0x77 },
+ { 0xdd, 0x7f },
+ { CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN | CTRL0_RGB_EN },
+ ENDMARKER,
+};
+
+/*
+ * register setting for window size
+ * The preamble setup the internal DSP to input a UXGA (1600x1200)
image,
+ * then the different zooming configurations will set up the output
image size.
+ */
+static const struct regval_list ov2640_size_change_preamble_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { RESET, RESET_DVP },
+ { HSIZE8, HSIZE8_SET(W_UXGA) }, { VSIZE8, VSIZE8_SET(H_UXGA) },
+ { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
+ CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
+ { HSIZE, HSIZE_SET(W_UXGA) }, { VSIZE, VSIZE_SET(H_UXGA) },
+ { XOFFL, XOFFL_SET(0) }, { YOFFL, YOFFL_SET(0) },
+ { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
+ VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
+ { TEST, TEST_HSIZE_SET(W_UXGA) },
+ ENDMARKER,
+};
+
+#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
+ { CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
+ CTRLI_H_DIV_SET(h_div)}, \
+ { ZMOW, ZMOW_OUTW_SET(x) }, { ZMOH, ZMOH_OUTH_SET(y) }, \
+ { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
+ { R_DVP_SP, pclk_div }, \
+ { RESET, 0x00}
+
+static const struct regval_list ov2640_qcif_regs[] = {
+ PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_qvga_regs[] = {
+ PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_cif_regs[] = {
+ PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_vga_regs[] = {
+ PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_svga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_xga_regs[] = {
+ PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_sxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_uxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+#define OV2640_SIZE(n, w, h, r) \
+ {.name = n, .width = w , .height = h, .regs = r }
+
+static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
+ OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
+ OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
+ OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
+ OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
+ OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
+ OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
+ OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
+ OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
+};
+
+/*
+ * Register settings for pixel formats
+ */
+static const struct regval_list ov2640_format_change_preamble_regs[] =
{
+ { BANK_SEL, BANK_SEL_DSP },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_yuv422_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
+ { 0xD7, 0x01 },
+ { 0x33, 0xa0 },
+ { 0xe1, 0x67 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_rgb565_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
+ { 0xd7, 0x03 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static enum v4l2_mbus_pixelcode ov2640_codes[] = {
+ V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+/*
+ * Supported controls
+ */
+static const struct v4l2_queryctrl ov2640_controls[] = {
+ {
+ .id = V4L2_CID_VFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Vertically",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }, {
+ .id = V4L2_CID_HFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Horizontally",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+};
+
+/*
+ * general functions
+ */
+static struct ov2640_priv *to_ov2640(const struct i2c_client *client)
+{
+ return container_of(i2c_get_clientdata(client), struct ov2640_priv,
+ subdev);
+}
+
+static int ov2640_write_array(struct i2c_client *client,
+ const struct regval_list *vals)
+{
+ int ret;
+
+ while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
+ ret = i2c_smbus_write_byte_data(client,
+ vals->reg_num,
+ vals->value & 0xFF);
+ dev_vdbg(&client->dev, "array: 0x%02x, 0x%02x",
+ vals->reg_num, vals->value & 0xFF);
+ if (ret < 0)
+ return ret;
+ vals++;
+ }
+ return 0;
+}
+
+static int ov2640_mask_set(struct i2c_client *client,
+ u8 reg, u8 mask, u8 set)
+{
+ s32 val = i2c_smbus_read_byte_data(client, reg);
+ if (val < 0)
+ return val;
+
+ val &= ~mask;
+ val |= set & mask;
+
+ dev_vdbg(&client->dev, "masks: 0x%02x, 0x%02x",
+ reg, val);
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static int ov2640_reset(struct i2c_client *client)
+{
+ int ret;
+ const struct regval_list reset_seq[] = {
+ {BANK_SEL, BANK_SEL_SENS},
+ {COM7, COM7_SRST},
+ ENDMARKER,
+ };
+
+ ret = ov2640_write_array(client, reset_seq);
+ if (ret)
+ goto err;
+
+ msleep(5);
+err:
+ dev_dbg(&client->dev, "%s: (ret %d)", __func__, ret);
+ return ret;
+}
+
+/*
+ * soc_camera_ops functions
+ */
+static int ov2640_s_stream(struct v4l2_subdev *sd, int enable)
+{
+ return 0;
+}
+
+static int ov2640_set_bus_param(struct soc_camera_device *icd,
+ unsigned long flags)
+{
+ return 0;
+}
+
+static unsigned long ov2640_query_bus_param(struct soc_camera_device
*icd)
+{
+ struct soc_camera_link *icl = to_soc_camera_link(icd);
+ unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+ SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
+
+ return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static int ov2640_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control
*ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ ctrl->value = priv->flag_vflip;
+ break;
+ case V4L2_CID_HFLIP:
+ ctrl->value = priv->flag_hflip;
+ break;
+ }
+ return 0;
+}
+
+static int ov2640_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control
*ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+ int ret = 0;
+ u8 val;
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ val = ctrl->value ? REG04_VFLIP_IMG : 0x00;
+ priv->flag_vflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_VFLIP_IMG, val);
+ break;
+ case V4L2_CID_HFLIP:
+ val = ctrl->value ? REG04_HFLIP_IMG : 0x00;
+ priv->flag_hflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_HFLIP_IMG, val);
+ break;
+ }
+
+ return ret;
+}
+
+static int ov2640_g_chip_ident(struct v4l2_subdev *sd,
+ struct v4l2_dbg_chip_ident *id)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ id->ident = priv->model;
+ id->revision = 0;
+
+ return 0;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov2640_g_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+ reg->size = 1;
+ if (reg->reg > 0xff)
+ return -EINVAL;
+
+ ret = i2c_smbus_read_byte_data(client, reg->reg);
+ if (ret < 0)
+ return ret;
+
+ reg->val = (__u64)ret;
+
+ return 0;
+}
+
+static int ov2640_s_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ if (reg->reg > 0xff ||
+ reg->val > 0xff)
+ return -EINVAL;
+
+ return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
+}
+#endif
+
+/* select nearest higher resolution for capture */
+static const struct ov2640_win_size *ov2640_select_win(u32 *width, u32
*height)
+{
+ int i, def = ARRAY_SIZE(ov2640_supported_win_sizes) - 1;
+
+ for (i = 0; i < ARRAY_SIZE(ov2640_supported_win_sizes); i++) {
+ if (ov2640_supported_win_sizes[i].width >= *width &&
+ ov2640_supported_win_sizes[i].height >= *height) {
+ *width = ov2640_supported_win_sizes[i].width;
+ *height = ov2640_supported_win_sizes[i].height;
+ return &ov2640_supported_win_sizes[i];
+ }
+ }
+
+ *width = ov2640_supported_win_sizes[def].width;
+ *height = ov2640_supported_win_sizes[def].height;
+ return &ov2640_supported_win_sizes[def];
+}
+
+static int ov2640_set_params(struct i2c_client *client, u32 *width, u32
*height,
+ enum v4l2_mbus_pixelcode code)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ const struct regval_list *selected_cfmt_regs;
+ int ret = -EINVAL;
+
+ /* select win */
+ priv->win = ov2640_select_win(width, height);
+
+ /* select format */
+ priv->cfmt_code = 0;
+ switch (code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
+ selected_cfmt_regs = ov2640_rgb565_regs;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
+ selected_cfmt_regs = ov2640_yuv422_regs;
+ }
+
+ /* reset hardware */
+ ov2640_reset(client);
+
+ dev_dbg(&client->dev, "%s: Init default", __func__);
+ /* Initialize the sensor with default data */
+ ret = ov2640_write_array(client, ov2640_init_regs);
+ if (ret < 0)
+ goto err;
+
+ dev_dbg(&client->dev, "%s: Set size to %s", __func__,
priv->win->name);
+ /* Select preamble */
+ ret = ov2640_write_array(client, ov2640_size_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set size win */
+ ret = ov2640_write_array(client, priv->win->regs);
+ if (ret < 0)
+ goto err;
+
+ dev_dbg(&client->dev, "%s: Set cfmt", __func__);
+ /* Cfmt preamble */
+ ret = ov2640_write_array(client, ov2640_format_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set cfmt */
+ ret = ov2640_write_array(client, selected_cfmt_regs);
+ if (ret < 0)
+ goto err;
+
+ priv->cfmt_code = code;
+ *width = priv->win->width;
+ *height = priv->win->height;
+
+ return ret;
+
+err:
+ dev_err(&client->dev, "%s: Error %d", __func__, ret);
+ ov2640_reset(client);
+ priv->win = NULL;
+
+ return ret;
+}
+
+static int ov2640_g_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ if (!priv->win) {
+ u32 width = W_SVGA, height = H_SVGA;
+ int ret = ov2640_set_params(client, &width, &height,
+ V4L2_MBUS_FMT_UYVY8_2X8);
+ if (ret < 0)
+ return ret;
+ }
+
+ mf->width = priv->win->width;
+ mf->height = priv->win->height;
+ mf->code = priv->cfmt_code;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+ mf->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+static int ov2640_s_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ ret = ov2640_set_params(client, &mf->width, &mf->height,
+ mf->code);
+
+ return ret;
+}
+
+static int ov2640_try_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ const struct ov2640_win_size *win;
+
+ /*
+ * select suitable win
+ */
+ win = ov2640_select_win(&mf->width, &mf->height);
+
+ mf->field = V4L2_FIELD_NONE;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ return 0;
+}
+
+static int ov2640_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+ enum v4l2_mbus_pixelcode *code)
+{
+ if (index >= ARRAY_SIZE(ov2640_codes))
+ return -EINVAL;
+
+ *code = ov2640_codes[index];
+ return 0;
+}
+
+static int ov2640_video_probe(struct soc_camera_device *icd,
+ struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ u8 pid, ver, midh, midl;
+ const char *devname;
+ int ret;
+
+ /*
+ * We must have a parent by now. And it cannot be a wrong one.
+ * So this entire test is completely redundant.
+ */
+ if (!icd->dev.parent ||
+ to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
+ dev_err(&client->dev, "Parent missing or invalid!\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ /*
+ * check and show product ID and manufacturer ID
+ */
+ i2c_smbus_write_byte_data(client, BANK_SEL, BANK_SEL_SENS);
+ pid = i2c_smbus_read_byte_data(client, PID);
+ ver = i2c_smbus_read_byte_data(client, VER);
+ midh = i2c_smbus_read_byte_data(client, MIDH);
+ midl = i2c_smbus_read_byte_data(client, MIDL);
+
+ switch (VERSION(pid, ver)) {
+ case PID_OV2640:
+ devname = "ov2640";
+ priv->model = V4L2_IDENT_OV2640;
+ break;
+ default:
+ dev_err(&client->dev,
+ "Product ID error %x:%x\n", pid, ver);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ dev_info(&client->dev,
+ "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
+ devname, pid, ver, midh, midl);
+
+ return 0;
+
+err:
+ return ret;
+}
+
+static struct soc_camera_ops ov2640_ops = {
+ .set_bus_param = ov2640_set_bus_param,
+ .query_bus_param = ov2640_query_bus_param,
+ .controls = ov2640_controls,
+ .num_controls = ARRAY_SIZE(ov2640_controls),
+};
+
+static struct v4l2_subdev_core_ops ov2640_subdev_core_ops = {
+ .g_ctrl = ov2640_g_ctrl,
+ .s_ctrl = ov2640_s_ctrl,
+ .g_chip_ident = ov2640_g_chip_ident,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = ov2640_g_register,
+ .s_register = ov2640_s_register,
+#endif
+};
+
+static struct v4l2_subdev_video_ops ov2640_subdev_video_ops = {
+ .s_stream = ov2640_s_stream,
+ .g_mbus_fmt = ov2640_g_fmt,
+ .s_mbus_fmt = ov2640_s_fmt,
+ .try_mbus_fmt = ov2640_try_fmt,
+ .enum_mbus_fmt = ov2640_enum_fmt,
+};
+
+static struct v4l2_subdev_ops ov2640_subdev_ops = {
+ .core = &ov2640_subdev_core_ops,
+ .video = &ov2640_subdev_video_ops,
+};
+
+/*
+ * i2c_driver functions
+ */
+static int ov2640_probe(struct i2c_client *client,
+ const struct i2c_device_id *did)
+{
+ struct ov2640_priv *priv;
+ struct soc_camera_device *icd = client->dev.platform_data;
+ struct i2c_adapter *adapter =
to_i2c_adapter(client->dev.parent);
+ struct soc_camera_link *icl;
+ int ret;
+
+ if (!icd) {
+ dev_err(&adapter->dev, "OV2640: missing soc-camera data!\n");
+ return -EINVAL;
+ }
+
+ icl = to_soc_camera_link(icd);
+ if (!icl) {
+ dev_err(&adapter->dev,
+ "OV2640: Missing platform_data for driver\n");
+ return -EINVAL;
+ }
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&adapter->dev,
+ "OV2640: I2C-Adapter doesn't support SMBUS\n");
+ return -EIO;
+ }
+
+ priv = kzalloc(sizeof(struct ov2640_priv), GFP_KERNEL);
+ if (!priv) {
+ dev_err(&adapter->dev,
+ "Failed to allocate memory for private data!\n");
+ return -ENOMEM;
+ }
+
+ priv->info = icl->priv;
+
+ v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops);
+
+ icd->ops = &ov2640_ops;
+
+ ret = ov2640_video_probe(icd, client);
+ if (ret) {
+ icd->ops = NULL;
+ kfree(priv);
+ } else {
+ dev_info(&adapter->dev, "OV2640 Probed\n");
+ }
+
+ return ret;
+}
+
+static int ov2640_remove(struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ struct soc_camera_device *icd = client->dev.platform_data;
+
+ icd->ops = NULL;
+ kfree(priv);
+ return 0;
+}
+
+static const struct i2c_device_id ov2640_id[] = {
+ { "ov2640", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ov2640_id);
+
+static struct i2c_driver ov2640_i2c_driver = {
+ .driver = {
+ .name = "ov2640",
+ },
+ .probe = ov2640_probe,
+ .remove = ov2640_remove,
+ .id_table = ov2640_id,
+};
+
+/*
+ * module functions
+ */
+static int __init ov2640_module_init(void)
+{
+ return i2c_add_driver(&ov2640_i2c_driver);
+}
+
+static void __exit ov2640_module_exit(void)
+{
+ i2c_del_driver(&ov2640_i2c_driver);
+}
+
+module_init(ov2640_module_init);
+module_exit(ov2640_module_exit);
+
+MODULE_DESCRIPTION("SoC Camera driver for Omni Vision 2640 sensor");
+MODULE_AUTHOR("Alberto Panizzo");
+MODULE_LICENSE("GPL v2");
diff --git a/include/media/v4l2-chip-ident.h
b/include/media/v4l2-chip-ident.h
index 51e89f2..44fe44e 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -74,6 +74,7 @@ enum {
V4L2_IDENT_SOI968 = 256,
V4L2_IDENT_OV9640 = 257,
V4L2_IDENT_OV6650 = 258,
+ V4L2_IDENT_OV2640 = 259,
/* module saa7146: reserved range 300-309 */
V4L2_IDENT_SAA7146 = 300,
--
1.6.3.3
On Sun, 28 Nov 2010, Alberto Panizzo wrote:
> In certain machines, camera devices are supplied directly
> by a number of regulators. This patch add the ability to drive
> these regulators directly by the soc_camera driver.
IIRC, there has been a discussion a while ago, how to supply power to
cameras by regulators. Someone has tried to provide a .power() hook in the
platform code, but the problem was the order of driver loading / probing.
So, how about doing the following:
1. in your platform code you register a notifier like
bus_register_notifier(&soc_camera_bus_type, &cam_notifier);
2. in your notifier you verify, that the driver is already available, or
request_module("my-regulator-driver"), and use another notifier to wait,
until the driver is probed.
3. if the above has been successful, in your .power() method you just use
the regulator as usual.
Notice, that your current patch doesn't load regulator driver modules, so,
it also relies on them being already available at the time of camera
probing. If you can live with that restriction, you can skip loading the
module and waiting for its probe above too.
The reasons why I do not want to add this to the core are: (1) I do not
want to have two methods for turning power on and off: a platform provided
.power() hook and and a set of regulators, (2) would anyone really want to
use several regulators for a camera sensor? If so, can it be the case,
that, for example, the regulators have to be switched off in the reverse
order to switching on? Or something else? (3) regulators can often do
more, than just set one of two power levels - for on and off. What if a
need arises to use other voltages?
Is there any really good reason, why we _have_ to do this in soc-camera
core?
Thanks
Guennadi
>
> What the machine code have to do to use this functionality is to:
> 1- Define a number of useful regulator supply descriptions such as:
>
> static struct regulator_consumer_supply camera_reg1_consumers[] = {
> ...
> REGULATOR_SUPPLY("camera_reg1", "soc-camera-pdrv.0"),
> ...
> };
>
> (Pay attention at the .N suffix of "soc-camera-pdrv" in case of
> a system with multiple cameras)
>
> 2- Define the list of regulators to bind to a specific instance of
> soc-camera-pdrv with their voltages:
>
> static struct soc_camera_regulator_desc soc_camera_regs[] = {
> SOCAM_REG_DESC("camera_reg1", 1300000, 1300000),
> SOCAM_REG_DESC("camera_reg2", 2800000, 2800000),
> ...
> };
>
> 3- Add the list to the corresponding soc_camera_link description:
>
> static struct soc_camera_link iclink_my_camera = {
> ...
> .soc_regulator_descs = soc_camera_regs,
> .num_soc_regulator_descs = ARRAY_SIZE(soc_camera_regs),
> };
>
> 4- And register it as usual with the platform device description:
>
> static struct platform_device machine_my_camera = {
> .name = "soc-camera-pdrv",
> .id = 0,
> .dev = {
> .platform_data = &iclink_my_camera,
> },
> };
>
> Signed-off-by: Alberto Panizzo <[email protected]>
> ---
> drivers/media/video/soc_camera.c | 135 +++++++++++++++++++++++++++++++------
> include/media/soc_camera.h | 16 +++++
> 2 files changed, 129 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
> index 43848a7..8fc5831 100644
> --- a/drivers/media/video/soc_camera.c
> +++ b/drivers/media/video/soc_camera.c
> @@ -43,6 +43,96 @@ static LIST_HEAD(hosts);
> static LIST_HEAD(devices);
> static DEFINE_MUTEX(list_lock); /* Protects the list of hosts */
>
> +static int soc_camera_setup_regulators(struct soc_camera_device *icd,
> + struct soc_camera_link *icl)
> +{
> + int i, ret;
> +
> + icd->soc_regulators = kzalloc(icl->num_soc_regulator_descs *
> + sizeof(struct regulator *), GFP_KERNEL);
> + if (!icd->soc_regulators) {
> + dev_err(icd->pdev, "Not enough memory.\n");
> + ret = -ENOMEM;
> + goto err;
> + }
> +
> + for (i = 0; i < icl->num_soc_regulator_descs; i++) {
> + dev_dbg(icd->pdev, "Looking for reg:'%s' bound to dev:'%s'",
> + icl->soc_regulator_descs[i].supply,
> + dev_name(icd->pdev));
> + icd->soc_regulators[i] = regulator_get(icd->pdev,
> + icl->soc_regulator_descs[i].supply);
> + if (IS_ERR(icd->soc_regulators[i])) {
> + icd->soc_regulators[i] = NULL;
> + dev_err(icd->pdev, "Unable to get regulator: \"%s\".\n",
> + icl->soc_regulator_descs[i].supply);
> + ret = -ENODEV;
> + goto free_regs;
> + }
> + }
> +
> + icd->num_soc_regulators = icl->num_soc_regulator_descs;
> +
> + return 0;
> +
> +free_regs:
> + for (i--; i >= 0; i--)
> + regulator_put(icd->soc_regulators[i]);
> +err:
> + return ret;
> +}
> +
> +static int soc_camera_power_set(struct soc_camera_device *icd,
> + struct soc_camera_link *icl,
> + int power_on)
> +{
> + int ret, i;
> +
> + for (i = 0; i < icd->num_soc_regulators; i++) {
> + if (power_on) {
> + ret = regulator_set_voltage(icd->soc_regulators[i],
> + icl->soc_regulator_descs[i].value_on_min,
> + icl->soc_regulator_descs[i].value_on_max);
> + if (ret) {
> + dev_err(icd->pdev, "Cannot set '%s' to %d:%d",
> + icl->soc_regulator_descs[i].supply,
> + icl->soc_regulator_descs[i].value_on_min,
> + icl->soc_regulator_descs[i].value_on_max);
> + goto err;
> + }
> +
> + ret = regulator_enable(icd->soc_regulators[i]);
> + if (ret < 0) {
> + dev_err(icd->pdev, "Cannot enable reg '%s'",
> + icl->soc_regulator_descs[i].supply);
> + goto err;
> + }
> + } else {
> + ret = regulator_disable(icd->soc_regulators[i]);
> + if (ret) {
> + dev_err(icd->pdev, "Cannot disable reg '%s'",
> + icl->soc_regulator_descs[i].supply);
> + goto err;
> + }
> + }
> + }
> +
> + if (icl->power) {
> + ret = icl->power(icd->pdev, power_on);
> + if (ret < 0) {
> + dev_err(icd->pdev,
> + "Platform failed to power-%s the camera.\n",
> + power_on ? "ON" : "OFF");
> + goto err;
> + }
> + }
> +
> + return 0;
> +
> +err:
> + return ret;
> +}
> +
> const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
> struct soc_camera_device *icd, unsigned int fourcc)
> {
> @@ -375,11 +465,9 @@ static int soc_camera_open(struct file *file)
> },
> };
>
> - if (icl->power) {
> - ret = icl->power(icd->pdev, 1);
> - if (ret < 0)
> - goto epower;
> - }
> + ret = soc_camera_power_set(icd, icl, 1);
> + if (ret < 0)
> + goto epower;
>
> /* The camera could have been already on, try to reset */
> if (icl->reset)
> @@ -425,8 +513,7 @@ esfmt:
> eresume:
> ici->ops->remove(icd);
> eiciadd:
> - if (icl->power)
> - icl->power(icd->pdev, 0);
> + soc_camera_power_set(icd, icl, 0);
> epower:
> icd->use_count--;
> mutex_unlock(&icd->video_lock);
> @@ -450,8 +537,7 @@ static int soc_camera_close(struct file *file)
>
> ici->ops->remove(icd);
>
> - if (icl->power)
> - icl->power(icd->pdev, 0);
> + soc_camera_power_set(icd, icl, 0);
> }
>
> if (icd->streamer == file)
> @@ -937,18 +1023,18 @@ static int soc_camera_probe(struct device *dev)
> struct device *control = NULL;
> struct v4l2_subdev *sd;
> struct v4l2_mbus_framefmt mf;
> - int ret;
> + int ret = 0, i;
>
> dev_info(dev, "Probing %s\n", dev_name(dev));
>
> - if (icl->power) {
> - ret = icl->power(icd->pdev, 1);
> - if (ret < 0) {
> - dev_err(dev,
> - "Platform failed to power-on the camera.\n");
> - goto epower;
> - }
> - }
> + if (icl->num_soc_regulator_descs)
> + ret = soc_camera_setup_regulators(icd, icl);
> + if (ret)
> + goto err;
> +
> + ret = soc_camera_power_set(icd, icl, 1);
> + if (ret < 0)
> + goto epower;
>
> /* The camera could have been already on, try to reset */
> if (icl->reset)
> @@ -1021,8 +1107,7 @@ static int soc_camera_probe(struct device *dev)
>
> ici->ops->remove(icd);
>
> - if (icl->power)
> - icl->power(icd->pdev, 0);
> + soc_camera_power_set(icd, icl, 0);
>
> mutex_unlock(&icd->video_lock);
>
> @@ -1044,9 +1129,11 @@ eadddev:
> evdc:
> ici->ops->remove(icd);
> eadd:
> - if (icl->power)
> - icl->power(icd->pdev, 0);
> + soc_camera_power_set(icd, icl, 0);
> epower:
> + for (i = icd->num_soc_regulators; i >= 0; i--)
> + regulator_put(icd->soc_regulators[i]);
> +err:
> return ret;
> }
>
> @@ -1059,6 +1146,7 @@ static int soc_camera_remove(struct device *dev)
> struct soc_camera_device *icd = to_soc_camera_dev(dev);
> struct soc_camera_link *icl = to_soc_camera_link(icd);
> struct video_device *vdev = icd->vdev;
> + int i;
>
> BUG_ON(!dev->parent);
>
> @@ -1081,6 +1169,9 @@ static int soc_camera_remove(struct device *dev)
> }
> soc_camera_free_user_formats(icd);
>
> + for (i = icd->num_soc_regulators; i >= 0; i--)
> + regulator_put(icd->soc_regulators[i]);
> +
> return 0;
> }
>
> diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
> index 86e3631..ae589a4 100644
> --- a/include/media/soc_camera.h
> +++ b/include/media/soc_camera.h
> @@ -15,6 +15,7 @@
> #include <linux/device.h>
> #include <linux/mutex.h>
> #include <linux/pm.h>
> +#include <linux/regulator/consumer.h>
> #include <linux/videodev2.h>
> #include <media/videobuf-core.h>
> #include <media/v4l2-device.h>
> @@ -45,6 +46,8 @@ struct soc_camera_device {
> struct mutex video_lock; /* Protects device data */
> struct file *streamer; /* stream owner */
> struct videobuf_queue vb_vidq;
> + struct regulator **soc_regulators;
> + int num_soc_regulators;
> };
>
> struct soc_camera_host {
> @@ -96,6 +99,15 @@ struct soc_camera_host_ops {
> #define SOCAM_SENSOR_INVERT_VSYNC (1 << 3)
> #define SOCAM_SENSOR_INVERT_DATA (1 << 4)
>
> +struct soc_camera_regulator_desc {
> + const char *supply;
> + int value_on_min;
> + int value_on_max;
> +};
> +
> +#define SOCAM_REG_DESC(s, min, max) \
> + { .supply = s , .value_on_min = min , .value_on_max = max }
> +
> struct i2c_board_info;
>
> struct soc_camera_link {
> @@ -108,6 +120,10 @@ struct soc_camera_link {
> const char *module_name;
> void *priv;
>
> + /* Optional regulators that have to be managed on power on/off events */
> + struct soc_camera_regulator_desc *soc_regulator_descs;
> + int num_soc_regulator_descs;
> +
> /*
> * For non-I2C devices platform platform has to provide methods to
> * add a device to the system and to remove
> --
> 1.6.3.3
>
>
>
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
Hi Guennadi,
On dom, 2010-11-28 at 20:05 +0100, Guennadi Liakhovetski wrote:
> On Sun, 28 Nov 2010, Alberto Panizzo wrote:
>
> > In certain machines, camera devices are supplied directly
> > by a number of regulators. This patch add the ability to drive
> > these regulators directly by the soc_camera driver.
>
> IIRC, there has been a discussion a while ago, how to supply power to
> cameras by regulators. Someone has tried to provide a .power() hook in the
> platform code, but the problem was the order of driver loading / probing.
> So, how about doing the following:
>
> 1. in your platform code you register a notifier like
> bus_register_notifier(&soc_camera_bus_type, &cam_notifier);
> 2. in your notifier you verify, that the driver is already available, or
> request_module("my-regulator-driver"), and use another notifier to wait,
> until the driver is probed.
> 3. if the above has been successful, in your .power() method you just use
> the regulator as usual.
>
> Notice, that your current patch doesn't load regulator driver modules, so,
> it also relies on them being already available at the time of camera
> probing. If you can live with that restriction, you can skip loading the
> module and waiting for its probe above too.
The reason I propose this implementation is because in a different
subsystem (mmc) the regulator management is similar and accepted.
In that case, platform code that drive regulators directly is not
considered successful and it is maintained a platform .power() function
that can manage other operations than regulators driving.
The power of binding regulators to devices, I think, is given by the
ability to fine manage these objects in terms of power management.
But of course you are right in some objections:
>
> The reasons why I do not want to add this to the core are: (1) I do not
> want to have two methods for turning power on and off: a platform provided
> .power() hook and and a set of regulators,
Why? The implementation I gave, abstract these power management actions
in a single layer. Of course I had to manage the way of passing
preferred voltage values and the results are not perfect.
> (2) would anyone really want to
> use several regulators for a camera sensor? If so, can it be the case,
> that, for example, the regulators have to be switched off in the reverse
> order to switching on? Or something else?
Well, I'm working on the i.MX31 3 Stack board support and there are 2
regulators that powers the camera and if you consider the digital output
that enable another supplier needed, the total regulators are three..
So, yes a list of regulators is needed in this case, and Yes I did not
considered the order of enabling and disabling operations. Just because
even the freescale drivers didn't.
A practical general rule is to turn off switchers in the reverse order
than the turning on one. And this can be easily implemented here.
But as you rose the question, we can add priorities of turning on and
off.
> (3) regulators can often do
> more, than just set one of two power levels - for on and off. What if a
> need arises to use other voltages?
Well, you are thinking at the possibility to have one camera that have
different voltage levels needs during the ON time (between open and a
close).
IMHO I think that this could be considered only if a power management
event happen and we decide that, in some way, the camera chip can be
maintained powered with a different voltage level instead of turning
it off and reinitializing it on resume.
Is this really the situation you are trying to address?
> Is there any really good reason, why we _have_ to do this in soc-camera
> core?
There are three options in regulators management:
1 Pure platform code.
2 Pure driver code.
3 subsystem code.
The first is the one you are suggesting me, but other subsystems
rejected it.
The third IMHO is better than the first but solve the needs of the
single driver.
The second is the one I proposed and I think is the best way because
add a general framework to manage regulators in this subsystem.
Thanks you!
Alberto!
> >
> > What the machine code have to do to use this functionality is to:
> > 1- Define a number of useful regulator supply descriptions such as:
> >
> > static struct regulator_consumer_supply camera_reg1_consumers[] = {
> > ...
> > REGULATOR_SUPPLY("camera_reg1", "soc-camera-pdrv.0"),
> > ...
> > };
> >
> > (Pay attention at the .N suffix of "soc-camera-pdrv" in case of
> > a system with multiple cameras)
> >
> > 2- Define the list of regulators to bind to a specific instance of
> > soc-camera-pdrv with their voltages:
> >
> > static struct soc_camera_regulator_desc soc_camera_regs[] = {
> > SOCAM_REG_DESC("camera_reg1", 1300000, 1300000),
> > SOCAM_REG_DESC("camera_reg2", 2800000, 2800000),
> > ...
> > };
> >
> > 3- Add the list to the corresponding soc_camera_link description:
> >
> > static struct soc_camera_link iclink_my_camera = {
> > ...
> > .soc_regulator_descs = soc_camera_regs,
> > .num_soc_regulator_descs = ARRAY_SIZE(soc_camera_regs),
> > };
> >
> > 4- And register it as usual with the platform device description:
> >
> > static struct platform_device machine_my_camera = {
> > .name = "soc-camera-pdrv",
> > .id = 0,
> > .dev = {
> > .platform_data = &iclink_my_camera,
> > },
> > };
> >
> > Signed-off-by: Alberto Panizzo <[email protected]>
> > ---
> > drivers/media/video/soc_camera.c | 135 +++++++++++++++++++++++++++++++------
> > include/media/soc_camera.h | 16 +++++
> > 2 files changed, 129 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
> > index 43848a7..8fc5831 100644
> > --- a/drivers/media/video/soc_camera.c
> > +++ b/drivers/media/video/soc_camera.c
> > @@ -43,6 +43,96 @@ static LIST_HEAD(hosts);
> > static LIST_HEAD(devices);
> > static DEFINE_MUTEX(list_lock); /* Protects the list of hosts */
> >
> > +static int soc_camera_setup_regulators(struct soc_camera_device *icd,
> > + struct soc_camera_link *icl)
> > +{
> > + int i, ret;
> > +
> > + icd->soc_regulators = kzalloc(icl->num_soc_regulator_descs *
> > + sizeof(struct regulator *), GFP_KERNEL);
> > + if (!icd->soc_regulators) {
> > + dev_err(icd->pdev, "Not enough memory.\n");
> > + ret = -ENOMEM;
> > + goto err;
> > + }
> > +
> > + for (i = 0; i < icl->num_soc_regulator_descs; i++) {
> > + dev_dbg(icd->pdev, "Looking for reg:'%s' bound to dev:'%s'",
> > + icl->soc_regulator_descs[i].supply,
> > + dev_name(icd->pdev));
> > + icd->soc_regulators[i] = regulator_get(icd->pdev,
> > + icl->soc_regulator_descs[i].supply);
> > + if (IS_ERR(icd->soc_regulators[i])) {
> > + icd->soc_regulators[i] = NULL;
> > + dev_err(icd->pdev, "Unable to get regulator: \"%s\".\n",
> > + icl->soc_regulator_descs[i].supply);
> > + ret = -ENODEV;
> > + goto free_regs;
> > + }
> > + }
> > +
> > + icd->num_soc_regulators = icl->num_soc_regulator_descs;
> > +
> > + return 0;
> > +
> > +free_regs:
> > + for (i--; i >= 0; i--)
> > + regulator_put(icd->soc_regulators[i]);
> > +err:
> > + return ret;
> > +}
> > +
> > +static int soc_camera_power_set(struct soc_camera_device *icd,
> > + struct soc_camera_link *icl,
> > + int power_on)
> > +{
> > + int ret, i;
> > +
> > + for (i = 0; i < icd->num_soc_regulators; i++) {
> > + if (power_on) {
> > + ret = regulator_set_voltage(icd->soc_regulators[i],
> > + icl->soc_regulator_descs[i].value_on_min,
> > + icl->soc_regulator_descs[i].value_on_max);
> > + if (ret) {
> > + dev_err(icd->pdev, "Cannot set '%s' to %d:%d",
> > + icl->soc_regulator_descs[i].supply,
> > + icl->soc_regulator_descs[i].value_on_min,
> > + icl->soc_regulator_descs[i].value_on_max);
> > + goto err;
> > + }
> > +
> > + ret = regulator_enable(icd->soc_regulators[i]);
> > + if (ret < 0) {
> > + dev_err(icd->pdev, "Cannot enable reg '%s'",
> > + icl->soc_regulator_descs[i].supply);
> > + goto err;
> > + }
> > + } else {
> > + ret = regulator_disable(icd->soc_regulators[i]);
> > + if (ret) {
> > + dev_err(icd->pdev, "Cannot disable reg '%s'",
> > + icl->soc_regulator_descs[i].supply);
> > + goto err;
> > + }
> > + }
> > + }
> > +
> > + if (icl->power) {
> > + ret = icl->power(icd->pdev, power_on);
> > + if (ret < 0) {
> > + dev_err(icd->pdev,
> > + "Platform failed to power-%s the camera.\n",
> > + power_on ? "ON" : "OFF");
> > + goto err;
> > + }
> > + }
> > +
> > + return 0;
> > +
> > +err:
> > + return ret;
> > +}
> > +
> > const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
> > struct soc_camera_device *icd, unsigned int fourcc)
> > {
> > @@ -375,11 +465,9 @@ static int soc_camera_open(struct file *file)
> > },
> > };
> >
> > - if (icl->power) {
> > - ret = icl->power(icd->pdev, 1);
> > - if (ret < 0)
> > - goto epower;
> > - }
> > + ret = soc_camera_power_set(icd, icl, 1);
> > + if (ret < 0)
> > + goto epower;
> >
> > /* The camera could have been already on, try to reset */
> > if (icl->reset)
> > @@ -425,8 +513,7 @@ esfmt:
> > eresume:
> > ici->ops->remove(icd);
> > eiciadd:
> > - if (icl->power)
> > - icl->power(icd->pdev, 0);
> > + soc_camera_power_set(icd, icl, 0);
> > epower:
> > icd->use_count--;
> > mutex_unlock(&icd->video_lock);
> > @@ -450,8 +537,7 @@ static int soc_camera_close(struct file *file)
> >
> > ici->ops->remove(icd);
> >
> > - if (icl->power)
> > - icl->power(icd->pdev, 0);
> > + soc_camera_power_set(icd, icl, 0);
> > }
> >
> > if (icd->streamer == file)
> > @@ -937,18 +1023,18 @@ static int soc_camera_probe(struct device *dev)
> > struct device *control = NULL;
> > struct v4l2_subdev *sd;
> > struct v4l2_mbus_framefmt mf;
> > - int ret;
> > + int ret = 0, i;
> >
> > dev_info(dev, "Probing %s\n", dev_name(dev));
> >
> > - if (icl->power) {
> > - ret = icl->power(icd->pdev, 1);
> > - if (ret < 0) {
> > - dev_err(dev,
> > - "Platform failed to power-on the camera.\n");
> > - goto epower;
> > - }
> > - }
> > + if (icl->num_soc_regulator_descs)
> > + ret = soc_camera_setup_regulators(icd, icl);
> > + if (ret)
> > + goto err;
> > +
> > + ret = soc_camera_power_set(icd, icl, 1);
> > + if (ret < 0)
> > + goto epower;
> >
> > /* The camera could have been already on, try to reset */
> > if (icl->reset)
> > @@ -1021,8 +1107,7 @@ static int soc_camera_probe(struct device *dev)
> >
> > ici->ops->remove(icd);
> >
> > - if (icl->power)
> > - icl->power(icd->pdev, 0);
> > + soc_camera_power_set(icd, icl, 0);
> >
> > mutex_unlock(&icd->video_lock);
> >
> > @@ -1044,9 +1129,11 @@ eadddev:
> > evdc:
> > ici->ops->remove(icd);
> > eadd:
> > - if (icl->power)
> > - icl->power(icd->pdev, 0);
> > + soc_camera_power_set(icd, icl, 0);
> > epower:
> > + for (i = icd->num_soc_regulators; i >= 0; i--)
> > + regulator_put(icd->soc_regulators[i]);
> > +err:
> > return ret;
> > }
> >
> > @@ -1059,6 +1146,7 @@ static int soc_camera_remove(struct device *dev)
> > struct soc_camera_device *icd = to_soc_camera_dev(dev);
> > struct soc_camera_link *icl = to_soc_camera_link(icd);
> > struct video_device *vdev = icd->vdev;
> > + int i;
> >
> > BUG_ON(!dev->parent);
> >
> > @@ -1081,6 +1169,9 @@ static int soc_camera_remove(struct device *dev)
> > }
> > soc_camera_free_user_formats(icd);
> >
> > + for (i = icd->num_soc_regulators; i >= 0; i--)
> > + regulator_put(icd->soc_regulators[i]);
> > +
> > return 0;
> > }
> >
> > diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
> > index 86e3631..ae589a4 100644
> > --- a/include/media/soc_camera.h
> > +++ b/include/media/soc_camera.h
> > @@ -15,6 +15,7 @@
> > #include <linux/device.h>
> > #include <linux/mutex.h>
> > #include <linux/pm.h>
> > +#include <linux/regulator/consumer.h>
> > #include <linux/videodev2.h>
> > #include <media/videobuf-core.h>
> > #include <media/v4l2-device.h>
> > @@ -45,6 +46,8 @@ struct soc_camera_device {
> > struct mutex video_lock; /* Protects device data */
> > struct file *streamer; /* stream owner */
> > struct videobuf_queue vb_vidq;
> > + struct regulator **soc_regulators;
> > + int num_soc_regulators;
> > };
> >
> > struct soc_camera_host {
> > @@ -96,6 +99,15 @@ struct soc_camera_host_ops {
> > #define SOCAM_SENSOR_INVERT_VSYNC (1 << 3)
> > #define SOCAM_SENSOR_INVERT_DATA (1 << 4)
> >
> > +struct soc_camera_regulator_desc {
> > + const char *supply;
> > + int value_on_min;
> > + int value_on_max;
> > +};
> > +
> > +#define SOCAM_REG_DESC(s, min, max) \
> > + { .supply = s , .value_on_min = min , .value_on_max = max }
> > +
> > struct i2c_board_info;
> >
> > struct soc_camera_link {
> > @@ -108,6 +120,10 @@ struct soc_camera_link {
> > const char *module_name;
> > void *priv;
> >
> > + /* Optional regulators that have to be managed on power on/off events */
> > + struct soc_camera_regulator_desc *soc_regulator_descs;
> > + int num_soc_regulator_descs;
> > +
> > /*
> > * For non-I2C devices platform platform has to provide methods to
> > * add a device to the system and to remove
> > --
> > 1.6.3.3
> >
> >
> >
>
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
--
Alberto!
Be Persistent!
- Greg Kroah-Hartman (FOSDEM 2010)
On Sun, Nov 28, 2010 at 08:05:06PM +0100, Guennadi Liakhovetski wrote:
> On Sun, 28 Nov 2010, Alberto Panizzo wrote:
> > In certain machines, camera devices are supplied directly
> > by a number of regulators. This patch add the ability to drive
> > these regulators directly by the soc_camera driver.
> IIRC, there has been a discussion a while ago, how to supply power to
> cameras by regulators. Someone has tried to provide a .power() hook in the
> platform code, but the problem was the order of driver loading / probing.
> So, how about doing the following:
> 1. in your platform code you register a notifier like
> bus_register_notifier(&soc_camera_bus_type, &cam_notifier);
FWIW I'm looking at implementing a standard regulator API feature along
these lines in the background. This should hopefully mean we don't need
driver support for most simple power control applications. No ETA yet.
> The reasons why I do not want to add this to the core are: (1) I do not
> want to have two methods for turning power on and off: a platform provided
> .power() hook and and a set of regulators, (2) would anyone really want to
> use several regulators for a camera sensor? If so, can it be the case,
> that, for example, the regulators have to be switched off in the reverse
> order to switching on? Or something else? (3) regulators can often do
> more, than just set one of two power levels - for on and off. What if a
> need arises to use other voltages?
The way MMC handled this was to provide a standard version of the hook
in the core which could be used by platforms with regulators supplying
the device - they just assign the appropriate function as their power()
operation AIUI. That seems a fairly clean way of keeping stuff in the
core without giving up the flexibility.
> Is there any really good reason, why we _have_ to do this in soc-camera
> core?
It does save everyone open coding stuff.
On Mon, Nov 29, 2010 at 10:34:57AM +0100, Alberto Panizzo wrote:
> On dom, 2010-11-28 at 20:05 +0100, Guennadi Liakhovetski wrote:
> > (2) would anyone really want to
> > use several regulators for a camera sensor? If so, can it be the case,
> > that, for example, the regulators have to be switched off in the reverse
> > order to switching on? Or something else?
> Well, I'm working on the i.MX31 3 Stack board support and there are 2
> regulators that powers the camera and if you consider the digital output
> that enable another supplier needed, the total regulators are three..
> So, yes a list of regulators is needed in this case, and Yes I did not
> considered the order of enabling and disabling operations. Just because
> even the freescale drivers didn't.
> A practical general rule is to turn off switchers in the reverse order
> than the turning on one. And this can be easily implemented here.
> But as you rose the question, we can add priorities of turning on and
> off.
If you use the regulator bulk API it'll reverse the ordering when doing
the power down (or should if it doesn't already).
> > > +static int soc_camera_power_set(struct soc_camera_device *icd,
> > > + struct soc_camera_link *icl,
> > > + int power_on)
> > > +{
> > > + int ret, i;
> > > +
> > > + for (i = 0; i < icd->num_soc_regulators; i++) {
> > > + if (power_on) {
> > > + ret = regulator_set_voltage(icd->soc_regulators[i],
> > > + icl->soc_regulator_descs[i].value_on_min,
> > > + icl->soc_regulator_descs[i].value_on_max);
Unless you're actively varying the voltages at runtime (as Guennadi
mentioned) I'd really expect the voltages to be handled by the regulator
constraints.
On lun, 2010-11-29 at 15:51 +0000, Mark Brown wrote:
> On Mon, Nov 29, 2010 at 10:34:57AM +0100, Alberto Panizzo wrote:
> > On dom, 2010-11-28 at 20:05 +0100, Guennadi Liakhovetski wrote:
>
> > > (2) would anyone really want to
> > > use several regulators for a camera sensor? If so, can it be the case,
> > > that, for example, the regulators have to be switched off in the reverse
> > > order to switching on? Or something else?
>
> > Well, I'm working on the i.MX31 3 Stack board support and there are 2
> > regulators that powers the camera and if you consider the digital output
> > that enable another supplier needed, the total regulators are three..
> > So, yes a list of regulators is needed in this case, and Yes I did not
> > considered the order of enabling and disabling operations. Just because
> > even the freescale drivers didn't.
>
> > A practical general rule is to turn off switchers in the reverse order
> > than the turning on one. And this can be easily implemented here.
> > But as you rose the question, we can add priorities of turning on and
> > off.
>
> If you use the regulator bulk API it'll reverse the ordering when doing
> the power down (or should if it doesn't already).
Great API regulator_bulk, let's get it a try! ..I was reinventing the
hot water..
>
> > > > +static int soc_camera_power_set(struct soc_camera_device *icd,
> > > > + struct soc_camera_link *icl,
> > > > + int power_on)
> > > > +{
> > > > + int ret, i;
> > > > +
> > > > + for (i = 0; i < icd->num_soc_regulators; i++) {
> > > > + if (power_on) {
> > > > + ret = regulator_set_voltage(icd->soc_regulators[i],
> > > > + icl->soc_regulator_descs[i].value_on_min,
> > > > + icl->soc_regulator_descs[i].value_on_max);
>
> Unless you're actively varying the voltages at runtime (as Guennadi
> mentioned) I'd really expect the voltages to be handled by the regulator
> constraints.
This is sane thinking at a static board configuration. What if a single
board have different deploying schemas where two different cameras can
be placed on the same connector and these cameras have different voltage
levels for core supply? This scenario will require two different
constraints chosen at compile time -> two different kernel binaries.
Otherwise constraints will always pick the minimum level and maybe this
will not be enough.
Best regards,
--
Alberto!
Be Persistent!
- Greg Kroah-Hartman (FOSDEM 2010)
On Tue, Nov 30, 2010 at 11:45:23AM +0100, Alberto Panizzo wrote:
> On lun, 2010-11-29 at 15:51 +0000, Mark Brown wrote:
> > Unless you're actively varying the voltages at runtime (as Guennadi
> > mentioned) I'd really expect the voltages to be handled by the regulator
> > constraints.
> This is sane thinking at a static board configuration. What if a single
> board have different deploying schemas where two different cameras can
> be placed on the same connector and these cameras have different voltage
> levels for core supply? This scenario will require two different
> constraints chosen at compile time -> two different kernel binaries.
> Otherwise constraints will always pick the minimum level and maybe this
> will not be enough.
The way I'd expect to see that handled is that the constraints would be
chosen when the module is detected, possibly by having a platform device
representing the assembly as a whole. There was someone working with
plugin modules doing something along those lines. I certainly wouldn't
expect the device itself to worry about this unless it was actively
doing something to manage the voltage.
On dom, 2010-11-28 at 18:24 +0100, Alberto Panizzo wrote:
> This patch is tested and works with the OV2640 camera that output
> YUV422 (UYVY) and RGB565 data.
>
> The YUV422 format is managed to be converted in IPU internal YUV444 format
> so this stream could be used in the future to feed directly other IPU
> blocks.
> The RGB565 format is managed as GENERIC and can be moved only from CSI
> to memory.
>
> Signed-off-by: Alberto Panizzo <[email protected]>
> ---
>
> Before applying, please give me feedback if this break in some way other
> pixel formats!
>
>
Hi Guennadi,
Have you got time to test this patch?
I think that this will solve the problems that lead to the need of
translating the 10 bits mbus codes to the corresponding 8 bit ones.
Best regards,
Alberto!
> drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> 1 files changed, 110 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> index 29c5fc3..6811d6f 100644
> --- a/drivers/media/video/mx3_camera.c
> +++ b/drivers/media/video/mx3_camera.c
> @@ -55,6 +55,31 @@
> #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
>
> +/*
> + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> + * 1 YUV 4:4:4 or RGB—8 bits per color component
> + * 2 YUV 4:4:4 or RGB—10 bits per color component
> + * 3 Generic data (from sensor to the system memory only)
> + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> + * recognized by IPU blocks.
> + *
> + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> + * align (or rearrange) the sampled data to fit the IPU supported formats
> + * as follows:
> + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> + * The CSI output in this case can feed other IPU blocks.
> + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> + * 2 components of width DATA_WIDTH were the first is the alternating U V
> + * components and the second is Y. It construct the YUV444 word repeating
> + * the previous U, V samples aligning the results to a 32 bit word.
> + * The CSI output in this case can feed other IPU blocks.
> + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> + * The sensor data is given as is, considering _every sample_ as a pixel
> + * data. This format (combined with the GENERIC IPU pixel formats) can
> + * carry all the other sensor pixel formats to the system memory.
> + * The CSI output in this case _can not_ feed other IPU blocks.
> + */
> #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> {
> /* Add more formats as need arises and test possibilities appear... */
> switch (fourcc) {
> - case V4L2_PIX_FMT_RGB565:
> - return IPU_PIX_FMT_RGB565;
> case V4L2_PIX_FMT_RGB24:
> return IPU_PIX_FMT_RGB24;
> + case V4L2_PIX_FMT_UYVY:
> + return IPU_PIX_FMT_UYVY;
> + case V4L2_PIX_FMT_RGB565:
> case V4L2_PIX_FMT_RGB332:
> - return IPU_PIX_FMT_RGB332;
> - case V4L2_PIX_FMT_YUV422P:
> - return IPU_PIX_FMT_YVU422P;
> default:
> return IPU_PIX_FMT_GENERIC;
> }
> @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
>
> /* This is the configuration of one sg-element */
> video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> - video->out_width = icd->user_width;
> - video->out_height = icd->user_height;
> - video->out_stride = icd->user_width;
> +
> + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> + /*
> + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> + * video->out_width and stride to the correct unit.
> + */
> + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> + icd->current_fmt->host_fmt);
> + BUG_ON(bytes_per_line <= 0);
> +
> + video->out_width = bytes_per_line;
> + video->out_height = icd->user_height;
> + video->out_stride = bytes_per_line;
> + } else {
> + /* For IPU known formats the pixel unit is OK */
> + video->out_width = icd->user_width;
> + video->out_height = icd->user_height;
> + video->out_stride = icd->user_width;
> + }
>
> #ifdef DEBUG
> /* helps to see what DMA actually has written */
> @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> if (xlate) {
> xlate->host_fmt = fmt;
> xlate->code = code;
> + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> xlate++;
> - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> - xlate->host_fmt->fourcc);
> }
>
> return formats;
> }
>
> +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> +{
> + switch (mcode) {
> + case V4L2_MBUS_FMT_YUYV8_2X8:
> + case V4L2_MBUS_FMT_YVYU8_2X8:
> + case V4L2_MBUS_FMT_VYUY8_2X8:
> + case V4L2_MBUS_FMT_YVYU10_2X10:
> + case V4L2_MBUS_FMT_YUYV10_2X10:
> + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> + return 2;
> + case V4L2_MBUS_FMT_SBGGR8_1X8:
> + case V4L2_MBUS_FMT_SBGGR10_1X10:
> + case V4L2_MBUS_FMT_GREY8_1X8:
> + case V4L2_MBUS_FMT_Y10_1X10:
> + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
> + case V4L2_MBUS_FMT_SGRBG8_1X8:
> + return 1;
> + default:
> + /* Add other pixel codes as needed */
> + return 0;
> + }
> +}
> +
> static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> - unsigned int width, unsigned int height)
> + unsigned int width, unsigned int height,
> + enum v4l2_mbus_pixelcode code)
> {
> u32 ctrl, width_field, height_field;
> + const struct soc_mbus_pixelfmt *fmt;
> +
> + fmt = soc_mbus_get_fmtdesc(code);
> + BUG_ON(!fmt);
> +
> + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> + /*
> + * As we don't have an IPU native format, the CSI will be
> + * configured to output BAYER and here we need to convert
> + * geometry unit from pixels to samples.
> + * TODO: Support vertical down sampling (YUV420)
> + */
> + width = width * samples_per_pixel(code);
> + BUG_ON(!width);
> + }
>
> /* Setup frame size - this cannot be changed on-the-fly... */
> width_field = width - 1;
> @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> return ret;
> }
>
> - configure_geometry(mx3_cam, mf.width, mf.height);
> + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> }
>
> dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> * mxc_v4l2_s_fmt()
> */
>
> - configure_geometry(mx3_cam, pix->width, pix->height);
> + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
>
> mf.width = pix->width;
> mf.height = pix->height;
> @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
>
> - /* TODO: Support RGB and YUV formats */
> + /* TODO: Support RGB_YUV444 formats */
>
> - /* This has been set in mx3_camera_activate(), but we clear it above */
> - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> + switch (xlate->code) {
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> + break;
> + default:
> + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> + }
>
> if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
--
Alberto!
Be Persistent!
- Greg Kroah-Hartman (FOSDEM 2010)
On Tue, 30 Nov 2010, Alberto Panizzo wrote:
> On dom, 2010-11-28 at 18:24 +0100, Alberto Panizzo wrote:
> > This patch is tested and works with the OV2640 camera that output
> > YUV422 (UYVY) and RGB565 data.
> >
> > The YUV422 format is managed to be converted in IPU internal YUV444 format
> > so this stream could be used in the future to feed directly other IPU
> > blocks.
> > The RGB565 format is managed as GENERIC and can be moved only from CSI
> > to memory.
> >
> > Signed-off-by: Alberto Panizzo <[email protected]>
> > ---
> >
> > Before applying, please give me feedback if this break in some way other
> > pixel formats!
> >
> >
>
> Hi Guennadi,
> Have you got time to test this patch?
> I think that this will solve the problems that lead to the need of
> translating the 10 bits mbus codes to the corresponding 8 bit ones.
Yes, I certainly will review and (hopefully) test this patch, just,
please, give me some time. Since this is 2.6.38 material anyway, we still
have a bit of time.
Thanks
Guennadi
>
> Best regards,
> Alberto!
>
> > drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> > 1 files changed, 110 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> > index 29c5fc3..6811d6f 100644
> > --- a/drivers/media/video/mx3_camera.c
> > +++ b/drivers/media/video/mx3_camera.c
> > @@ -55,6 +55,31 @@
> > #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> > #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
> >
> > +/*
> > + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> > + * 1 YUV 4:4:4 or RGB—8 bits per color component
> > + * 2 YUV 4:4:4 or RGB—10 bits per color component
> > + * 3 Generic data (from sensor to the system memory only)
> > + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> > + * recognized by IPU blocks.
> > + *
> > + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> > + * align (or rearrange) the sampled data to fit the IPU supported formats
> > + * as follows:
> > + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> > + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> > + * The CSI output in this case can feed other IPU blocks.
> > + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> > + * 2 components of width DATA_WIDTH were the first is the alternating U V
> > + * components and the second is Y. It construct the YUV444 word repeating
> > + * the previous U, V samples aligning the results to a 32 bit word.
> > + * The CSI output in this case can feed other IPU blocks.
> > + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> > + * The sensor data is given as is, considering _every sample_ as a pixel
> > + * data. This format (combined with the GENERIC IPU pixel formats) can
> > + * carry all the other sensor pixel formats to the system memory.
> > + * The CSI output in this case _can not_ feed other IPU blocks.
> > + */
> > #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> > {
> > /* Add more formats as need arises and test possibilities appear... */
> > switch (fourcc) {
> > - case V4L2_PIX_FMT_RGB565:
> > - return IPU_PIX_FMT_RGB565;
> > case V4L2_PIX_FMT_RGB24:
> > return IPU_PIX_FMT_RGB24;
> > + case V4L2_PIX_FMT_UYVY:
> > + return IPU_PIX_FMT_UYVY;
> > + case V4L2_PIX_FMT_RGB565:
> > case V4L2_PIX_FMT_RGB332:
> > - return IPU_PIX_FMT_RGB332;
> > - case V4L2_PIX_FMT_YUV422P:
> > - return IPU_PIX_FMT_YVU422P;
> > default:
> > return IPU_PIX_FMT_GENERIC;
> > }
> > @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
> >
> > /* This is the configuration of one sg-element */
> > video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> > - video->out_width = icd->user_width;
> > - video->out_height = icd->user_height;
> > - video->out_stride = icd->user_width;
> > +
> > + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> > + /*
> > + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> > + * video->out_width and stride to the correct unit.
> > + */
> > + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> > + icd->current_fmt->host_fmt);
> > + BUG_ON(bytes_per_line <= 0);
> > +
> > + video->out_width = bytes_per_line;
> > + video->out_height = icd->user_height;
> > + video->out_stride = bytes_per_line;
> > + } else {
> > + /* For IPU known formats the pixel unit is OK */
> > + video->out_width = icd->user_width;
> > + video->out_height = icd->user_height;
> > + video->out_stride = icd->user_width;
> > + }
> >
> > #ifdef DEBUG
> > /* helps to see what DMA actually has written */
> > @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> > if (xlate) {
> > xlate->host_fmt = fmt;
> > xlate->code = code;
> > + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> > + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> > xlate++;
> > - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> > - xlate->host_fmt->fourcc);
> > }
> >
> > return formats;
> > }
> >
> > +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> > +{
> > + switch (mcode) {
> > + case V4L2_MBUS_FMT_YUYV8_2X8:
> > + case V4L2_MBUS_FMT_YVYU8_2X8:
> > + case V4L2_MBUS_FMT_VYUY8_2X8:
> > + case V4L2_MBUS_FMT_YVYU10_2X10:
> > + case V4L2_MBUS_FMT_YUYV10_2X10:
> > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> > + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> > + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> > + return 2;
> > + case V4L2_MBUS_FMT_SBGGR8_1X8:
> > + case V4L2_MBUS_FMT_SBGGR10_1X10:
> > + case V4L2_MBUS_FMT_GREY8_1X8:
> > + case V4L2_MBUS_FMT_Y10_1X10:
> > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
> > + case V4L2_MBUS_FMT_SGRBG8_1X8:
> > + return 1;
> > + default:
> > + /* Add other pixel codes as needed */
> > + return 0;
> > + }
> > +}
> > +
> > static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> > - unsigned int width, unsigned int height)
> > + unsigned int width, unsigned int height,
> > + enum v4l2_mbus_pixelcode code)
> > {
> > u32 ctrl, width_field, height_field;
> > + const struct soc_mbus_pixelfmt *fmt;
> > +
> > + fmt = soc_mbus_get_fmtdesc(code);
> > + BUG_ON(!fmt);
> > +
> > + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> > + /*
> > + * As we don't have an IPU native format, the CSI will be
> > + * configured to output BAYER and here we need to convert
> > + * geometry unit from pixels to samples.
> > + * TODO: Support vertical down sampling (YUV420)
> > + */
> > + width = width * samples_per_pixel(code);
> > + BUG_ON(!width);
> > + }
> >
> > /* Setup frame size - this cannot be changed on-the-fly... */
> > width_field = width - 1;
> > @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> > return ret;
> > }
> >
> > - configure_geometry(mx3_cam, mf.width, mf.height);
> > + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> > }
> >
> > dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> > @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> > * mxc_v4l2_s_fmt()
> > */
> >
> > - configure_geometry(mx3_cam, pix->width, pix->height);
> > + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
> >
> > mf.width = pix->width;
> > mf.height = pix->height;
> > @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> > (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> > (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
> >
> > - /* TODO: Support RGB and YUV formats */
> > + /* TODO: Support RGB_YUV444 formats */
> >
> > - /* This has been set in mx3_camera_activate(), but we clear it above */
> > - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > + switch (xlate->code) {
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> > + break;
> > + default:
> > + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > + }
> >
> > if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> > sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
>
>
> --
> Alberto!
>
> Be Persistent!
> - Greg Kroah-Hartman (FOSDEM 2010)
>
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
On mar, 2010-11-30 at 15:31 +0100, Guennadi Liakhovetski wrote:
> On Tue, 30 Nov 2010, Alberto Panizzo wrote:
>
> > On dom, 2010-11-28 at 18:24 +0100, Alberto Panizzo wrote:
> > > This patch is tested and works with the OV2640 camera that output
> > > YUV422 (UYVY) and RGB565 data.
> > >
> > > The YUV422 format is managed to be converted in IPU internal YUV444 format
> > > so this stream could be used in the future to feed directly other IPU
> > > blocks.
> > > The RGB565 format is managed as GENERIC and can be moved only from CSI
> > > to memory.
> > >
> > > Signed-off-by: Alberto Panizzo <[email protected]>
> > > ---
> > >
> > > Before applying, please give me feedback if this break in some way other
> > > pixel formats!
> > >
> > >
> >
> > Hi Guennadi,
> > Have you got time to test this patch?
> > I think that this will solve the problems that lead to the need of
> > translating the 10 bits mbus codes to the corresponding 8 bit ones.
>
> Yes, I certainly will review and (hopefully) test this patch, just,
> please, give me some time. Since this is 2.6.38 material anyway, we still
> have a bit of time.
Of course! no problems.
Thanks,
Alberto!
> >
> > > drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> > > 1 files changed, 110 insertions(+), 16 deletions(-)
> > >
> > > diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> > > index 29c5fc3..6811d6f 100644
> > > --- a/drivers/media/video/mx3_camera.c
> > > +++ b/drivers/media/video/mx3_camera.c
> > > @@ -55,6 +55,31 @@
> > > #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> > > #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
> > >
> > > +/*
> > > + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> > > + * 1 YUV 4:4:4 or RGB—8 bits per color component
> > > + * 2 YUV 4:4:4 or RGB—10 bits per color component
> > > + * 3 Generic data (from sensor to the system memory only)
> > > + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> > > + * recognized by IPU blocks.
> > > + *
> > > + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> > > + * align (or rearrange) the sampled data to fit the IPU supported formats
> > > + * as follows:
> > > + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> > > + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> > > + * The CSI output in this case can feed other IPU blocks.
> > > + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> > > + * 2 components of width DATA_WIDTH were the first is the alternating U V
> > > + * components and the second is Y. It construct the YUV444 word repeating
> > > + * the previous U, V samples aligning the results to a 32 bit word.
> > > + * The CSI output in this case can feed other IPU blocks.
> > > + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> > > + * The sensor data is given as is, considering _every sample_ as a pixel
> > > + * data. This format (combined with the GENERIC IPU pixel formats) can
> > > + * carry all the other sensor pixel formats to the system memory.
> > > + * The CSI output in this case _can not_ feed other IPU blocks.
> > > + */
> > > #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> > > {
> > > /* Add more formats as need arises and test possibilities appear... */
> > > switch (fourcc) {
> > > - case V4L2_PIX_FMT_RGB565:
> > > - return IPU_PIX_FMT_RGB565;
> > > case V4L2_PIX_FMT_RGB24:
> > > return IPU_PIX_FMT_RGB24;
> > > + case V4L2_PIX_FMT_UYVY:
> > > + return IPU_PIX_FMT_UYVY;
> > > + case V4L2_PIX_FMT_RGB565:
> > > case V4L2_PIX_FMT_RGB332:
> > > - return IPU_PIX_FMT_RGB332;
> > > - case V4L2_PIX_FMT_YUV422P:
> > > - return IPU_PIX_FMT_YVU422P;
> > > default:
> > > return IPU_PIX_FMT_GENERIC;
> > > }
> > > @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
> > >
> > > /* This is the configuration of one sg-element */
> > > video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> > > - video->out_width = icd->user_width;
> > > - video->out_height = icd->user_height;
> > > - video->out_stride = icd->user_width;
> > > +
> > > + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> > > + /*
> > > + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> > > + * video->out_width and stride to the correct unit.
> > > + */
> > > + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> > > + icd->current_fmt->host_fmt);
> > > + BUG_ON(bytes_per_line <= 0);
> > > +
> > > + video->out_width = bytes_per_line;
> > > + video->out_height = icd->user_height;
> > > + video->out_stride = bytes_per_line;
> > > + } else {
> > > + /* For IPU known formats the pixel unit is OK */
> > > + video->out_width = icd->user_width;
> > > + video->out_height = icd->user_height;
> > > + video->out_stride = icd->user_width;
> > > + }
> > >
> > > #ifdef DEBUG
> > > /* helps to see what DMA actually has written */
> > > @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> > > if (xlate) {
> > > xlate->host_fmt = fmt;
> > > xlate->code = code;
> > > + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> > > + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> > > xlate++;
> > > - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> > > - xlate->host_fmt->fourcc);
> > > }
> > >
> > > return formats;
> > > }
> > >
> > > +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> > > +{
> > > + switch (mcode) {
> > > + case V4L2_MBUS_FMT_YUYV8_2X8:
> > > + case V4L2_MBUS_FMT_YVYU8_2X8:
> > > + case V4L2_MBUS_FMT_VYUY8_2X8:
> > > + case V4L2_MBUS_FMT_YVYU10_2X10:
> > > + case V4L2_MBUS_FMT_YUYV10_2X10:
> > > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> > > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> > > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > > + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> > > + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> > > + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> > > + return 2;
> > > + case V4L2_MBUS_FMT_SBGGR8_1X8:
> > > + case V4L2_MBUS_FMT_SBGGR10_1X10:
> > > + case V4L2_MBUS_FMT_GREY8_1X8:
> > > + case V4L2_MBUS_FMT_Y10_1X10:
> > > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
> > > + case V4L2_MBUS_FMT_SGRBG8_1X8:
> > > + return 1;
> > > + default:
> > > + /* Add other pixel codes as needed */
> > > + return 0;
> > > + }
> > > +}
> > > +
> > > static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> > > - unsigned int width, unsigned int height)
> > > + unsigned int width, unsigned int height,
> > > + enum v4l2_mbus_pixelcode code)
> > > {
> > > u32 ctrl, width_field, height_field;
> > > + const struct soc_mbus_pixelfmt *fmt;
> > > +
> > > + fmt = soc_mbus_get_fmtdesc(code);
> > > + BUG_ON(!fmt);
> > > +
> > > + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> > > + /*
> > > + * As we don't have an IPU native format, the CSI will be
> > > + * configured to output BAYER and here we need to convert
> > > + * geometry unit from pixels to samples.
> > > + * TODO: Support vertical down sampling (YUV420)
> > > + */
> > > + width = width * samples_per_pixel(code);
> > > + BUG_ON(!width);
> > > + }
> > >
> > > /* Setup frame size - this cannot be changed on-the-fly... */
> > > width_field = width - 1;
> > > @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> > > return ret;
> > > }
> > >
> > > - configure_geometry(mx3_cam, mf.width, mf.height);
> > > + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> > > }
> > >
> > > dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> > > @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> > > * mxc_v4l2_s_fmt()
> > > */
> > >
> > > - configure_geometry(mx3_cam, pix->width, pix->height);
> > > + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
> > >
> > > mf.width = pix->width;
> > > mf.height = pix->height;
> > > @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> > > (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> > > (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
> > >
> > > - /* TODO: Support RGB and YUV formats */
> > > + /* TODO: Support RGB_YUV444 formats */
> > >
> > > - /* This has been set in mx3_camera_activate(), but we clear it above */
> > > - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > > + switch (xlate->code) {
> > > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > > + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> > > + break;
> > > + default:
> > > + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > > + }
> > >
> > > if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> > > sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> >
> >
> > --
> > Alberto!
> >
> > Be Persistent!
> > - Greg Kroah-Hartman (FOSDEM 2010)
> >
>
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
On Sun, 28 Nov 2010, Alberto Panizzo wrote:
> This patch is tested and works with the OV2640 camera that output
> YUV422 (UYVY) and RGB565 data.
>
> The YUV422 format is managed to be converted in IPU internal YUV444 format
> so this stream could be used in the future to feed directly other IPU
> blocks.
> The RGB565 format is managed as GENERIC and can be moved only from CSI
> to memory.
>
> Signed-off-by: Alberto Panizzo <[email protected]>
> ---
>
> Before applying, please give me feedback if this break in some way other
> pixel formats!
>
>
> drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> 1 files changed, 110 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> index 29c5fc3..6811d6f 100644
> --- a/drivers/media/video/mx3_camera.c
> +++ b/drivers/media/video/mx3_camera.c
> @@ -55,6 +55,31 @@
> #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
>
> +/*
> + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> + * 1 YUV 4:4:4 or RGB—8 bits per color component
> + * 2 YUV 4:4:4 or RGB—10 bits per color component
> + * 3 Generic data (from sensor to the system memory only)
> + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> + * recognized by IPU blocks.
> + *
> + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> + * align (or rearrange) the sampled data to fit the IPU supported formats
> + * as follows:
> + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> + * The CSI output in this case can feed other IPU blocks.
> + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> + * 2 components of width DATA_WIDTH were the first is the alternating U V
s/were/where/
> + * components and the second is Y. It construct the YUV444 word repeating
> + * the previous U, V samples aligning the results to a 32 bit word.
> + * The CSI output in this case can feed other IPU blocks.
> + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> + * The sensor data is given as is, considering _every sample_ as a pixel
> + * data. This format (combined with the GENERIC IPU pixel formats) can
> + * carry all the other sensor pixel formats to the system memory.
> + * The CSI output in this case _can not_ feed other IPU blocks.
> + */
> #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> {
> /* Add more formats as need arises and test possibilities appear... */
> switch (fourcc) {
> - case V4L2_PIX_FMT_RGB565:
> - return IPU_PIX_FMT_RGB565;
> case V4L2_PIX_FMT_RGB24:
> return IPU_PIX_FMT_RGB24;
> + case V4L2_PIX_FMT_UYVY:
> + return IPU_PIX_FMT_UYVY;
> + case V4L2_PIX_FMT_RGB565:
> case V4L2_PIX_FMT_RGB332:
> - return IPU_PIX_FMT_RGB332;
> - case V4L2_PIX_FMT_YUV422P:
> - return IPU_PIX_FMT_YVU422P;
> default:
> return IPU_PIX_FMT_GENERIC;
> }
Ok, so far mx3_camera has only been used with mt9m022 and mt9t031 sensors
(from what I can see in the mainline), both are bayer. It can also work
with monochrome cameras, and that would be the IPU_PIX_FMT_GENERIC case
too. So, I wouldn't mind removing the rest, and only adding / fixing what
you've now tested / implemented with your omnivision sensor. If anyone is
using mx3_camera with any other formats and thinks, that they work -
please, shout now. I'll probably also post a separate mail with this
warning.
> @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
>
> /* This is the configuration of one sg-element */
> video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> - video->out_width = icd->user_width;
> - video->out_height = icd->user_height;
> - video->out_stride = icd->user_width;
> +
> + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> + /*
> + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> + * video->out_width and stride to the correct unit.
> + */
> + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> + icd->current_fmt->host_fmt);
> + BUG_ON(bytes_per_line <= 0);
> +
> + video->out_width = bytes_per_line;
> + video->out_height = icd->user_height;
> + video->out_stride = bytes_per_line;
> + } else {
> + /* For IPU known formats the pixel unit is OK */
> + video->out_width = icd->user_width;
> + video->out_height = icd->user_height;
> + video->out_stride = icd->user_width;
> + }
>
> #ifdef DEBUG
> /* helps to see what DMA actually has written */
> @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> if (xlate) {
> xlate->host_fmt = fmt;
> xlate->code = code;
> + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> xlate++;
> - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> - xlate->host_fmt->fourcc);
make it even simpler: s/xlate->host_fmt/fmt/g
> }
>
> return formats;
> }
>
> +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> +{
> + switch (mcode) {
> + case V4L2_MBUS_FMT_YUYV8_2X8:
> + case V4L2_MBUS_FMT_YVYU8_2X8:
> + case V4L2_MBUS_FMT_VYUY8_2X8:
> + case V4L2_MBUS_FMT_YVYU10_2X10:
> + case V4L2_MBUS_FMT_YUYV10_2X10:
> + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> + return 2;
> + case V4L2_MBUS_FMT_SBGGR8_1X8:
> + case V4L2_MBUS_FMT_SBGGR10_1X10:
> + case V4L2_MBUS_FMT_GREY8_1X8:
> + case V4L2_MBUS_FMT_Y10_1X10:
> + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
Are these two really 1 sample per pixel?
> + case V4L2_MBUS_FMT_SGRBG8_1X8:
> + return 1;
> + default:
> + /* Add other pixel codes as needed */
> + return 0;
> + }
> +}
Let's just do the following:
s32 soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf)
{
switch (mf->packing) {
case SOC_MBUS_PACKING_NONE:
case SOC_MBUS_PACKING_EXTEND16:
return 1;
case SOC_MBUS_PACKING_2X8_PADHI:
case SOC_MBUS_PACKING_2X8_PADLO:
return 2;
}
return -EINVAL;
}
EXPORT_SYMBOL(soc_mbus_samples_per_pixel);
in drivers/media/video/soc_mediabus.c, agree?
> +
> static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> - unsigned int width, unsigned int height)
> + unsigned int width, unsigned int height,
> + enum v4l2_mbus_pixelcode code)
> {
> u32 ctrl, width_field, height_field;
> + const struct soc_mbus_pixelfmt *fmt;
> +
> + fmt = soc_mbus_get_fmtdesc(code);
> + BUG_ON(!fmt);
> +
> + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> + /*
> + * As we don't have an IPU native format, the CSI will be
> + * configured to output BAYER and here we need to convert
> + * geometry unit from pixels to samples.
> + * TODO: Support vertical down sampling (YUV420)
> + */
> + width = width * samples_per_pixel(code);
> + BUG_ON(!width);
> + }
width *= soc_mbus_samples_per_pixel(fmt);
BUG_ON((int)width < 0);
>
> /* Setup frame size - this cannot be changed on-the-fly... */
> width_field = width - 1;
> @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> return ret;
> }
>
> - configure_geometry(mx3_cam, mf.width, mf.height);
> + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> }
>
> dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> * mxc_v4l2_s_fmt()
> */
>
> - configure_geometry(mx3_cam, pix->width, pix->height);
> + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
>
> mf.width = pix->width;
> mf.height = pix->height;
> @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
>
> - /* TODO: Support RGB and YUV formats */
> + /* TODO: Support RGB_YUV444 formats */
>
> - /* This has been set in mx3_camera_activate(), but we clear it above */
> - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> + switch (xlate->code) {
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> + break;
> + default:
> + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> + }
>
> if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> --
> 1.6.3.3
If after all the above changed your set up still works, we're cool!;)
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
Well, I have no secrets, but I'm not sure everyone on the CC list is
really interested in this thread(s)... So, please consider dropping some
of them when replying, they might be grateful;)
In general looks good, just a couple of easy to fix remarks below, and,
please, fix line wrapping with the next version.
On Sun, 28 Nov 2010, Alberto Panizzo wrote:
> Signed-off-by: Alberto Panizzo <[email protected]>
> ---
> drivers/media/video/Kconfig | 6 +
> drivers/media/video/Makefile | 1 +
> drivers/media/video/ov2640.c | 1153
> +++++++++++++++++++++++++++++++++++++++
> include/media/v4l2-chip-ident.h | 1 +
> 4 files changed, 1161 insertions(+), 0 deletions(-)
> create mode 100644 drivers/media/video/ov2640.c
>
> diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
> index 0efbb29..898f76f 100644
> --- a/drivers/media/video/Kconfig
> +++ b/drivers/media/video/Kconfig
> @@ -807,6 +807,12 @@ config SOC_CAMERA_OV9640
> help
> This is a ov9640 camera driver
>
> +config SOC_CAMERA_OV2640
> + tristate "ov2640 camera support"
> + depends on SOC_CAMERA && I2C
> + help
> + This is a ov2640 camera driver
> +
might as well keep them alphabetically and numerically ordered
> config MX1_VIDEO
> bool
>
> diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
> index af79d47..fac185d 100644
> --- a/drivers/media/video/Makefile
> +++ b/drivers/media/video/Makefile
> @@ -82,6 +82,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o
> obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o
> obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o
> obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o
> +obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o
ditto
> obj-$(CONFIG_SOC_CAMERA_RJ54N1) += rj54n1cb0c.o
> obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o
>
> diff --git a/drivers/media/video/ov2640.c b/drivers/media/video/ov2640.c
> new file mode 100644
> index 0000000..5edf23e
> --- /dev/null
> +++ b/drivers/media/video/ov2640.c
> @@ -0,0 +1,1153 @@
> +/*
> + * ov2640 Camera Driver
> + *
> + * Copyright (C) 2010 Alberto Panizzo <[email protected]>
> + *
> + * Based on ov772x, ov9640 drivers and previous non merged
> implementations.
Wrapped lines throughout the patch
> + *
> + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights
> Reserved.
> + * Copyright (C) 2006, OmniVision
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/slab.h>
> +#include <linux/delay.h>
> +#include <linux/videodev2.h>
> +#include <media/v4l2-chip-ident.h>
> +#include <media/v4l2-subdev.h>
> +#include <media/soc_camera.h>
> +#include <media/soc_mediabus.h>
> +
> +#define VAL_SET(x, mask, rshift, lshift) \
> + ((((x) >> rshift) & mask) << lshift)
> +/*
> + * DSP registers
> + * register offset for BANK_SEL == BANK_SEL_DSP
> + */
> +#define R_BYPASS 0x05 /* Bypass DSP */
> +#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP. sensor out directly
> */
> +#define R_BYPASS_USE_DSP 0x00 /* Bypass DSP. sensor out directly
> */
Second comment wrong?
> +#define QS 0x44 /* Quantization Scale Factor */
> +#define CTRLI 0x50
> +#define CTRLI_LP_DP 0x80
> +#define CTRLI_ROUND 0x40
> +#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
> +#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
> +#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
> +#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
> +#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
> +#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
> +#define XOFFL 0x53 /* OFFSET_X[7:0] */
> +#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
> +#define YOFFL 0x54 /* OFFSET_Y[7:0] */
> +#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
> +#define VHYX 0x55 /* Offset and size completion */
> +#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
> +#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
> +#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
> +#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
> +#define DPRP 0x56
> +#define TEST 0x57 /* Horizontal size completion */
> +#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
> +#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
> +#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
> +#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
> +#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
> +#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
> +#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
> +#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
> +#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
> +#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
> +#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
> +#define CTRL2 0x86 /* DSP Module enable 2 */
> +#define CTRL2_DCW_EN 0x20
> +#define CTRL2_SDE_EN 0x10
> +#define CTRL2_UV_ADJ_EN 0x08
> +#define CTRL2_UV_AVG_EN 0x04
> +#define CTRL2_CMX_EN 0x01
> +#define CTRL3 0x87 /* DSP Module enable 3 */
> +#define CTRL3_BPC_EN 0x80
> +#define CTRL3_WPC_EN 0x40
> +#define SIZEL 0x8C /* Image Size Completion */
> +#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
> +#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
> +#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
> +#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
> +#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
> +#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
> +#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
> +#define CTRL0 0xC2 /* DSP Module enable 0 */
> +#define CTRL0_AEC_EN 0x80
> +#define CTRL0_AEC_SEL 0x40
> +#define CTRL0_STAT_SEL 0x20
> +#define CTRL0_VFIRST 0x10
> +#define CTRL0_YUV422 0x08
> +#define CTRL0_YUV_EN 0x04
> +#define CTRL0_RGB_EN 0x02
> +#define CTRL0_RAW_EN 0x01
> +#define CTRL1 0xC3 /* DSP Module enable 1 */
> +#define CTRL1_CIP 0x80
> +#define CTRL1_DMY 0x40
> +#define CTRL1_RAW_GMA 0x20
> +#define CTRL1_DG 0x10
> +#define CTRL1_AWB 0x08
> +#define CTRL1_AWB_GAIN 0x04
> +#define CTRL1_LENC 0x02
> +#define CTRL1_PRE 0x01
> +#define R_DVP_SP 0xD3 /* DVP output speed control */
> +#define R_DVP_SP_AUTO_MODE 0x80
> +#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0]
> (YUV0);
> + * = sysclk (48)/(2*[6:0]) (RAW);*/
> +#define IMAGE_MODE 0xDA /* Image Output Format Select */
> +#define IMAGE_MODE_Y8_DVP_EN 0x40
> +#define IMAGE_MODE_JPEG_EN 0x10
> +#define IMAGE_MODE_YUV422 0x00
> +#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
> +#define IMAGE_MODE_RGB565 0x08
> +#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG
> output
> + * mode (0 for HREF is same as sensor) */
> +#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
> + * 1: Low byte first UYVY (C2[4] =0)
> + * VYUY (C2[4] =1)
> + * 0: High byte first YUYV (C2[4]=0)
> + * YVYU (C2[4] = 1) */
> +#define RESET 0xE0 /* Reset */
> +#define RESET_MICROC 0x40
> +#define RESET_SCCB 0x20
> +#define RESET_JPEG 0x10
> +#define RESET_DVP 0x04
> +#define RESET_IPU 0x02
> +#define RESET_CIF 0x01
> +#define REGED 0xED /* Register ED */
> +#define REGED_CLK_OUT_DIS 0x10
> +#define MS_SP 0xF0 /* SCCB Master Speed */
> +#define SS_ID 0xF7 /* SCCB Slave ID */
> +#define SS_CTRL 0xF8 /* SCCB Slave Control */
> +#define SS_CTRL_ADD_AUTO_INC 0x20
> +#define SS_CTRL_EN 0x08
> +#define SS_CTRL_DELAY_CLK 0x04
> +#define SS_CTRL_ACC_EN 0x02
> +#define SS_CTRL_SEN_PASS_THR 0x01
> +#define MC_BIST 0xF9 /* Microcontroller misc register */
> +#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
> +#define MC_BIST_BOOT_ROM_SEL 0x40
> +#define MC_BIST_12KB_SEL 0x20
> +#define MC_BIST_12KB_MASK 0x30
> +#define MC_BIST_512KB_SEL 0x08
> +#define MC_BIST_512KB_MASK 0x0C
> +#define MC_BIST_BUSY_BIT_R 0x02
> +#define MC_BIST_MC_RES_ONE_SH_W 0x02
> +#define MC_BIST_LAUNCH 0x01
> +#define BANK_SEL 0xFF /* Register Bank Select */
> +#define BANK_SEL_DSP 0x00
> +#define BANK_SEL_SENS 0x01
> +
> +/*
> + * Sensor registers
> + * register offset for BANK_SEL == BANK_SEL_SENS
> + */
> +#define GAIN 0x00 /* AGC - Gain control gain setting */
> +#define COM1 0x03 /* Common control 1 */
> +#define COM1_1_DUMMY_FR 0x40
> +#define COM1_3_DUMMY_FR 0x80
> +#define COM1_7_DUMMY_FR 0xC0
> +#define COM1_VWIN_LSB_UXGA 0x0F
> +#define COM1_VWIN_LSB_SVGA 0x0A
> +#define COM1_VWIN_LSB_CIF 0x06
> +#define REG04 0x04 /* Register 04 */
> +#define REG04_DEF 0x20 /* Always set */
> +#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF
> */
> +#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
> +#define REG04_VREF_EN 0x10
> +#define REG04_HREF_EN 0x08
> +#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
> +#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge
> Row Num */
> +#define COM2 0x09 /* Common control 2 */
> +#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
> + /* Output drive capability */
> +#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
> +#define PID 0x0A /* Product ID Number MSB */
> +#define VER 0x0B /* Product ID Number LSB */
> +#define COM3 0x0C /* Common control 3 */
> +#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
> +#define COM3_BAND_AUTO 0x02 /* Auto Banding */
> +#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output
> after the
> + * snapshot sequence*/
> +#define AEC 0x10 /* AEC[9:2] Exposure Value */
> +#define CLKRC 0x11 /* Internal clock */
> +#define CLKRC_EN 0x80
> +#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
> +#define COM7 0x12 /* Common control 7 */
> +#define COM7_SRST 0x80 /* Initiates system reset. All
> registers are
> + * set to factory default values after which
> + * the chip resumes normal operation */
> +#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
> +#define COM7_RES_SVGA 0x40 /* SVGA */
> +#define COM7_RES_CIF 0x20 /* CIF */
> +#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
> +#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
> +#define COM8 0x13 /* Common control 8 */
> +#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
> +#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
> +#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control
> selection */
> +#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
> +#define COM9 0x14 /* Common control 9
> + * Automatic gain ceiling - maximum AGC value [7:5]*/
> +#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
> +#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
> +#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
> +#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
> +#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
> +#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
> +#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
> +#define COM10 0x15 /* Common control 10 */
> +#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
> +#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising
> edge of
> + * PCLK (user can latch data at the next
> + * falling edge of PCLK).
> + * 0 otherwise. */
> +#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
> + * HREF negative for valid data*/
> +#define COM10_VSINC_INV 0x02 /* Invert VSYNC polarity */
> +#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
> +#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
> +#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
> +#define VEND 0x1A /* Vertical Window end MSB 8 bit */
> +#define MIDH 0x1C /* Manufacturer ID byte - high */
> +#define MIDL 0x1D /* Manufacturer ID byte - low */
> +#define AEW 0x24 /* AGC/AEC - Stable operating region (upper
> limit) */
> +#define AEB 0x25 /* AGC/AEC - Stable operating region (lower
> limit) */
> +#define VV 0x26 /* AGC/AEC Fast mode operating region */
> +#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
> +#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
> +#define REG2A 0x2A /* Dummy pixel insert MSB */
> +#define FRARL 0x2B /* Dummy pixel insert LSB */
> +#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical
> direction */
> +#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical
> direction */
> +#define YAVG 0x2F /* Y/G Channel Average value */
> +#define REG32 0x32 /* Common Control 32 */
> +#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
> +#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
> +#define ARCOM2 0x34 /* Zoom: Horizontal start point */
> +#define REG45 0x45 /* Register 45 */
> +#define FLL 0x46 /* Frame Length Adjustment LSBs */
> +#define FLH 0x47 /* Frame Length Adjustment MSBs */
> +#define COM19 0x48 /* Zoom: Vertical start point */
> +#define ZOOMS 0x49 /* Zoom: Vertical start point */
> +#define COM22 0x4B /* Flash light control */
> +#define COM25 0x4E /* For Banding operations */
> +#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
> +#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
> +#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight
> option */
> +#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight
> option */
> +#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight
> option */
> +#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight
> option */
> +#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
> +#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
> +
> +/*
> + * ID
> + */
> +#define MANUFACTURER_ID 0x7FA2
> +#define PID_OV2640 0x2642
> +#define VERSION(pid, ver) ((pid<<8)|(ver&0xFF))
please, add spaces
> +
> +/*
> + * struct
> + */
> +struct regval_list {
> + u8 reg_num;
> + u16 value;
> +};
> +
> +/* supported resolutions */
> +enum ov2640_width_sizes {
nitpicking really, but wouldn't "enum ov2640_width" be descriptive enough?
> + W_QCIF = 176,
> + W_QVGA = 320,
> + W_CIF = 352,
> + W_VGA = 640,
> + W_SVGA = 800,
> + W_XGA = 1024,
> + W_SXGA = 1280,
> + W_UXGA = 1600,
> +};
> +
> +enum ov2640_height_sizes {
ditto
> + H_QCIF = 144,
> + H_QVGA = 240,
> + H_CIF = 288,
> + H_VGA = 480,
> + H_SVGA = 600,
> + H_XGA = 768,
> + H_SXGA = 1024,
> + H_UXGA = 1200,
> +};
> +
> +struct ov2640_win_size {
> + char *name;
> + enum ov2640_width_sizes width;
> + enum ov2640_height_sizes height;
> + const struct regval_list *regs;
> +};
> +
> +
> +struct ov2640_priv {
> + struct v4l2_subdev subdev;
> + struct ov2640_camera_info *info;
> + enum v4l2_mbus_pixelcode cfmt_code;
> + const struct ov2640_win_size *win;
> + int model;
> + u16 flag_vflip:1;
> + u16 flag_hflip:1;
> +};
> +
> +/*
> + * Registers settings
> + */
> +
> +#define ENDMARKER { 0xff, 0xff }
> +
> +static const struct regval_list ov2640_init_regs[] = {
> + { BANK_SEL, BANK_SEL_DSP },
> + { 0x2c, 0xff },
> + { 0x2e, 0xdf },
> + { BANK_SEL, BANK_SEL_SENS },
> + { 0x3c, 0x32 },
> + { CLKRC, CLKRC_DIV_SET(1) },
> + { COM2, COM2_OCAP_Nx_SET(3) },
> + { REG04, REG04_DEF | REG04_HREF_EN },
> + { COM8, COM8_DEF | COM8_BNDF_EN | COM8_AGC_EN | COM8_AEC_EN },
> + { COM9, COM9_AGC_GAIN_8x | 0x08},
> + { 0x2c, 0x0c },
> + { 0x33, 0x78 },
> + { 0x3a, 0x33 },
> + { 0x3b, 0xfb },
> + { 0x3e, 0x00 },
> + { 0x43, 0x11 },
> + { 0x16, 0x10 },
> + { 0x39, 0x02 },
> + { 0x35, 0x88 },
> + { 0x22, 0x0a },
> + { 0x37, 0x40 },
> + { 0x23, 0x00 },
> + { ARCOM2, 0xa0 },
> + { 0x06, 0x02 },
> + { 0x06, 0x88 },
> + { 0x07, 0xc0 },
> + { 0x0d, 0xb7 },
> + { 0x0e, 0x01 },
> + { 0x4c, 0x00 },
> + { 0x4a, 0x81 },
> + { 0x21, 0x99 },
> + { AEW, 0x40 },
> + { AEB, 0x38 },
> + { VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
> + { 0x5c, 0x00 },
> + { 0x63, 0x00 },
> + { FLL, 0x22 },
> + { COM3, 0x38 | COM3_BAND_AUTO },
> + { REG5D, 0x55 },
> + { REG5E, 0x7d },
> + { REG5F, 0x7d },
> + { REG60, 0x55 },
> + { HISTO_LOW, 0x70 },
> + { HISTO_HIGH, 0x80 },
> + { 0x7c, 0x05 },
> + { 0x20, 0x80 },
> + { 0x28, 0x30 },
> + { 0x6c, 0x00 },
> + { 0x6d, 0x80 },
> + { 0x6e, 0x00 },
> + { 0x70, 0x02 },
> + { 0x71, 0x94 },
> + { 0x73, 0xc1 },
> + { 0x3d, 0x34 },
> + { COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
> + { 0x5a, 0x57 },
> + { BD50, 0xbb },
> + { BD60, 0x9c },
> + { BANK_SEL, BANK_SEL_DSP },
> + { 0xe5, 0x7f },
> + { MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
> + { 0x41, 0x24 },
> + { RESET, RESET_JPEG | RESET_DVP },
> + { 0x76, 0xff },
> + { 0x33, 0xa0 },
> + { 0x42, 0x20 },
> + { 0x43, 0x18 },
> + { 0x4c, 0x00 },
> + { CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
> + { 0x88, 0x3f },
> + { 0xd7, 0x03 },
> + { 0xd9, 0x10 },
> + { R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
> + { 0xc8, 0x08 },
> + { 0xc9, 0x80 },
> + { BPADDR, 0x00 },
> + { BPDATA, 0x00 },
> + { BPADDR, 0x03 },
> + { BPDATA, 0x48 },
> + { BPDATA, 0x48 },
> + { BPADDR, 0x08 },
> + { BPDATA, 0x20 },
> + { BPDATA, 0x10 },
> + { BPDATA, 0x0e },
> + { 0x90, 0x00 },
> + { 0x91, 0x0e },
> + { 0x91, 0x1a },
> + { 0x91, 0x31 },
> + { 0x91, 0x5a },
> + { 0x91, 0x69 },
> + { 0x91, 0x75 },
> + { 0x91, 0x7e },
> + { 0x91, 0x88 },
> + { 0x91, 0x8f },
> + { 0x91, 0x96 },
> + { 0x91, 0xa3 },
> + { 0x91, 0xaf },
> + { 0x91, 0xc4 },
> + { 0x91, 0xd7 },
> + { 0x91, 0xe8 },
> + { 0x91, 0x20 },
> + { 0x92, 0x00 },
> + { 0x93, 0x06 },
> + { 0x93, 0xe3 },
> + { 0x93, 0x03 },
> + { 0x93, 0x03 },
> + { 0x93, 0x00 },
> + { 0x93, 0x02 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x93, 0x00 },
> + { 0x96, 0x00 },
> + { 0x97, 0x08 },
> + { 0x97, 0x19 },
> + { 0x97, 0x02 },
> + { 0x97, 0x0c },
> + { 0x97, 0x24 },
> + { 0x97, 0x30 },
> + { 0x97, 0x28 },
> + { 0x97, 0x26 },
> + { 0x97, 0x02 },
> + { 0x97, 0x98 },
> + { 0x97, 0x80 },
> + { 0x97, 0x00 },
> + { 0x97, 0x00 },
> + { 0xa4, 0x00 },
> + { 0xa8, 0x00 },
> + { 0xc5, 0x11 },
> + { 0xc6, 0x51 },
> + { 0xbf, 0x80 },
> + { 0xc7, 0x10 },
> + { 0xb6, 0x66 },
> + { 0xb8, 0xA5 },
> + { 0xb7, 0x64 },
> + { 0xb9, 0x7C },
> + { 0xb3, 0xaf },
> + { 0xb4, 0x97 },
> + { 0xb5, 0xFF },
> + { 0xb0, 0xC5 },
> + { 0xb1, 0x94 },
> + { 0xb2, 0x0f },
> + { 0xc4, 0x5c },
> + { 0xa6, 0x00 },
> + { 0xa7, 0x20 },
> + { 0xa7, 0xd8 },
> + { 0xa7, 0x1b },
> + { 0xa7, 0x31 },
> + { 0xa7, 0x00 },
> + { 0xa7, 0x18 },
> + { 0xa7, 0x20 },
> + { 0xa7, 0xd8 },
> + { 0xa7, 0x19 },
> + { 0xa7, 0x31 },
> + { 0xa7, 0x00 },
> + { 0xa7, 0x18 },
> + { 0xa7, 0x20 },
> + { 0xa7, 0xd8 },
> + { 0xa7, 0x19 },
> + { 0xa7, 0x31 },
> + { 0xa7, 0x00 },
> + { 0xa7, 0x18 },
> + { 0x7f, 0x00 },
> + { 0xe5, 0x1f },
> + { 0xe1, 0x77 },
> + { 0xdd, 0x7f },
> + { CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN | CTRL0_RGB_EN },
> + ENDMARKER,
> +};
Nice, have I mentioned, how I don't find such register lists particularly
developer-friendly?:) But this is one of the cases where I don't think
requesting you to open code this one would be a wise way to spend your
time, even if it is done in emacs with something around 50 key-strokes;)
Hm, these repeated writes to unnamed registers 0x91, 0x93, 0x97, 0xa7 look
like some writing to internal memory, perhaps?
> +
> +/*
> + * register setting for window size
> + * The preamble setup the internal DSP to input a UXGA (1600x1200)
> image,
> + * then the different zooming configurations will set up the output
> image size.
> + */
> +static const struct regval_list ov2640_size_change_preamble_regs[] = {
> + { BANK_SEL, BANK_SEL_DSP },
> + { RESET, RESET_DVP },
> + { HSIZE8, HSIZE8_SET(W_UXGA) }, { VSIZE8, VSIZE8_SET(H_UXGA) },
> + { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
> + CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
> + { HSIZE, HSIZE_SET(W_UXGA) }, { VSIZE, VSIZE_SET(H_UXGA) },
> + { XOFFL, XOFFL_SET(0) }, { YOFFL, YOFFL_SET(0) },
IMHO this would look prettier one-per-line, similarly below
> + { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
> + VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
> + { TEST, TEST_HSIZE_SET(W_UXGA) },
> + ENDMARKER,
> +};
> +
> +#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
> + { CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
> + CTRLI_H_DIV_SET(h_div)}, \
> + { ZMOW, ZMOW_OUTW_SET(x) }, { ZMOH, ZMOH_OUTH_SET(y) }, \
> + { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
> + { R_DVP_SP, pclk_div }, \
> + { RESET, 0x00}
> +
> +static const struct regval_list ov2640_qcif_regs[] = {
> + PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_qvga_regs[] = {
> + PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_cif_regs[] = {
> + PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_vga_regs[] = {
> + PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_svga_regs[] = {
> + PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_xga_regs[] = {
> + PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
> + { CTRLI, 0x00},
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_sxga_regs[] = {
> + PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
> + { CTRLI, 0x00},
> + { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_uxga_regs[] = {
> + PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
> + { CTRLI, 0x00},
> + { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
> + ENDMARKER,
> +};
> +
> +#define OV2640_SIZE(n, w, h, r) \
> + {.name = n, .width = w , .height = h, .regs = r }
> +
> +static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
> + OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
> + OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
> + OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
> + OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
> + OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
> + OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
> + OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
> + OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
> +};
> +
> +/*
> + * Register settings for pixel formats
> + */
> +static const struct regval_list ov2640_format_change_preamble_regs[] =
> {
> + { BANK_SEL, BANK_SEL_DSP },
> + { R_BYPASS, R_BYPASS_USE_DSP },
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_yuv422_regs[] = {
> + { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
> + { 0xD7, 0x01 },
> + { 0x33, 0xa0 },
> + { 0xe1, 0x67 },
> + { RESET, 0x00 },
> + { R_BYPASS, R_BYPASS_USE_DSP },
> + ENDMARKER,
> +};
> +
> +static const struct regval_list ov2640_rgb565_regs[] = {
> + { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
> + { 0xd7, 0x03 },
> + { RESET, 0x00 },
> + { R_BYPASS, R_BYPASS_USE_DSP },
> + ENDMARKER,
> +};
> +
> +static enum v4l2_mbus_pixelcode ov2640_codes[] = {
> + V4L2_MBUS_FMT_UYVY8_2X8,
> + V4L2_MBUS_FMT_RGB565_2X8_LE,
Have you also tested rgb565?
> +};
> +
> +/*
> + * Supported controls
> + */
> +static const struct v4l2_queryctrl ov2640_controls[] = {
> + {
> + .id = V4L2_CID_VFLIP,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "Flip Vertically",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + }, {
> + .id = V4L2_CID_HFLIP,
> + .type = V4L2_CTRL_TYPE_BOOLEAN,
> + .name = "Flip Horizontally",
> + .minimum = 0,
> + .maximum = 1,
> + .step = 1,
> + .default_value = 0,
> + },
> +};
> +
> +/*
> + * general functions
> + */
> +static struct ov2640_priv *to_ov2640(const struct i2c_client *client)
> +{
> + return container_of(i2c_get_clientdata(client), struct ov2640_priv,
> + subdev);
> +}
> +
> +static int ov2640_write_array(struct i2c_client *client,
> + const struct regval_list *vals)
> +{
> + int ret;
> +
> + while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
> + ret = i2c_smbus_write_byte_data(client,
> + vals->reg_num,
> + vals->value & 0xFF);
Well, you trust and don't check, that register numbers are within range,
so, you might just as well trust the value.
> + dev_vdbg(&client->dev, "array: 0x%02x, 0x%02x",
> + vals->reg_num, vals->value & 0xFF);
ditto
> + if (ret < 0)
> + return ret;
> + vals++;
> + }
> + return 0;
> +}
> +
> +static int ov2640_mask_set(struct i2c_client *client,
> + u8 reg, u8 mask, u8 set)
> +{
> + s32 val = i2c_smbus_read_byte_data(client, reg);
> + if (val < 0)
> + return val;
> +
> + val &= ~mask;
> + val |= set & mask;
> +
> + dev_vdbg(&client->dev, "masks: 0x%02x, 0x%02x",
> + reg, val);
> + return i2c_smbus_write_byte_data(client, reg, val);
> +}
> +
> +static int ov2640_reset(struct i2c_client *client)
> +{
> + int ret;
> + const struct regval_list reset_seq[] = {
> + {BANK_SEL, BANK_SEL_SENS},
> + {COM7, COM7_SRST},
> + ENDMARKER,
> + };
> +
> + ret = ov2640_write_array(client, reset_seq);
> + if (ret)
> + goto err;
> +
> + msleep(5);
> +err:
> + dev_dbg(&client->dev, "%s: (ret %d)", __func__, ret);
> + return ret;
> +}
> +
> +/*
> + * soc_camera_ops functions
> + */
> +static int ov2640_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> + return 0;
> +}
> +
> +static int ov2640_set_bus_param(struct soc_camera_device *icd,
> + unsigned long flags)
> +{
> + return 0;
> +}
> +
> +static unsigned long ov2640_query_bus_param(struct soc_camera_device
> *icd)
> +{
> + struct soc_camera_link *icl = to_soc_camera_link(icd);
> + unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
> + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
> + SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
If I understand this correctly, your sensor has just 10 data lines, and
has no configuration to switch to any other bus width. Then I wouldn#t
advertise 8 and 10 bits here. Please, have a look how this is done, e.g.,
in mt9m001.c. There we're trying to reflect the configuration more
correctly: the sensor can do 10 bits only. But the platform can override
this, if only some data lines are actually connected on the board.
> +
> + return soc_camera_apply_sensor_flags(icl, flags);
> +}
> +
> +static int ov2640_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control
> *ctrl)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + struct ov2640_priv *priv = to_ov2640(client);
> +
> + switch (ctrl->id) {
> + case V4L2_CID_VFLIP:
> + ctrl->value = priv->flag_vflip;
> + break;
> + case V4L2_CID_HFLIP:
> + ctrl->value = priv->flag_hflip;
> + break;
> + }
> + return 0;
> +}
> +
> +static int ov2640_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control
> *ctrl)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + struct ov2640_priv *priv = to_ov2640(client);
> + int ret = 0;
> + u8 val;
> +
> + switch (ctrl->id) {
> + case V4L2_CID_VFLIP:
> + val = ctrl->value ? REG04_VFLIP_IMG : 0x00;
> + priv->flag_vflip = ctrl->value ? 1 : 0;
> + ret = ov2640_mask_set(client, REG04, REG04_VFLIP_IMG, val);
> + break;
> + case V4L2_CID_HFLIP:
> + val = ctrl->value ? REG04_HFLIP_IMG : 0x00;
> + priv->flag_hflip = ctrl->value ? 1 : 0;
> + ret = ov2640_mask_set(client, REG04, REG04_HFLIP_IMG, val);
> + break;
> + }
> +
> + return ret;
> +}
> +
> +static int ov2640_g_chip_ident(struct v4l2_subdev *sd,
> + struct v4l2_dbg_chip_ident *id)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + struct ov2640_priv *priv = to_ov2640(client);
> +
> + id->ident = priv->model;
> + id->revision = 0;
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_VIDEO_ADV_DEBUG
> +static int ov2640_g_register(struct v4l2_subdev *sd,
> + struct v4l2_dbg_register *reg)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + int ret;
> +
> + reg->size = 1;
> + if (reg->reg > 0xff)
> + return -EINVAL;
> +
> + ret = i2c_smbus_read_byte_data(client, reg->reg);
> + if (ret < 0)
> + return ret;
> +
> + reg->val = (__u64)ret;
Is this type-cast really needed?
> +
> + return 0;
> +}
> +
> +static int ov2640_s_register(struct v4l2_subdev *sd,
> + struct v4l2_dbg_register *reg)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> +
> + if (reg->reg > 0xff ||
> + reg->val > 0xff)
> + return -EINVAL;
> +
> + return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
> +}
> +#endif
> +
> +/* select nearest higher resolution for capture */
> +static const struct ov2640_win_size *ov2640_select_win(u32 *width, u32
> *height)
> +{
> + int i, def = ARRAY_SIZE(ov2640_supported_win_sizes) - 1;
> +
> + for (i = 0; i < ARRAY_SIZE(ov2640_supported_win_sizes); i++) {
+ for (i = 0; i <= def; i++) {
would do too
> + if (ov2640_supported_win_sizes[i].width >= *width &&
> + ov2640_supported_win_sizes[i].height >= *height) {
> + *width = ov2640_supported_win_sizes[i].width;
> + *height = ov2640_supported_win_sizes[i].height;
> + return &ov2640_supported_win_sizes[i];
> + }
> + }
> +
> + *width = ov2640_supported_win_sizes[def].width;
> + *height = ov2640_supported_win_sizes[def].height;
> + return &ov2640_supported_win_sizes[def];
> +}
> +
> +static int ov2640_set_params(struct i2c_client *client, u32 *width, u32
> *height,
> + enum v4l2_mbus_pixelcode code)
> +{
> + struct ov2640_priv *priv = to_ov2640(client);
> + const struct regval_list *selected_cfmt_regs;
> + int ret = -EINVAL;
> +
> + /* select win */
> + priv->win = ov2640_select_win(width, height);
> +
> + /* select format */
> + priv->cfmt_code = 0;
> + switch (code) {
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
> + selected_cfmt_regs = ov2640_rgb565_regs;
> + break;
> + default:
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
> + selected_cfmt_regs = ov2640_yuv422_regs;
> + }
> +
> + /* reset hardware */
> + ov2640_reset(client);
hmm, what exactly does this reset do? It probably doesn't reset register
values, right? it only resets frame capture or what?
> +
> + dev_dbg(&client->dev, "%s: Init default", __func__);
> + /* Initialize the sensor with default data */
> + ret = ov2640_write_array(client, ov2640_init_regs);
> + if (ret < 0)
> + goto err;
> +
> + dev_dbg(&client->dev, "%s: Set size to %s", __func__,
> priv->win->name);
> + /* Select preamble */
> + ret = ov2640_write_array(client, ov2640_size_change_preamble_regs);
> + if (ret < 0)
> + goto err;
> +
> + /* set size win */
> + ret = ov2640_write_array(client, priv->win->regs);
> + if (ret < 0)
> + goto err;
> +
> + dev_dbg(&client->dev, "%s: Set cfmt", __func__);
> + /* Cfmt preamble */
> + ret = ov2640_write_array(client, ov2640_format_change_preamble_regs);
> + if (ret < 0)
> + goto err;
> +
> + /* set cfmt */
> + ret = ov2640_write_array(client, selected_cfmt_regs);
> + if (ret < 0)
> + goto err;
> +
> + priv->cfmt_code = code;
> + *width = priv->win->width;
> + *height = priv->win->height;
> +
> + return ret;
> +
> +err:
> + dev_err(&client->dev, "%s: Error %d", __func__, ret);
> + ov2640_reset(client);
> + priv->win = NULL;
> +
> + return ret;
> +}
> +
> +static int ov2640_g_fmt(struct v4l2_subdev *sd,
> + struct v4l2_mbus_framefmt *mf)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + struct ov2640_priv *priv = to_ov2640(client);
> +
> + if (!priv->win) {
> + u32 width = W_SVGA, height = H_SVGA;
> + int ret = ov2640_set_params(client, &width, &height,
> + V4L2_MBUS_FMT_UYVY8_2X8);
> + if (ret < 0)
> + return ret;
> + }
> +
> + mf->width = priv->win->width;
> + mf->height = priv->win->height;
> + mf->code = priv->cfmt_code;
> +
> + switch (mf->code) {
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + mf->colorspace = V4L2_COLORSPACE_SRGB;
> + break;
> + default:
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + mf->colorspace = V4L2_COLORSPACE_JPEG;
> + }
> + mf->field = V4L2_FIELD_NONE;
> +
> + return 0;
> +}
> +
> +static int ov2640_s_fmt(struct v4l2_subdev *sd,
> + struct v4l2_mbus_framefmt *mf)
> +{
> + struct i2c_client *client = v4l2_get_subdevdata(sd);
> + int ret;
> +
> +
> + switch (mf->code) {
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + mf->colorspace = V4L2_COLORSPACE_SRGB;
> + break;
> + default:
> + mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + mf->colorspace = V4L2_COLORSPACE_JPEG;
> + }
> +
> + ret = ov2640_set_params(client, &mf->width, &mf->height,
> + mf->code);
> +
> + return ret;
> +}
> +
> +static int ov2640_try_fmt(struct v4l2_subdev *sd,
> + struct v4l2_mbus_framefmt *mf)
> +{
> + const struct ov2640_win_size *win;
> +
> + /*
> + * select suitable win
> + */
> + win = ov2640_select_win(&mf->width, &mf->height);
> +
> + mf->field = V4L2_FIELD_NONE;
> +
> + switch (mf->code) {
> + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> + mf->colorspace = V4L2_COLORSPACE_SRGB;
> + break;
> + default:
> + mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
> + case V4L2_MBUS_FMT_UYVY8_2X8:
> + mf->colorspace = V4L2_COLORSPACE_JPEG;
> + }
> +
> + return 0;
> +}
> +
> +static int ov2640_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
> + enum v4l2_mbus_pixelcode *code)
> +{
> + if (index >= ARRAY_SIZE(ov2640_codes))
> + return -EINVAL;
> +
> + *code = ov2640_codes[index];
> + return 0;
> +}
> +
> +static int ov2640_video_probe(struct soc_camera_device *icd,
> + struct i2c_client *client)
> +{
> + struct ov2640_priv *priv = to_ov2640(client);
> + u8 pid, ver, midh, midl;
> + const char *devname;
> + int ret;
> +
> + /*
> + * We must have a parent by now. And it cannot be a wrong one.
> + * So this entire test is completely redundant.
> + */
> + if (!icd->dev.parent ||
> + to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
> + dev_err(&client->dev, "Parent missing or invalid!\n");
> + ret = -ENODEV;
> + goto err;
> + }
> +
> + /*
> + * check and show product ID and manufacturer ID
> + */
> + i2c_smbus_write_byte_data(client, BANK_SEL, BANK_SEL_SENS);
> + pid = i2c_smbus_read_byte_data(client, PID);
> + ver = i2c_smbus_read_byte_data(client, VER);
> + midh = i2c_smbus_read_byte_data(client, MIDH);
> + midl = i2c_smbus_read_byte_data(client, MIDL);
> +
> + switch (VERSION(pid, ver)) {
> + case PID_OV2640:
> + devname = "ov2640";
> + priv->model = V4L2_IDENT_OV2640;
> + break;
> + default:
> + dev_err(&client->dev,
> + "Product ID error %x:%x\n", pid, ver);
> + ret = -ENODEV;
> + goto err;
> + }
> +
> + dev_info(&client->dev,
> + "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
> + devname, pid, ver, midh, midl);
> +
> + return 0;
> +
> +err:
> + return ret;
> +}
> +
> +static struct soc_camera_ops ov2640_ops = {
> + .set_bus_param = ov2640_set_bus_param,
> + .query_bus_param = ov2640_query_bus_param,
> + .controls = ov2640_controls,
> + .num_controls = ARRAY_SIZE(ov2640_controls),
> +};
> +
> +static struct v4l2_subdev_core_ops ov2640_subdev_core_ops = {
> + .g_ctrl = ov2640_g_ctrl,
> + .s_ctrl = ov2640_s_ctrl,
> + .g_chip_ident = ov2640_g_chip_ident,
> +#ifdef CONFIG_VIDEO_ADV_DEBUG
> + .g_register = ov2640_g_register,
> + .s_register = ov2640_s_register,
> +#endif
> +};
> +
> +static struct v4l2_subdev_video_ops ov2640_subdev_video_ops = {
> + .s_stream = ov2640_s_stream,
> + .g_mbus_fmt = ov2640_g_fmt,
> + .s_mbus_fmt = ov2640_s_fmt,
> + .try_mbus_fmt = ov2640_try_fmt,
> + .enum_mbus_fmt = ov2640_enum_fmt,
Please, also implement at least a .cropcap, maybe also .g_crop - both
trivial for your case of a constant sensor window.
> +};
> +
> +static struct v4l2_subdev_ops ov2640_subdev_ops = {
> + .core = &ov2640_subdev_core_ops,
> + .video = &ov2640_subdev_video_ops,
> +};
> +
> +/*
> + * i2c_driver functions
> + */
> +static int ov2640_probe(struct i2c_client *client,
> + const struct i2c_device_id *did)
> +{
> + struct ov2640_priv *priv;
> + struct soc_camera_device *icd = client->dev.platform_data;
> + struct i2c_adapter *adapter =
> to_i2c_adapter(client->dev.parent);
> + struct soc_camera_link *icl;
> + int ret;
> +
> + if (!icd) {
> + dev_err(&adapter->dev, "OV2640: missing soc-camera data!\n");
> + return -EINVAL;
> + }
> +
> + icl = to_soc_camera_link(icd);
> + if (!icl) {
> + dev_err(&adapter->dev,
> + "OV2640: Missing platform_data for driver\n");
> + return -EINVAL;
> + }
> +
> + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
> + dev_err(&adapter->dev,
> + "OV2640: I2C-Adapter doesn't support SMBUS\n");
> + return -EIO;
> + }
> +
> + priv = kzalloc(sizeof(struct ov2640_priv), GFP_KERNEL);
> + if (!priv) {
> + dev_err(&adapter->dev,
> + "Failed to allocate memory for private data!\n");
> + return -ENOMEM;
> + }
> +
> + priv->info = icl->priv;
> +
> + v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops);
> +
> + icd->ops = &ov2640_ops;
> +
> + ret = ov2640_video_probe(icd, client);
> + if (ret) {
> + icd->ops = NULL;
> + kfree(priv);
> + } else {
> + dev_info(&adapter->dev, "OV2640 Probed\n");
> + }
> +
> + return ret;
> +}
> +
> +static int ov2640_remove(struct i2c_client *client)
> +{
> + struct ov2640_priv *priv = to_ov2640(client);
> + struct soc_camera_device *icd = client->dev.platform_data;
> +
> + icd->ops = NULL;
> + kfree(priv);
> + return 0;
> +}
> +
> +static const struct i2c_device_id ov2640_id[] = {
> + { "ov2640", 0 },
> + { }
> +};
> +MODULE_DEVICE_TABLE(i2c, ov2640_id);
> +
> +static struct i2c_driver ov2640_i2c_driver = {
> + .driver = {
> + .name = "ov2640",
> + },
> + .probe = ov2640_probe,
> + .remove = ov2640_remove,
> + .id_table = ov2640_id,
> +};
> +
> +/*
> + * module functions
> + */
> +static int __init ov2640_module_init(void)
> +{
> + return i2c_add_driver(&ov2640_i2c_driver);
> +}
> +
> +static void __exit ov2640_module_exit(void)
> +{
> + i2c_del_driver(&ov2640_i2c_driver);
> +}
> +
> +module_init(ov2640_module_init);
> +module_exit(ov2640_module_exit);
> +
> +MODULE_DESCRIPTION("SoC Camera driver for Omni Vision 2640 sensor");
> +MODULE_AUTHOR("Alberto Panizzo");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/media/v4l2-chip-ident.h
> b/include/media/v4l2-chip-ident.h
> index 51e89f2..44fe44e 100644
> --- a/include/media/v4l2-chip-ident.h
> +++ b/include/media/v4l2-chip-ident.h
> @@ -74,6 +74,7 @@ enum {
> V4L2_IDENT_SOI968 = 256,
> V4L2_IDENT_OV9640 = 257,
> V4L2_IDENT_OV6650 = 258,
> + V4L2_IDENT_OV2640 = 259,
>
> /* module saa7146: reserved range 300-309 */
> V4L2_IDENT_SAA7146 = 300,
> --
> 1.6.3.3
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
Hello Guennadi,
On gio, 2010-12-02 at 00:32 +0100, Guennadi Liakhovetski wrote:
> Well, I have no secrets, but I'm not sure everyone on the CC list is
> really interested in this thread(s)... So, please consider dropping some
> of them when replying, they might be grateful;)
I Followed an old suggestion to add all that is showed by the
get_maintainer script. That is not always sane at this point.
>
> In general looks good, just a couple of easy to fix remarks below, and,
> please, fix line wrapping with the next version.
>
> On Sun, 28 Nov 2010, Alberto Panizzo wrote:
>
> > Signed-off-by: Alberto Panizzo <[email protected]>
> > ---
> > drivers/media/video/Kconfig | 6 +
> > drivers/media/video/Makefile | 1 +
> > drivers/media/video/ov2640.c | 1153
> > +++++++++++++++++++++++++++++++++++++++
> > include/media/v4l2-chip-ident.h | 1 +
> > 4 files changed, 1161 insertions(+), 0 deletions(-)
> > create mode 100644 drivers/media/video/ov2640.c
> >
> > diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
> > index 0efbb29..898f76f 100644
> > --- a/drivers/media/video/Kconfig
> > +++ b/drivers/media/video/Kconfig
> > @@ -807,6 +807,12 @@ config SOC_CAMERA_OV9640
> > help
> > This is a ov9640 camera driver
> >
> > +config SOC_CAMERA_OV2640
> > + tristate "ov2640 camera support"
> > + depends on SOC_CAMERA && I2C
> > + help
> > + This is a ov2640 camera driver
> > +
>
> might as well keep them alphabetically and numerically ordered
>
> > config MX1_VIDEO
> > bool
> >
> > diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
> > index af79d47..fac185d 100644
> > --- a/drivers/media/video/Makefile
> > +++ b/drivers/media/video/Makefile
> > @@ -82,6 +82,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o
> > obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o
> > obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o
> > obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o
> > +obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o
>
> ditto
>
> > obj-$(CONFIG_SOC_CAMERA_RJ54N1) += rj54n1cb0c.o
> > obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o
> >
> > diff --git a/drivers/media/video/ov2640.c b/drivers/media/video/ov2640.c
> > new file mode 100644
> > index 0000000..5edf23e
> > --- /dev/null
> > +++ b/drivers/media/video/ov2640.c
> > @@ -0,0 +1,1153 @@
> > +/*
> > + * ov2640 Camera Driver
> > + *
> > + * Copyright (C) 2010 Alberto Panizzo <[email protected]>
> > + *
> > + * Based on ov772x, ov9640 drivers and previous non merged
> > implementations.
>
> Wrapped lines throughout the patch
>
> > + *
> > + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights
> > Reserved.
> > + * Copyright (C) 2006, OmniVision
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#include <linux/init.h>
> > +#include <linux/module.h>
> > +#include <linux/i2c.h>
> > +#include <linux/slab.h>
> > +#include <linux/delay.h>
> > +#include <linux/videodev2.h>
> > +#include <media/v4l2-chip-ident.h>
> > +#include <media/v4l2-subdev.h>
> > +#include <media/soc_camera.h>
> > +#include <media/soc_mediabus.h>
> > +
> > +#define VAL_SET(x, mask, rshift, lshift) \
> > + ((((x) >> rshift) & mask) << lshift)
> > +/*
> > + * DSP registers
> > + * register offset for BANK_SEL == BANK_SEL_DSP
> > + */
> > +#define R_BYPASS 0x05 /* Bypass DSP */
> > +#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP. sensor out directly
> > */
> > +#define R_BYPASS_USE_DSP 0x00 /* Bypass DSP. sensor out directly
> > */
>
> Second comment wrong?
>
> > +#define QS 0x44 /* Quantization Scale Factor */
> > +#define CTRLI 0x50
> > +#define CTRLI_LP_DP 0x80
> > +#define CTRLI_ROUND 0x40
> > +#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
> > +#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
> > +#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
> > +#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
> > +#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
> > +#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
> > +#define XOFFL 0x53 /* OFFSET_X[7:0] */
> > +#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
> > +#define YOFFL 0x54 /* OFFSET_Y[7:0] */
> > +#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
> > +#define VHYX 0x55 /* Offset and size completion */
> > +#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
> > +#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
> > +#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
> > +#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
> > +#define DPRP 0x56
> > +#define TEST 0x57 /* Horizontal size completion */
> > +#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
> > +#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
> > +#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
> > +#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
> > +#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
> > +#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
> > +#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
> > +#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
> > +#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
> > +#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
> > +#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
> > +#define CTRL2 0x86 /* DSP Module enable 2 */
> > +#define CTRL2_DCW_EN 0x20
> > +#define CTRL2_SDE_EN 0x10
> > +#define CTRL2_UV_ADJ_EN 0x08
> > +#define CTRL2_UV_AVG_EN 0x04
> > +#define CTRL2_CMX_EN 0x01
> > +#define CTRL3 0x87 /* DSP Module enable 3 */
> > +#define CTRL3_BPC_EN 0x80
> > +#define CTRL3_WPC_EN 0x40
> > +#define SIZEL 0x8C /* Image Size Completion */
> > +#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
> > +#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
> > +#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
> > +#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
> > +#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
> > +#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
> > +#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
> > +#define CTRL0 0xC2 /* DSP Module enable 0 */
> > +#define CTRL0_AEC_EN 0x80
> > +#define CTRL0_AEC_SEL 0x40
> > +#define CTRL0_STAT_SEL 0x20
> > +#define CTRL0_VFIRST 0x10
> > +#define CTRL0_YUV422 0x08
> > +#define CTRL0_YUV_EN 0x04
> > +#define CTRL0_RGB_EN 0x02
> > +#define CTRL0_RAW_EN 0x01
> > +#define CTRL1 0xC3 /* DSP Module enable 1 */
> > +#define CTRL1_CIP 0x80
> > +#define CTRL1_DMY 0x40
> > +#define CTRL1_RAW_GMA 0x20
> > +#define CTRL1_DG 0x10
> > +#define CTRL1_AWB 0x08
> > +#define CTRL1_AWB_GAIN 0x04
> > +#define CTRL1_LENC 0x02
> > +#define CTRL1_PRE 0x01
> > +#define R_DVP_SP 0xD3 /* DVP output speed control */
> > +#define R_DVP_SP_AUTO_MODE 0x80
> > +#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0]
> > (YUV0);
> > + * = sysclk (48)/(2*[6:0]) (RAW);*/
> > +#define IMAGE_MODE 0xDA /* Image Output Format Select */
> > +#define IMAGE_MODE_Y8_DVP_EN 0x40
> > +#define IMAGE_MODE_JPEG_EN 0x10
> > +#define IMAGE_MODE_YUV422 0x00
> > +#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
> > +#define IMAGE_MODE_RGB565 0x08
> > +#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG
> > output
> > + * mode (0 for HREF is same as sensor) */
> > +#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
> > + * 1: Low byte first UYVY (C2[4] =0)
> > + * VYUY (C2[4] =1)
> > + * 0: High byte first YUYV (C2[4]=0)
> > + * YVYU (C2[4] = 1) */
> > +#define RESET 0xE0 /* Reset */
> > +#define RESET_MICROC 0x40
> > +#define RESET_SCCB 0x20
> > +#define RESET_JPEG 0x10
> > +#define RESET_DVP 0x04
> > +#define RESET_IPU 0x02
> > +#define RESET_CIF 0x01
> > +#define REGED 0xED /* Register ED */
> > +#define REGED_CLK_OUT_DIS 0x10
> > +#define MS_SP 0xF0 /* SCCB Master Speed */
> > +#define SS_ID 0xF7 /* SCCB Slave ID */
> > +#define SS_CTRL 0xF8 /* SCCB Slave Control */
> > +#define SS_CTRL_ADD_AUTO_INC 0x20
> > +#define SS_CTRL_EN 0x08
> > +#define SS_CTRL_DELAY_CLK 0x04
> > +#define SS_CTRL_ACC_EN 0x02
> > +#define SS_CTRL_SEN_PASS_THR 0x01
> > +#define MC_BIST 0xF9 /* Microcontroller misc register */
> > +#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
> > +#define MC_BIST_BOOT_ROM_SEL 0x40
> > +#define MC_BIST_12KB_SEL 0x20
> > +#define MC_BIST_12KB_MASK 0x30
> > +#define MC_BIST_512KB_SEL 0x08
> > +#define MC_BIST_512KB_MASK 0x0C
> > +#define MC_BIST_BUSY_BIT_R 0x02
> > +#define MC_BIST_MC_RES_ONE_SH_W 0x02
> > +#define MC_BIST_LAUNCH 0x01
> > +#define BANK_SEL 0xFF /* Register Bank Select */
> > +#define BANK_SEL_DSP 0x00
> > +#define BANK_SEL_SENS 0x01
> > +
> > +/*
> > + * Sensor registers
> > + * register offset for BANK_SEL == BANK_SEL_SENS
> > + */
> > +#define GAIN 0x00 /* AGC - Gain control gain setting */
> > +#define COM1 0x03 /* Common control 1 */
> > +#define COM1_1_DUMMY_FR 0x40
> > +#define COM1_3_DUMMY_FR 0x80
> > +#define COM1_7_DUMMY_FR 0xC0
> > +#define COM1_VWIN_LSB_UXGA 0x0F
> > +#define COM1_VWIN_LSB_SVGA 0x0A
> > +#define COM1_VWIN_LSB_CIF 0x06
> > +#define REG04 0x04 /* Register 04 */
> > +#define REG04_DEF 0x20 /* Always set */
> > +#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF
> > */
> > +#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
> > +#define REG04_VREF_EN 0x10
> > +#define REG04_HREF_EN 0x08
> > +#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
> > +#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge
> > Row Num */
> > +#define COM2 0x09 /* Common control 2 */
> > +#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
> > + /* Output drive capability */
> > +#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
> > +#define PID 0x0A /* Product ID Number MSB */
> > +#define VER 0x0B /* Product ID Number LSB */
> > +#define COM3 0x0C /* Common control 3 */
> > +#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
> > +#define COM3_BAND_AUTO 0x02 /* Auto Banding */
> > +#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output
> > after the
> > + * snapshot sequence*/
> > +#define AEC 0x10 /* AEC[9:2] Exposure Value */
> > +#define CLKRC 0x11 /* Internal clock */
> > +#define CLKRC_EN 0x80
> > +#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
> > +#define COM7 0x12 /* Common control 7 */
> > +#define COM7_SRST 0x80 /* Initiates system reset. All
> > registers are
> > + * set to factory default values after which
> > + * the chip resumes normal operation */
> > +#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
> > +#define COM7_RES_SVGA 0x40 /* SVGA */
> > +#define COM7_RES_CIF 0x20 /* CIF */
> > +#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
> > +#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
> > +#define COM8 0x13 /* Common control 8 */
> > +#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
> > +#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
> > +#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control
> > selection */
> > +#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
> > +#define COM9 0x14 /* Common control 9
> > + * Automatic gain ceiling - maximum AGC value [7:5]*/
> > +#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
> > +#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
> > +#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
> > +#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
> > +#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
> > +#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
> > +#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
> > +#define COM10 0x15 /* Common control 10 */
> > +#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
> > +#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising
> > edge of
> > + * PCLK (user can latch data at the next
> > + * falling edge of PCLK).
> > + * 0 otherwise. */
> > +#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
> > + * HREF negative for valid data*/
> > +#define COM10_VSINC_INV 0x02 /* Invert VSYNC polarity */
> > +#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
> > +#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
> > +#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
> > +#define VEND 0x1A /* Vertical Window end MSB 8 bit */
> > +#define MIDH 0x1C /* Manufacturer ID byte - high */
> > +#define MIDL 0x1D /* Manufacturer ID byte - low */
> > +#define AEW 0x24 /* AGC/AEC - Stable operating region (upper
> > limit) */
> > +#define AEB 0x25 /* AGC/AEC - Stable operating region (lower
> > limit) */
> > +#define VV 0x26 /* AGC/AEC Fast mode operating region */
> > +#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
> > +#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
> > +#define REG2A 0x2A /* Dummy pixel insert MSB */
> > +#define FRARL 0x2B /* Dummy pixel insert LSB */
> > +#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical
> > direction */
> > +#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical
> > direction */
> > +#define YAVG 0x2F /* Y/G Channel Average value */
> > +#define REG32 0x32 /* Common Control 32 */
> > +#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
> > +#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
> > +#define ARCOM2 0x34 /* Zoom: Horizontal start point */
> > +#define REG45 0x45 /* Register 45 */
> > +#define FLL 0x46 /* Frame Length Adjustment LSBs */
> > +#define FLH 0x47 /* Frame Length Adjustment MSBs */
> > +#define COM19 0x48 /* Zoom: Vertical start point */
> > +#define ZOOMS 0x49 /* Zoom: Vertical start point */
> > +#define COM22 0x4B /* Flash light control */
> > +#define COM25 0x4E /* For Banding operations */
> > +#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
> > +#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
> > +#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight
> > option */
> > +#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight
> > option */
> > +#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight
> > option */
> > +#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight
> > option */
> > +#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
> > +#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
> > +
> > +/*
> > + * ID
> > + */
> > +#define MANUFACTURER_ID 0x7FA2
> > +#define PID_OV2640 0x2642
> > +#define VERSION(pid, ver) ((pid<<8)|(ver&0xFF))
>
> please, add spaces
>
> > +
> > +/*
> > + * struct
> > + */
> > +struct regval_list {
> > + u8 reg_num;
> > + u16 value;
> > +};
> > +
> > +/* supported resolutions */
> > +enum ov2640_width_sizes {
>
> nitpicking really, but wouldn't "enum ov2640_width" be descriptive enough?
>
> > + W_QCIF = 176,
> > + W_QVGA = 320,
> > + W_CIF = 352,
> > + W_VGA = 640,
> > + W_SVGA = 800,
> > + W_XGA = 1024,
> > + W_SXGA = 1280,
> > + W_UXGA = 1600,
> > +};
> > +
> > +enum ov2640_height_sizes {
>
> ditto
>
> > + H_QCIF = 144,
> > + H_QVGA = 240,
> > + H_CIF = 288,
> > + H_VGA = 480,
> > + H_SVGA = 600,
> > + H_XGA = 768,
> > + H_SXGA = 1024,
> > + H_UXGA = 1200,
> > +};
> > +
> > +struct ov2640_win_size {
> > + char *name;
> > + enum ov2640_width_sizes width;
> > + enum ov2640_height_sizes height;
> > + const struct regval_list *regs;
> > +};
> > +
> > +
> > +struct ov2640_priv {
> > + struct v4l2_subdev subdev;
> > + struct ov2640_camera_info *info;
> > + enum v4l2_mbus_pixelcode cfmt_code;
> > + const struct ov2640_win_size *win;
> > + int model;
> > + u16 flag_vflip:1;
> > + u16 flag_hflip:1;
> > +};
> > +
> > +/*
> > + * Registers settings
> > + */
> > +
> > +#define ENDMARKER { 0xff, 0xff }
> > +
> > +static const struct regval_list ov2640_init_regs[] = {
> > + { BANK_SEL, BANK_SEL_DSP },
> > + { 0x2c, 0xff },
> > + { 0x2e, 0xdf },
> > + { BANK_SEL, BANK_SEL_SENS },
> > + { 0x3c, 0x32 },
> > + { CLKRC, CLKRC_DIV_SET(1) },
> > + { COM2, COM2_OCAP_Nx_SET(3) },
> > + { REG04, REG04_DEF | REG04_HREF_EN },
> > + { COM8, COM8_DEF | COM8_BNDF_EN | COM8_AGC_EN | COM8_AEC_EN },
> > + { COM9, COM9_AGC_GAIN_8x | 0x08},
> > + { 0x2c, 0x0c },
> > + { 0x33, 0x78 },
> > + { 0x3a, 0x33 },
> > + { 0x3b, 0xfb },
> > + { 0x3e, 0x00 },
> > + { 0x43, 0x11 },
> > + { 0x16, 0x10 },
> > + { 0x39, 0x02 },
> > + { 0x35, 0x88 },
> > + { 0x22, 0x0a },
> > + { 0x37, 0x40 },
> > + { 0x23, 0x00 },
> > + { ARCOM2, 0xa0 },
> > + { 0x06, 0x02 },
> > + { 0x06, 0x88 },
> > + { 0x07, 0xc0 },
> > + { 0x0d, 0xb7 },
> > + { 0x0e, 0x01 },
> > + { 0x4c, 0x00 },
> > + { 0x4a, 0x81 },
> > + { 0x21, 0x99 },
> > + { AEW, 0x40 },
> > + { AEB, 0x38 },
> > + { VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
> > + { 0x5c, 0x00 },
> > + { 0x63, 0x00 },
> > + { FLL, 0x22 },
> > + { COM3, 0x38 | COM3_BAND_AUTO },
> > + { REG5D, 0x55 },
> > + { REG5E, 0x7d },
> > + { REG5F, 0x7d },
> > + { REG60, 0x55 },
> > + { HISTO_LOW, 0x70 },
> > + { HISTO_HIGH, 0x80 },
> > + { 0x7c, 0x05 },
> > + { 0x20, 0x80 },
> > + { 0x28, 0x30 },
> > + { 0x6c, 0x00 },
> > + { 0x6d, 0x80 },
> > + { 0x6e, 0x00 },
> > + { 0x70, 0x02 },
> > + { 0x71, 0x94 },
> > + { 0x73, 0xc1 },
> > + { 0x3d, 0x34 },
> > + { COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
> > + { 0x5a, 0x57 },
> > + { BD50, 0xbb },
> > + { BD60, 0x9c },
> > + { BANK_SEL, BANK_SEL_DSP },
> > + { 0xe5, 0x7f },
> > + { MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
> > + { 0x41, 0x24 },
> > + { RESET, RESET_JPEG | RESET_DVP },
> > + { 0x76, 0xff },
> > + { 0x33, 0xa0 },
> > + { 0x42, 0x20 },
> > + { 0x43, 0x18 },
> > + { 0x4c, 0x00 },
> > + { CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
> > + { 0x88, 0x3f },
> > + { 0xd7, 0x03 },
> > + { 0xd9, 0x10 },
> > + { R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
> > + { 0xc8, 0x08 },
> > + { 0xc9, 0x80 },
> > + { BPADDR, 0x00 },
> > + { BPDATA, 0x00 },
> > + { BPADDR, 0x03 },
> > + { BPDATA, 0x48 },
> > + { BPDATA, 0x48 },
> > + { BPADDR, 0x08 },
> > + { BPDATA, 0x20 },
> > + { BPDATA, 0x10 },
> > + { BPDATA, 0x0e },
> > + { 0x90, 0x00 },
> > + { 0x91, 0x0e },
> > + { 0x91, 0x1a },
> > + { 0x91, 0x31 },
> > + { 0x91, 0x5a },
> > + { 0x91, 0x69 },
> > + { 0x91, 0x75 },
> > + { 0x91, 0x7e },
> > + { 0x91, 0x88 },
> > + { 0x91, 0x8f },
> > + { 0x91, 0x96 },
> > + { 0x91, 0xa3 },
> > + { 0x91, 0xaf },
> > + { 0x91, 0xc4 },
> > + { 0x91, 0xd7 },
> > + { 0x91, 0xe8 },
> > + { 0x91, 0x20 },
> > + { 0x92, 0x00 },
> > + { 0x93, 0x06 },
> > + { 0x93, 0xe3 },
> > + { 0x93, 0x03 },
> > + { 0x93, 0x03 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x02 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x93, 0x00 },
> > + { 0x96, 0x00 },
> > + { 0x97, 0x08 },
> > + { 0x97, 0x19 },
> > + { 0x97, 0x02 },
> > + { 0x97, 0x0c },
> > + { 0x97, 0x24 },
> > + { 0x97, 0x30 },
> > + { 0x97, 0x28 },
> > + { 0x97, 0x26 },
> > + { 0x97, 0x02 },
> > + { 0x97, 0x98 },
> > + { 0x97, 0x80 },
> > + { 0x97, 0x00 },
> > + { 0x97, 0x00 },
> > + { 0xa4, 0x00 },
> > + { 0xa8, 0x00 },
> > + { 0xc5, 0x11 },
> > + { 0xc6, 0x51 },
> > + { 0xbf, 0x80 },
> > + { 0xc7, 0x10 },
> > + { 0xb6, 0x66 },
> > + { 0xb8, 0xA5 },
> > + { 0xb7, 0x64 },
> > + { 0xb9, 0x7C },
> > + { 0xb3, 0xaf },
> > + { 0xb4, 0x97 },
> > + { 0xb5, 0xFF },
> > + { 0xb0, 0xC5 },
> > + { 0xb1, 0x94 },
> > + { 0xb2, 0x0f },
> > + { 0xc4, 0x5c },
> > + { 0xa6, 0x00 },
> > + { 0xa7, 0x20 },
> > + { 0xa7, 0xd8 },
> > + { 0xa7, 0x1b },
> > + { 0xa7, 0x31 },
> > + { 0xa7, 0x00 },
> > + { 0xa7, 0x18 },
> > + { 0xa7, 0x20 },
> > + { 0xa7, 0xd8 },
> > + { 0xa7, 0x19 },
> > + { 0xa7, 0x31 },
> > + { 0xa7, 0x00 },
> > + { 0xa7, 0x18 },
> > + { 0xa7, 0x20 },
> > + { 0xa7, 0xd8 },
> > + { 0xa7, 0x19 },
> > + { 0xa7, 0x31 },
> > + { 0xa7, 0x00 },
> > + { 0xa7, 0x18 },
> > + { 0x7f, 0x00 },
> > + { 0xe5, 0x1f },
> > + { 0xe1, 0x77 },
> > + { 0xdd, 0x7f },
> > + { CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN | CTRL0_RGB_EN },
> > + ENDMARKER,
> > +};
>
> Nice, have I mentioned, how I don't find such register lists particularly
> developer-friendly?:) But this is one of the cases where I don't think
> requesting you to open code this one would be a wise way to spend your
> time, even if it is done in emacs with something around 50 key-strokes;)
> Hm, these repeated writes to unnamed registers 0x91, 0x93, 0x97, 0xa7 look
> like some writing to internal memory, perhaps?
This is the effect of the real problem that I faced working with this
device: Datasheets are really hard to find and the one that I have is
lacking in half of registers description.
I've done a lot of work making sense within pure numeric arrays with
the result that you can see, but all the residual pure numeric values
have an hidden meaning also for me. As I wrote in the copyright this
driver follow two versions from OV and Freescale and in both, there
are always pure numeric arrays for manipulating camera registers.
>
> > +
> > +/*
> > + * register setting for window size
> > + * The preamble setup the internal DSP to input a UXGA (1600x1200)
> > image,
> > + * then the different zooming configurations will set up the output
> > image size.
> > + */
> > +static const struct regval_list ov2640_size_change_preamble_regs[] = {
> > + { BANK_SEL, BANK_SEL_DSP },
> > + { RESET, RESET_DVP },
> > + { HSIZE8, HSIZE8_SET(W_UXGA) }, { VSIZE8, VSIZE8_SET(H_UXGA) },
> > + { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
> > + CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
> > + { HSIZE, HSIZE_SET(W_UXGA) }, { VSIZE, VSIZE_SET(H_UXGA) },
> > + { XOFFL, XOFFL_SET(0) }, { YOFFL, YOFFL_SET(0) },
>
> IMHO this would look prettier one-per-line, similarly below
>
> > + { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
> > + VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
> > + { TEST, TEST_HSIZE_SET(W_UXGA) },
> > + ENDMARKER,
> > +};
> > +
> > +#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
> > + { CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
> > + CTRLI_H_DIV_SET(h_div)}, \
> > + { ZMOW, ZMOW_OUTW_SET(x) }, { ZMOH, ZMOH_OUTH_SET(y) }, \
> > + { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
> > + { R_DVP_SP, pclk_div }, \
> > + { RESET, 0x00}
> > +
> > +static const struct regval_list ov2640_qcif_regs[] = {
> > + PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_qvga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_cif_regs[] = {
> > + PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_vga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_svga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_xga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
> > + { CTRLI, 0x00},
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_sxga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
> > + { CTRLI, 0x00},
> > + { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_uxga_regs[] = {
> > + PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
> > + { CTRLI, 0x00},
> > + { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
> > + ENDMARKER,
> > +};
> > +
> > +#define OV2640_SIZE(n, w, h, r) \
> > + {.name = n, .width = w , .height = h, .regs = r }
> > +
> > +static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
> > + OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
> > + OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
> > + OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
> > + OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
> > + OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
> > + OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
> > + OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
> > + OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
> > +};
> > +
> > +/*
> > + * Register settings for pixel formats
> > + */
> > +static const struct regval_list ov2640_format_change_preamble_regs[] =
> > {
> > + { BANK_SEL, BANK_SEL_DSP },
> > + { R_BYPASS, R_BYPASS_USE_DSP },
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_yuv422_regs[] = {
> > + { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
> > + { 0xD7, 0x01 },
> > + { 0x33, 0xa0 },
> > + { 0xe1, 0x67 },
> > + { RESET, 0x00 },
> > + { R_BYPASS, R_BYPASS_USE_DSP },
> > + ENDMARKER,
> > +};
> > +
> > +static const struct regval_list ov2640_rgb565_regs[] = {
> > + { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
> > + { 0xd7, 0x03 },
> > + { RESET, 0x00 },
> > + { R_BYPASS, R_BYPASS_USE_DSP },
> > + ENDMARKER,
> > +};
> > +
> > +static enum v4l2_mbus_pixelcode ov2640_codes[] = {
> > + V4L2_MBUS_FMT_UYVY8_2X8,
> > + V4L2_MBUS_FMT_RGB565_2X8_LE,
>
> Have you also tested rgb565?
Yes, with the patch that I proposed for mx3_camera, rgb565 is working
well :)
>
> > +};
> > +
> > +/*
> > + * Supported controls
> > + */
> > +static const struct v4l2_queryctrl ov2640_controls[] = {
> > + {
> > + .id = V4L2_CID_VFLIP,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "Flip Vertically",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + }, {
> > + .id = V4L2_CID_HFLIP,
> > + .type = V4L2_CTRL_TYPE_BOOLEAN,
> > + .name = "Flip Horizontally",
> > + .minimum = 0,
> > + .maximum = 1,
> > + .step = 1,
> > + .default_value = 0,
> > + },
> > +};
> > +
> > +/*
> > + * general functions
> > + */
> > +static struct ov2640_priv *to_ov2640(const struct i2c_client *client)
> > +{
> > + return container_of(i2c_get_clientdata(client), struct ov2640_priv,
> > + subdev);
> > +}
> > +
> > +static int ov2640_write_array(struct i2c_client *client,
> > + const struct regval_list *vals)
> > +{
> > + int ret;
> > +
> > + while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
> > + ret = i2c_smbus_write_byte_data(client,
> > + vals->reg_num,
> > + vals->value & 0xFF);
>
> Well, you trust and don't check, that register numbers are within range,
> so, you might just as well trust the value.
>
> > + dev_vdbg(&client->dev, "array: 0x%02x, 0x%02x",
> > + vals->reg_num, vals->value & 0xFF);
>
> ditto
>
> > + if (ret < 0)
> > + return ret;
> > + vals++;
> > + }
> > + return 0;
> > +}
> > +
> > +static int ov2640_mask_set(struct i2c_client *client,
> > + u8 reg, u8 mask, u8 set)
> > +{
> > + s32 val = i2c_smbus_read_byte_data(client, reg);
> > + if (val < 0)
> > + return val;
> > +
> > + val &= ~mask;
> > + val |= set & mask;
> > +
> > + dev_vdbg(&client->dev, "masks: 0x%02x, 0x%02x",
> > + reg, val);
> > + return i2c_smbus_write_byte_data(client, reg, val);
> > +}
> > +
> > +static int ov2640_reset(struct i2c_client *client)
> > +{
> > + int ret;
> > + const struct regval_list reset_seq[] = {
> > + {BANK_SEL, BANK_SEL_SENS},
> > + {COM7, COM7_SRST},
> > + ENDMARKER,
> > + };
> > +
> > + ret = ov2640_write_array(client, reset_seq);
> > + if (ret)
> > + goto err;
> > +
> > + msleep(5);
> > +err:
> > + dev_dbg(&client->dev, "%s: (ret %d)", __func__, ret);
> > + return ret;
> > +}
> > +
> > +/*
> > + * soc_camera_ops functions
> > + */
> > +static int ov2640_s_stream(struct v4l2_subdev *sd, int enable)
> > +{
> > + return 0;
> > +}
> > +
> > +static int ov2640_set_bus_param(struct soc_camera_device *icd,
> > + unsigned long flags)
> > +{
> > + return 0;
> > +}
> > +
> > +static unsigned long ov2640_query_bus_param(struct soc_camera_device
> > *icd)
> > +{
> > + struct soc_camera_link *icl = to_soc_camera_link(icd);
> > + unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
> > + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
> > + SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
>
> If I understand this correctly, your sensor has just 10 data lines, and
> has no configuration to switch to any other bus width. Then I wouldn#t
> advertise 8 and 10 bits here. Please, have a look how this is done, e.g.,
> in mt9m001.c. There we're trying to reflect the configuration more
> correctly: the sensor can do 10 bits only. But the platform can override
> this, if only some data lines are actually connected on the board.
>
> > +
> > + return soc_camera_apply_sensor_flags(icl, flags);
> > +}
> > +
> > +static int ov2640_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control
> > *ctrl)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + struct ov2640_priv *priv = to_ov2640(client);
> > +
> > + switch (ctrl->id) {
> > + case V4L2_CID_VFLIP:
> > + ctrl->value = priv->flag_vflip;
> > + break;
> > + case V4L2_CID_HFLIP:
> > + ctrl->value = priv->flag_hflip;
> > + break;
> > + }
> > + return 0;
> > +}
> > +
> > +static int ov2640_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control
> > *ctrl)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + struct ov2640_priv *priv = to_ov2640(client);
> > + int ret = 0;
> > + u8 val;
> > +
> > + switch (ctrl->id) {
> > + case V4L2_CID_VFLIP:
> > + val = ctrl->value ? REG04_VFLIP_IMG : 0x00;
> > + priv->flag_vflip = ctrl->value ? 1 : 0;
> > + ret = ov2640_mask_set(client, REG04, REG04_VFLIP_IMG, val);
> > + break;
> > + case V4L2_CID_HFLIP:
> > + val = ctrl->value ? REG04_HFLIP_IMG : 0x00;
> > + priv->flag_hflip = ctrl->value ? 1 : 0;
> > + ret = ov2640_mask_set(client, REG04, REG04_HFLIP_IMG, val);
> > + break;
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +static int ov2640_g_chip_ident(struct v4l2_subdev *sd,
> > + struct v4l2_dbg_chip_ident *id)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + struct ov2640_priv *priv = to_ov2640(client);
> > +
> > + id->ident = priv->model;
> > + id->revision = 0;
> > +
> > + return 0;
> > +}
> > +
> > +#ifdef CONFIG_VIDEO_ADV_DEBUG
> > +static int ov2640_g_register(struct v4l2_subdev *sd,
> > + struct v4l2_dbg_register *reg)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + int ret;
> > +
> > + reg->size = 1;
> > + if (reg->reg > 0xff)
> > + return -EINVAL;
> > +
> > + ret = i2c_smbus_read_byte_data(client, reg->reg);
> > + if (ret < 0)
> > + return ret;
> > +
> > + reg->val = (__u64)ret;
>
> Is this type-cast really needed?
>
> > +
> > + return 0;
> > +}
> > +
> > +static int ov2640_s_register(struct v4l2_subdev *sd,
> > + struct v4l2_dbg_register *reg)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > +
> > + if (reg->reg > 0xff ||
> > + reg->val > 0xff)
> > + return -EINVAL;
> > +
> > + return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
> > +}
> > +#endif
> > +
> > +/* select nearest higher resolution for capture */
> > +static const struct ov2640_win_size *ov2640_select_win(u32 *width, u32
> > *height)
> > +{
> > + int i, def = ARRAY_SIZE(ov2640_supported_win_sizes) - 1;
> > +
> > + for (i = 0; i < ARRAY_SIZE(ov2640_supported_win_sizes); i++) {
>
> + for (i = 0; i <= def; i++) {
>
> would do too
>
> > + if (ov2640_supported_win_sizes[i].width >= *width &&
> > + ov2640_supported_win_sizes[i].height >= *height) {
> > + *width = ov2640_supported_win_sizes[i].width;
> > + *height = ov2640_supported_win_sizes[i].height;
> > + return &ov2640_supported_win_sizes[i];
> > + }
> > + }
> > +
> > + *width = ov2640_supported_win_sizes[def].width;
> > + *height = ov2640_supported_win_sizes[def].height;
> > + return &ov2640_supported_win_sizes[def];
> > +}
> > +
> > +static int ov2640_set_params(struct i2c_client *client, u32 *width, u32
> > *height,
> > + enum v4l2_mbus_pixelcode code)
> > +{
> > + struct ov2640_priv *priv = to_ov2640(client);
> > + const struct regval_list *selected_cfmt_regs;
> > + int ret = -EINVAL;
> > +
> > + /* select win */
> > + priv->win = ov2640_select_win(width, height);
> > +
> > + /* select format */
> > + priv->cfmt_code = 0;
> > + switch (code) {
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
> > + selected_cfmt_regs = ov2640_rgb565_regs;
> > + break;
> > + default:
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
> > + selected_cfmt_regs = ov2640_yuv422_regs;
> > + }
> > +
> > + /* reset hardware */
> > + ov2640_reset(client);
>
> hmm, what exactly does this reset do? It probably doesn't reset register
> values, right? it only resets frame capture or what?
It does a System reset that reset all registers values.
This is why, every time, I redo the whole init sequence.
>
> > +
> > + dev_dbg(&client->dev, "%s: Init default", __func__);
> > + /* Initialize the sensor with default data */
> > + ret = ov2640_write_array(client, ov2640_init_regs);
> > + if (ret < 0)
> > + goto err;
> > +
> > + dev_dbg(&client->dev, "%s: Set size to %s", __func__,
> > priv->win->name);
> > + /* Select preamble */
> > + ret = ov2640_write_array(client, ov2640_size_change_preamble_regs);
> > + if (ret < 0)
> > + goto err;
> > +
> > + /* set size win */
> > + ret = ov2640_write_array(client, priv->win->regs);
> > + if (ret < 0)
> > + goto err;
> > +
> > + dev_dbg(&client->dev, "%s: Set cfmt", __func__);
> > + /* Cfmt preamble */
> > + ret = ov2640_write_array(client, ov2640_format_change_preamble_regs);
> > + if (ret < 0)
> > + goto err;
> > +
> > + /* set cfmt */
> > + ret = ov2640_write_array(client, selected_cfmt_regs);
> > + if (ret < 0)
> > + goto err;
> > +
> > + priv->cfmt_code = code;
> > + *width = priv->win->width;
> > + *height = priv->win->height;
> > +
> > + return ret;
> > +
> > +err:
> > + dev_err(&client->dev, "%s: Error %d", __func__, ret);
> > + ov2640_reset(client);
> > + priv->win = NULL;
> > +
> > + return ret;
> > +}
> > +
> > +static int ov2640_g_fmt(struct v4l2_subdev *sd,
> > + struct v4l2_mbus_framefmt *mf)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + struct ov2640_priv *priv = to_ov2640(client);
> > +
> > + if (!priv->win) {
> > + u32 width = W_SVGA, height = H_SVGA;
> > + int ret = ov2640_set_params(client, &width, &height,
> > + V4L2_MBUS_FMT_UYVY8_2X8);
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > + mf->width = priv->win->width;
> > + mf->height = priv->win->height;
> > + mf->code = priv->cfmt_code;
> > +
> > + switch (mf->code) {
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + mf->colorspace = V4L2_COLORSPACE_SRGB;
> > + break;
> > + default:
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + mf->colorspace = V4L2_COLORSPACE_JPEG;
> > + }
> > + mf->field = V4L2_FIELD_NONE;
> > +
> > + return 0;
> > +}
> > +
> > +static int ov2640_s_fmt(struct v4l2_subdev *sd,
> > + struct v4l2_mbus_framefmt *mf)
> > +{
> > + struct i2c_client *client = v4l2_get_subdevdata(sd);
> > + int ret;
> > +
> > +
> > + switch (mf->code) {
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + mf->colorspace = V4L2_COLORSPACE_SRGB;
> > + break;
> > + default:
> > + mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + mf->colorspace = V4L2_COLORSPACE_JPEG;
> > + }
> > +
> > + ret = ov2640_set_params(client, &mf->width, &mf->height,
> > + mf->code);
> > +
> > + return ret;
> > +}
> > +
> > +static int ov2640_try_fmt(struct v4l2_subdev *sd,
> > + struct v4l2_mbus_framefmt *mf)
> > +{
> > + const struct ov2640_win_size *win;
> > +
> > + /*
> > + * select suitable win
> > + */
> > + win = ov2640_select_win(&mf->width, &mf->height);
> > +
> > + mf->field = V4L2_FIELD_NONE;
> > +
> > + switch (mf->code) {
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + mf->colorspace = V4L2_COLORSPACE_SRGB;
> > + break;
> > + default:
> > + mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + mf->colorspace = V4L2_COLORSPACE_JPEG;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int ov2640_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
> > + enum v4l2_mbus_pixelcode *code)
> > +{
> > + if (index >= ARRAY_SIZE(ov2640_codes))
> > + return -EINVAL;
> > +
> > + *code = ov2640_codes[index];
> > + return 0;
> > +}
> > +
> > +static int ov2640_video_probe(struct soc_camera_device *icd,
> > + struct i2c_client *client)
> > +{
> > + struct ov2640_priv *priv = to_ov2640(client);
> > + u8 pid, ver, midh, midl;
> > + const char *devname;
> > + int ret;
> > +
> > + /*
> > + * We must have a parent by now. And it cannot be a wrong one.
> > + * So this entire test is completely redundant.
> > + */
> > + if (!icd->dev.parent ||
> > + to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
> > + dev_err(&client->dev, "Parent missing or invalid!\n");
> > + ret = -ENODEV;
> > + goto err;
> > + }
> > +
> > + /*
> > + * check and show product ID and manufacturer ID
> > + */
> > + i2c_smbus_write_byte_data(client, BANK_SEL, BANK_SEL_SENS);
> > + pid = i2c_smbus_read_byte_data(client, PID);
> > + ver = i2c_smbus_read_byte_data(client, VER);
> > + midh = i2c_smbus_read_byte_data(client, MIDH);
> > + midl = i2c_smbus_read_byte_data(client, MIDL);
> > +
> > + switch (VERSION(pid, ver)) {
> > + case PID_OV2640:
> > + devname = "ov2640";
> > + priv->model = V4L2_IDENT_OV2640;
> > + break;
> > + default:
> > + dev_err(&client->dev,
> > + "Product ID error %x:%x\n", pid, ver);
> > + ret = -ENODEV;
> > + goto err;
> > + }
> > +
> > + dev_info(&client->dev,
> > + "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
> > + devname, pid, ver, midh, midl);
> > +
> > + return 0;
> > +
> > +err:
> > + return ret;
> > +}
> > +
> > +static struct soc_camera_ops ov2640_ops = {
> > + .set_bus_param = ov2640_set_bus_param,
> > + .query_bus_param = ov2640_query_bus_param,
> > + .controls = ov2640_controls,
> > + .num_controls = ARRAY_SIZE(ov2640_controls),
> > +};
> > +
> > +static struct v4l2_subdev_core_ops ov2640_subdev_core_ops = {
> > + .g_ctrl = ov2640_g_ctrl,
> > + .s_ctrl = ov2640_s_ctrl,
> > + .g_chip_ident = ov2640_g_chip_ident,
> > +#ifdef CONFIG_VIDEO_ADV_DEBUG
> > + .g_register = ov2640_g_register,
> > + .s_register = ov2640_s_register,
> > +#endif
> > +};
> > +
> > +static struct v4l2_subdev_video_ops ov2640_subdev_video_ops = {
> > + .s_stream = ov2640_s_stream,
> > + .g_mbus_fmt = ov2640_g_fmt,
> > + .s_mbus_fmt = ov2640_s_fmt,
> > + .try_mbus_fmt = ov2640_try_fmt,
> > + .enum_mbus_fmt = ov2640_enum_fmt,
>
> Please, also implement at least a .cropcap, maybe also .g_crop - both
> trivial for your case of a constant sensor window.
Ok I'll try.
>
> > +};
> > +
> > +static struct v4l2_subdev_ops ov2640_subdev_ops = {
> > + .core = &ov2640_subdev_core_ops,
> > + .video = &ov2640_subdev_video_ops,
> > +};
> > +
> > +/*
> > + * i2c_driver functions
> > + */
> > +static int ov2640_probe(struct i2c_client *client,
> > + const struct i2c_device_id *did)
> > +{
> > + struct ov2640_priv *priv;
> > + struct soc_camera_device *icd = client->dev.platform_data;
> > + struct i2c_adapter *adapter =
> > to_i2c_adapter(client->dev.parent);
> > + struct soc_camera_link *icl;
> > + int ret;
> > +
> > + if (!icd) {
> > + dev_err(&adapter->dev, "OV2640: missing soc-camera data!\n");
> > + return -EINVAL;
> > + }
> > +
> > + icl = to_soc_camera_link(icd);
> > + if (!icl) {
> > + dev_err(&adapter->dev,
> > + "OV2640: Missing platform_data for driver\n");
> > + return -EINVAL;
> > + }
> > +
> > + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
> > + dev_err(&adapter->dev,
> > + "OV2640: I2C-Adapter doesn't support SMBUS\n");
> > + return -EIO;
> > + }
> > +
> > + priv = kzalloc(sizeof(struct ov2640_priv), GFP_KERNEL);
> > + if (!priv) {
> > + dev_err(&adapter->dev,
> > + "Failed to allocate memory for private data!\n");
> > + return -ENOMEM;
> > + }
> > +
> > + priv->info = icl->priv;
> > +
> > + v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops);
> > +
> > + icd->ops = &ov2640_ops;
> > +
> > + ret = ov2640_video_probe(icd, client);
> > + if (ret) {
> > + icd->ops = NULL;
> > + kfree(priv);
> > + } else {
> > + dev_info(&adapter->dev, "OV2640 Probed\n");
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +static int ov2640_remove(struct i2c_client *client)
> > +{
> > + struct ov2640_priv *priv = to_ov2640(client);
> > + struct soc_camera_device *icd = client->dev.platform_data;
> > +
> > + icd->ops = NULL;
> > + kfree(priv);
> > + return 0;
> > +}
> > +
> > +static const struct i2c_device_id ov2640_id[] = {
> > + { "ov2640", 0 },
> > + { }
> > +};
> > +MODULE_DEVICE_TABLE(i2c, ov2640_id);
> > +
> > +static struct i2c_driver ov2640_i2c_driver = {
> > + .driver = {
> > + .name = "ov2640",
> > + },
> > + .probe = ov2640_probe,
> > + .remove = ov2640_remove,
> > + .id_table = ov2640_id,
> > +};
> > +
> > +/*
> > + * module functions
> > + */
> > +static int __init ov2640_module_init(void)
> > +{
> > + return i2c_add_driver(&ov2640_i2c_driver);
> > +}
> > +
> > +static void __exit ov2640_module_exit(void)
> > +{
> > + i2c_del_driver(&ov2640_i2c_driver);
> > +}
> > +
> > +module_init(ov2640_module_init);
> > +module_exit(ov2640_module_exit);
> > +
> > +MODULE_DESCRIPTION("SoC Camera driver for Omni Vision 2640 sensor");
> > +MODULE_AUTHOR("Alberto Panizzo");
> > +MODULE_LICENSE("GPL v2");
> > diff --git a/include/media/v4l2-chip-ident.h
> > b/include/media/v4l2-chip-ident.h
> > index 51e89f2..44fe44e 100644
> > --- a/include/media/v4l2-chip-ident.h
> > +++ b/include/media/v4l2-chip-ident.h
> > @@ -74,6 +74,7 @@ enum {
> > V4L2_IDENT_SOI968 = 256,
> > V4L2_IDENT_OV9640 = 257,
> > V4L2_IDENT_OV6650 = 258,
> > + V4L2_IDENT_OV2640 = 259,
> >
> > /* module saa7146: reserved range 300-309 */
> > V4L2_IDENT_SAA7146 = 300,
> > --
> > 1.6.3.3
>
> Thanks
> Guennadi
> ---
Thanks to you Guennadi!
--
Alberto!
Be Persistent!
- Greg Kroah-Hartman (FOSDEM 2010)
Signed-off-by: Alberto Panizzo <[email protected]>
---
v2 changes:
- Fixed addressed errors.
- Added trivial .cropcap and .g_crop functions based on the whole size
of sensor.
drivers/media/video/Kconfig | 6 +
drivers/media/video/Makefile | 1 +
drivers/media/video/ov2640.c | 1205 +++++++++++++++++++++++++++++++++++++++
include/media/v4l2-chip-ident.h | 1 +
4 files changed, 1213 insertions(+), 0 deletions(-)
create mode 100644 drivers/media/video/ov2640.c
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 0efbb29..1fa4f1b 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -789,6 +789,12 @@ config SOC_CAMERA_PLATFORM
help
This is a generic SoC camera platform driver, useful for testing
+config SOC_CAMERA_OV2640
+ tristate "ov2640 camera support"
+ depends on SOC_CAMERA && I2C
+ help
+ This is a ov2640 camera driver
+
config SOC_CAMERA_OV6650
tristate "ov6650 sensor support"
depends on SOC_CAMERA && I2C
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index af79d47..1e62c87 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o
obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o
obj-$(CONFIG_SOC_CAMERA_MT9T112) += mt9t112.o
obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o
+obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o
obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o
obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o
obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o
diff --git a/drivers/media/video/ov2640.c b/drivers/media/video/ov2640.c
new file mode 100644
index 0000000..da48810
--- /dev/null
+++ b/drivers/media/video/ov2640.c
@@ -0,0 +1,1205 @@
+/*
+ * ov2640 Camera Driver
+ *
+ * Copyright (C) 2010 Alberto Panizzo <[email protected]>
+ *
+ * Based on ov772x, ov9640 drivers and previous non merged implementations.
+ *
+ * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2006, OmniVision
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-subdev.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+
+#define VAL_SET(x, mask, rshift, lshift) \
+ ((((x) >> rshift) & mask) << lshift)
+/*
+ * DSP registers
+ * register offset for BANK_SEL == BANK_SEL_DSP
+ */
+#define R_BYPASS 0x05 /* Bypass DSP */
+#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP, sensor out directly */
+#define R_BYPASS_USE_DSP 0x00 /* Use the internal DSP */
+#define QS 0x44 /* Quantization Scale Factor */
+#define CTRLI 0x50
+#define CTRLI_LP_DP 0x80
+#define CTRLI_ROUND 0x40
+#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
+#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
+#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
+#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define XOFFL 0x53 /* OFFSET_X[7:0] */
+#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define YOFFL 0x54 /* OFFSET_Y[7:0] */
+#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define VHYX 0x55 /* Offset and size completion */
+#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
+#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
+#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
+#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
+#define DPRP 0x56
+#define TEST 0x57 /* Horizontal size completion */
+#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
+#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
+#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
+#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
+#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
+#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
+#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
+#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
+#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
+#define CTRL2 0x86 /* DSP Module enable 2 */
+#define CTRL2_DCW_EN 0x20
+#define CTRL2_SDE_EN 0x10
+#define CTRL2_UV_ADJ_EN 0x08
+#define CTRL2_UV_AVG_EN 0x04
+#define CTRL2_CMX_EN 0x01
+#define CTRL3 0x87 /* DSP Module enable 3 */
+#define CTRL3_BPC_EN 0x80
+#define CTRL3_WPC_EN 0x40
+#define SIZEL 0x8C /* Image Size Completion */
+#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
+#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
+#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
+#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
+#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
+#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define CTRL0 0xC2 /* DSP Module enable 0 */
+#define CTRL0_AEC_EN 0x80
+#define CTRL0_AEC_SEL 0x40
+#define CTRL0_STAT_SEL 0x20
+#define CTRL0_VFIRST 0x10
+#define CTRL0_YUV422 0x08
+#define CTRL0_YUV_EN 0x04
+#define CTRL0_RGB_EN 0x02
+#define CTRL0_RAW_EN 0x01
+#define CTRL1 0xC3 /* DSP Module enable 1 */
+#define CTRL1_CIP 0x80
+#define CTRL1_DMY 0x40
+#define CTRL1_RAW_GMA 0x20
+#define CTRL1_DG 0x10
+#define CTRL1_AWB 0x08
+#define CTRL1_AWB_GAIN 0x04
+#define CTRL1_LENC 0x02
+#define CTRL1_PRE 0x01
+#define R_DVP_SP 0xD3 /* DVP output speed control */
+#define R_DVP_SP_AUTO_MODE 0x80
+#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0] (YUV0);
+ * = sysclk (48)/(2*[6:0]) (RAW);*/
+#define IMAGE_MODE 0xDA /* Image Output Format Select */
+#define IMAGE_MODE_Y8_DVP_EN 0x40
+#define IMAGE_MODE_JPEG_EN 0x10
+#define IMAGE_MODE_YUV422 0x00
+#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
+#define IMAGE_MODE_RGB565 0x08
+#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG output
+ * mode (0 for HREF is same as sensor) */
+#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
+ * 1: Low byte first UYVY (C2[4] =0)
+ * VYUY (C2[4] =1)
+ * 0: High byte first YUYV (C2[4]=0)
+ * YVYU (C2[4] = 1) */
+#define RESET 0xE0 /* Reset */
+#define RESET_MICROC 0x40
+#define RESET_SCCB 0x20
+#define RESET_JPEG 0x10
+#define RESET_DVP 0x04
+#define RESET_IPU 0x02
+#define RESET_CIF 0x01
+#define REGED 0xED /* Register ED */
+#define REGED_CLK_OUT_DIS 0x10
+#define MS_SP 0xF0 /* SCCB Master Speed */
+#define SS_ID 0xF7 /* SCCB Slave ID */
+#define SS_CTRL 0xF8 /* SCCB Slave Control */
+#define SS_CTRL_ADD_AUTO_INC 0x20
+#define SS_CTRL_EN 0x08
+#define SS_CTRL_DELAY_CLK 0x04
+#define SS_CTRL_ACC_EN 0x02
+#define SS_CTRL_SEN_PASS_THR 0x01
+#define MC_BIST 0xF9 /* Microcontroller misc register */
+#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
+#define MC_BIST_BOOT_ROM_SEL 0x40
+#define MC_BIST_12KB_SEL 0x20
+#define MC_BIST_12KB_MASK 0x30
+#define MC_BIST_512KB_SEL 0x08
+#define MC_BIST_512KB_MASK 0x0C
+#define MC_BIST_BUSY_BIT_R 0x02
+#define MC_BIST_MC_RES_ONE_SH_W 0x02
+#define MC_BIST_LAUNCH 0x01
+#define BANK_SEL 0xFF /* Register Bank Select */
+#define BANK_SEL_DSP 0x00
+#define BANK_SEL_SENS 0x01
+
+/*
+ * Sensor registers
+ * register offset for BANK_SEL == BANK_SEL_SENS
+ */
+#define GAIN 0x00 /* AGC - Gain control gain setting */
+#define COM1 0x03 /* Common control 1 */
+#define COM1_1_DUMMY_FR 0x40
+#define COM1_3_DUMMY_FR 0x80
+#define COM1_7_DUMMY_FR 0xC0
+#define COM1_VWIN_LSB_UXGA 0x0F
+#define COM1_VWIN_LSB_SVGA 0x0A
+#define COM1_VWIN_LSB_CIF 0x06
+#define REG04 0x04 /* Register 04 */
+#define REG04_DEF 0x20 /* Always set */
+#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF */
+#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
+#define REG04_VREF_EN 0x10
+#define REG04_HREF_EN 0x08
+#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge Row Num */
+#define COM2 0x09 /* Common control 2 */
+#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
+ /* Output drive capability */
+#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
+#define PID 0x0A /* Product ID Number MSB */
+#define VER 0x0B /* Product ID Number LSB */
+#define COM3 0x0C /* Common control 3 */
+#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
+#define COM3_BAND_AUTO 0x02 /* Auto Banding */
+#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output after the
+ * snapshot sequence*/
+#define AEC 0x10 /* AEC[9:2] Exposure Value */
+#define CLKRC 0x11 /* Internal clock */
+#define CLKRC_EN 0x80
+#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
+#define COM7 0x12 /* Common control 7 */
+#define COM7_SRST 0x80 /* Initiates system reset. All registers are
+ * set to factory default values after which
+ * the chip resumes normal operation */
+#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
+#define COM7_RES_SVGA 0x40 /* SVGA */
+#define COM7_RES_CIF 0x20 /* CIF */
+#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
+#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
+#define COM8 0x13 /* Common control 8 */
+#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
+#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
+#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control selection */
+#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
+#define COM9 0x14 /* Common control 9
+ * Automatic gain ceiling - maximum AGC value [7:5]*/
+#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
+#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
+#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
+#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
+#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
+#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
+#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
+#define COM10 0x15 /* Common control 10 */
+#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
+#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising edge of
+ * PCLK (user can latch data at the next
+ * falling edge of PCLK).
+ * 0 otherwise. */
+#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
+ * HREF negative for valid data*/
+#define COM10_VSINC_INV 0x02 /* Invert VSYNC polarity */
+#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
+#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
+#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
+#define VEND 0x1A /* Vertical Window end MSB 8 bit */
+#define MIDH 0x1C /* Manufacturer ID byte - high */
+#define MIDL 0x1D /* Manufacturer ID byte - low */
+#define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */
+#define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */
+#define VV 0x26 /* AGC/AEC Fast mode operating region */
+#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
+#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
+#define REG2A 0x2A /* Dummy pixel insert MSB */
+#define FRARL 0x2B /* Dummy pixel insert LSB */
+#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical direction */
+#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical direction */
+#define YAVG 0x2F /* Y/G Channel Average value */
+#define REG32 0x32 /* Common Control 32 */
+#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
+#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
+#define ARCOM2 0x34 /* Zoom: Horizontal start point */
+#define REG45 0x45 /* Register 45 */
+#define FLL 0x46 /* Frame Length Adjustment LSBs */
+#define FLH 0x47 /* Frame Length Adjustment MSBs */
+#define COM19 0x48 /* Zoom: Vertical start point */
+#define ZOOMS 0x49 /* Zoom: Vertical start point */
+#define COM22 0x4B /* Flash light control */
+#define COM25 0x4E /* For Banding operations */
+#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
+#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
+#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight option */
+#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight option */
+#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight option */
+#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight option */
+#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
+#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
+
+/*
+ * ID
+ */
+#define MANUFACTURER_ID 0x7FA2
+#define PID_OV2640 0x2642
+#define VERSION(pid, ver) ((pid << 8)|(ver & 0xFF))
+
+/*
+ * Struct
+ */
+struct regval_list {
+ u8 reg_num;
+ u8 value;
+};
+
+/* Supported resolutions */
+enum ov2640_width {
+ W_QCIF = 176,
+ W_QVGA = 320,
+ W_CIF = 352,
+ W_VGA = 640,
+ W_SVGA = 800,
+ W_XGA = 1024,
+ W_SXGA = 1280,
+ W_UXGA = 1600,
+};
+
+enum ov2640_height {
+ H_QCIF = 144,
+ H_QVGA = 240,
+ H_CIF = 288,
+ H_VGA = 480,
+ H_SVGA = 600,
+ H_XGA = 768,
+ H_SXGA = 1024,
+ H_UXGA = 1200,
+};
+
+struct ov2640_win_size {
+ char *name;
+ enum ov2640_width width;
+ enum ov2640_height height;
+ const struct regval_list *regs;
+};
+
+
+struct ov2640_priv {
+ struct v4l2_subdev subdev;
+ struct ov2640_camera_info *info;
+ enum v4l2_mbus_pixelcode cfmt_code;
+ const struct ov2640_win_size *win;
+ int model;
+ u16 flag_vflip:1;
+ u16 flag_hflip:1;
+};
+
+/*
+ * Registers settings
+ */
+
+#define ENDMARKER { 0xff, 0xff }
+
+static const struct regval_list ov2640_init_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0x2c, 0xff },
+ { 0x2e, 0xdf },
+ { BANK_SEL, BANK_SEL_SENS },
+ { 0x3c, 0x32 },
+ { CLKRC, CLKRC_DIV_SET(1) },
+ { COM2, COM2_OCAP_Nx_SET(3) },
+ { REG04, REG04_DEF | REG04_HREF_EN },
+ { COM8, COM8_DEF | COM8_BNDF_EN | COM8_AGC_EN | COM8_AEC_EN },
+ { COM9, COM9_AGC_GAIN_8x | 0x08},
+ { 0x2c, 0x0c },
+ { 0x33, 0x78 },
+ { 0x3a, 0x33 },
+ { 0x3b, 0xfb },
+ { 0x3e, 0x00 },
+ { 0x43, 0x11 },
+ { 0x16, 0x10 },
+ { 0x39, 0x02 },
+ { 0x35, 0x88 },
+ { 0x22, 0x0a },
+ { 0x37, 0x40 },
+ { 0x23, 0x00 },
+ { ARCOM2, 0xa0 },
+ { 0x06, 0x02 },
+ { 0x06, 0x88 },
+ { 0x07, 0xc0 },
+ { 0x0d, 0xb7 },
+ { 0x0e, 0x01 },
+ { 0x4c, 0x00 },
+ { 0x4a, 0x81 },
+ { 0x21, 0x99 },
+ { AEW, 0x40 },
+ { AEB, 0x38 },
+ { VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
+ { 0x5c, 0x00 },
+ { 0x63, 0x00 },
+ { FLL, 0x22 },
+ { COM3, 0x38 | COM3_BAND_AUTO },
+ { REG5D, 0x55 },
+ { REG5E, 0x7d },
+ { REG5F, 0x7d },
+ { REG60, 0x55 },
+ { HISTO_LOW, 0x70 },
+ { HISTO_HIGH, 0x80 },
+ { 0x7c, 0x05 },
+ { 0x20, 0x80 },
+ { 0x28, 0x30 },
+ { 0x6c, 0x00 },
+ { 0x6d, 0x80 },
+ { 0x6e, 0x00 },
+ { 0x70, 0x02 },
+ { 0x71, 0x94 },
+ { 0x73, 0xc1 },
+ { 0x3d, 0x34 },
+ { COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
+ { 0x5a, 0x57 },
+ { BD50, 0xbb },
+ { BD60, 0x9c },
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0xe5, 0x7f },
+ { MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
+ { 0x41, 0x24 },
+ { RESET, RESET_JPEG | RESET_DVP },
+ { 0x76, 0xff },
+ { 0x33, 0xa0 },
+ { 0x42, 0x20 },
+ { 0x43, 0x18 },
+ { 0x4c, 0x00 },
+ { CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
+ { 0x88, 0x3f },
+ { 0xd7, 0x03 },
+ { 0xd9, 0x10 },
+ { R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
+ { 0xc8, 0x08 },
+ { 0xc9, 0x80 },
+ { BPADDR, 0x00 },
+ { BPDATA, 0x00 },
+ { BPADDR, 0x03 },
+ { BPDATA, 0x48 },
+ { BPDATA, 0x48 },
+ { BPADDR, 0x08 },
+ { BPDATA, 0x20 },
+ { BPDATA, 0x10 },
+ { BPDATA, 0x0e },
+ { 0x90, 0x00 },
+ { 0x91, 0x0e },
+ { 0x91, 0x1a },
+ { 0x91, 0x31 },
+ { 0x91, 0x5a },
+ { 0x91, 0x69 },
+ { 0x91, 0x75 },
+ { 0x91, 0x7e },
+ { 0x91, 0x88 },
+ { 0x91, 0x8f },
+ { 0x91, 0x96 },
+ { 0x91, 0xa3 },
+ { 0x91, 0xaf },
+ { 0x91, 0xc4 },
+ { 0x91, 0xd7 },
+ { 0x91, 0xe8 },
+ { 0x91, 0x20 },
+ { 0x92, 0x00 },
+ { 0x93, 0x06 },
+ { 0x93, 0xe3 },
+ { 0x93, 0x03 },
+ { 0x93, 0x03 },
+ { 0x93, 0x00 },
+ { 0x93, 0x02 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x96, 0x00 },
+ { 0x97, 0x08 },
+ { 0x97, 0x19 },
+ { 0x97, 0x02 },
+ { 0x97, 0x0c },
+ { 0x97, 0x24 },
+ { 0x97, 0x30 },
+ { 0x97, 0x28 },
+ { 0x97, 0x26 },
+ { 0x97, 0x02 },
+ { 0x97, 0x98 },
+ { 0x97, 0x80 },
+ { 0x97, 0x00 },
+ { 0x97, 0x00 },
+ { 0xa4, 0x00 },
+ { 0xa8, 0x00 },
+ { 0xc5, 0x11 },
+ { 0xc6, 0x51 },
+ { 0xbf, 0x80 },
+ { 0xc7, 0x10 },
+ { 0xb6, 0x66 },
+ { 0xb8, 0xA5 },
+ { 0xb7, 0x64 },
+ { 0xb9, 0x7C },
+ { 0xb3, 0xaf },
+ { 0xb4, 0x97 },
+ { 0xb5, 0xFF },
+ { 0xb0, 0xC5 },
+ { 0xb1, 0x94 },
+ { 0xb2, 0x0f },
+ { 0xc4, 0x5c },
+ { 0xa6, 0x00 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x1b },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0x7f, 0x00 },
+ { 0xe5, 0x1f },
+ { 0xe1, 0x77 },
+ { 0xdd, 0x7f },
+ { CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN | CTRL0_RGB_EN },
+ ENDMARKER,
+};
+
+/*
+ * Register settings for window size
+ * The preamble, setup the internal DSP to input an UXGA (1600x1200) image.
+ * Then the different zooming configurations will setup the output image size.
+ */
+static const struct regval_list ov2640_size_change_preamble_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { RESET, RESET_DVP },
+ { HSIZE8, HSIZE8_SET(W_UXGA) },
+ { VSIZE8, VSIZE8_SET(H_UXGA) },
+ { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
+ CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
+ { HSIZE, HSIZE_SET(W_UXGA) },
+ { VSIZE, VSIZE_SET(H_UXGA) },
+ { XOFFL, XOFFL_SET(0) },
+ { YOFFL, YOFFL_SET(0) },
+ { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
+ VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
+ { TEST, TEST_HSIZE_SET(W_UXGA) },
+ ENDMARKER,
+};
+
+#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
+ { CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
+ CTRLI_H_DIV_SET(h_div)}, \
+ { ZMOW, ZMOW_OUTW_SET(x) }, \
+ { ZMOH, ZMOH_OUTH_SET(y) }, \
+ { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
+ { R_DVP_SP, pclk_div }, \
+ { RESET, 0x00}
+
+static const struct regval_list ov2640_qcif_regs[] = {
+ PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_qvga_regs[] = {
+ PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_cif_regs[] = {
+ PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_vga_regs[] = {
+ PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_svga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_xga_regs[] = {
+ PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_sxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_uxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+#define OV2640_SIZE(n, w, h, r) \
+ {.name = n, .width = w , .height = h, .regs = r }
+
+static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
+ OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
+ OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
+ OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
+ OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
+ OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
+ OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
+ OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
+ OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
+};
+
+/*
+ * Register settings for pixel formats
+ */
+static const struct regval_list ov2640_format_change_preamble_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_yuv422_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
+ { 0xD7, 0x01 },
+ { 0x33, 0xa0 },
+ { 0xe1, 0x67 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_rgb565_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
+ { 0xd7, 0x03 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static enum v4l2_mbus_pixelcode ov2640_codes[] = {
+ V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+/*
+ * Supported controls
+ */
+static const struct v4l2_queryctrl ov2640_controls[] = {
+ {
+ .id = V4L2_CID_VFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Vertically",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }, {
+ .id = V4L2_CID_HFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Horizontally",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+};
+
+/*
+ * General functions
+ */
+static struct ov2640_priv *to_ov2640(const struct i2c_client *client)
+{
+ return container_of(i2c_get_clientdata(client), struct ov2640_priv,
+ subdev);
+}
+
+static int ov2640_write_array(struct i2c_client *client,
+ const struct regval_list *vals)
+{
+ int ret;
+
+ while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
+ ret = i2c_smbus_write_byte_data(client,
+ vals->reg_num, vals->value);
+ dev_vdbg(&client->dev, "array: 0x%02x, 0x%02x",
+ vals->reg_num, vals->value);
+
+ if (ret < 0)
+ return ret;
+ vals++;
+ }
+ return 0;
+}
+
+static int ov2640_mask_set(struct i2c_client *client,
+ u8 reg, u8 mask, u8 set)
+{
+ s32 val = i2c_smbus_read_byte_data(client, reg);
+ if (val < 0)
+ return val;
+
+ val &= ~mask;
+ val |= set & mask;
+
+ dev_vdbg(&client->dev, "masks: 0x%02x, 0x%02x", reg, val);
+
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static int ov2640_reset(struct i2c_client *client)
+{
+ int ret;
+ const struct regval_list reset_seq[] = {
+ {BANK_SEL, BANK_SEL_SENS},
+ {COM7, COM7_SRST},
+ ENDMARKER,
+ };
+
+ ret = ov2640_write_array(client, reset_seq);
+ if (ret)
+ goto err;
+
+ msleep(5);
+err:
+ dev_dbg(&client->dev, "%s: (ret %d)", __func__, ret);
+ return ret;
+}
+
+/*
+ * soc_camera_ops functions
+ */
+static int ov2640_s_stream(struct v4l2_subdev *sd, int enable)
+{
+ return 0;
+}
+
+static int ov2640_set_bus_param(struct soc_camera_device *icd,
+ unsigned long flags)
+{
+ struct soc_camera_link *icl = to_soc_camera_link(icd);
+ unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+ /* Only one width bit may be set */
+ if (!is_power_of_2(width_flag))
+ return -EINVAL;
+
+ if (icl->set_bus_param)
+ return icl->set_bus_param(icl, width_flag);
+
+ /*
+ * Without board specific bus width settings we support only the
+ * sensors native bus width witch are tested working
+ */
+ if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+ return 0;
+
+ return 0;
+}
+
+static unsigned long ov2640_query_bus_param(struct soc_camera_device *icd)
+{
+ struct soc_camera_link *icl = to_soc_camera_link(icd);
+ unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+ SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+ SOCAM_DATA_ACTIVE_HIGH;
+
+ if (icl->query_bus_param)
+ flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+ else
+ flags |= SOCAM_DATAWIDTH_10;
+
+ return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static int ov2640_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ ctrl->value = priv->flag_vflip;
+ break;
+ case V4L2_CID_HFLIP:
+ ctrl->value = priv->flag_hflip;
+ break;
+ }
+ return 0;
+}
+
+static int ov2640_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+ int ret = 0;
+ u8 val;
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ val = ctrl->value ? REG04_VFLIP_IMG : 0x00;
+ priv->flag_vflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_VFLIP_IMG, val);
+ break;
+ case V4L2_CID_HFLIP:
+ val = ctrl->value ? REG04_HFLIP_IMG : 0x00;
+ priv->flag_hflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_HFLIP_IMG, val);
+ break;
+ }
+
+ return ret;
+}
+
+static int ov2640_g_chip_ident(struct v4l2_subdev *sd,
+ struct v4l2_dbg_chip_ident *id)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ id->ident = priv->model;
+ id->revision = 0;
+
+ return 0;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov2640_g_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+ reg->size = 1;
+ if (reg->reg > 0xff)
+ return -EINVAL;
+
+ ret = i2c_smbus_read_byte_data(client, reg->reg);
+ if (ret < 0)
+ return ret;
+
+ reg->val = ret;
+
+ return 0;
+}
+
+static int ov2640_s_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ if (reg->reg > 0xff ||
+ reg->val > 0xff)
+ return -EINVAL;
+
+ return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
+}
+#endif
+
+/* Select the nearest higher resolution for capture */
+static const struct ov2640_win_size *ov2640_select_win(u32 *width, u32 *height)
+{
+ int i, default_size = ARRAY_SIZE(ov2640_supported_win_sizes) - 1;
+
+ for (i = 0; i < ARRAY_SIZE(ov2640_supported_win_sizes); i++) {
+ if (ov2640_supported_win_sizes[i].width >= *width &&
+ ov2640_supported_win_sizes[i].height >= *height) {
+ *width = ov2640_supported_win_sizes[i].width;
+ *height = ov2640_supported_win_sizes[i].height;
+ return &ov2640_supported_win_sizes[i];
+ }
+ }
+
+ *width = ov2640_supported_win_sizes[default_size].width;
+ *height = ov2640_supported_win_sizes[default_size].height;
+ return &ov2640_supported_win_sizes[default_size];
+}
+
+static int ov2640_set_params(struct i2c_client *client, u32 *width, u32 *height,
+ enum v4l2_mbus_pixelcode code)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ const struct regval_list *selected_cfmt_regs;
+ int ret;
+
+ /* select win */
+ priv->win = ov2640_select_win(width, height);
+
+ /* select format */
+ priv->cfmt_code = 0;
+ switch (code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
+ selected_cfmt_regs = ov2640_rgb565_regs;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
+ selected_cfmt_regs = ov2640_yuv422_regs;
+ }
+
+ /* reset hardware */
+ ov2640_reset(client);
+
+ /* initialize the sensor with default data */
+ dev_dbg(&client->dev, "%s: Init default", __func__);
+ ret = ov2640_write_array(client, ov2640_init_regs);
+ if (ret < 0)
+ goto err;
+
+ /* select preamble */
+ dev_dbg(&client->dev, "%s: Set size to %s", __func__, priv->win->name);
+ ret = ov2640_write_array(client, ov2640_size_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set size win */
+ ret = ov2640_write_array(client, priv->win->regs);
+ if (ret < 0)
+ goto err;
+
+ /* cfmt preamble */
+ dev_dbg(&client->dev, "%s: Set cfmt", __func__);
+ ret = ov2640_write_array(client, ov2640_format_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set cfmt */
+ ret = ov2640_write_array(client, selected_cfmt_regs);
+ if (ret < 0)
+ goto err;
+
+ priv->cfmt_code = code;
+ *width = priv->win->width;
+ *height = priv->win->height;
+
+ return 0;
+
+err:
+ dev_err(&client->dev, "%s: Error %d", __func__, ret);
+ ov2640_reset(client);
+ priv->win = NULL;
+
+ return ret;
+}
+
+static int ov2640_g_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ if (!priv->win) {
+ u32 width = W_SVGA, height = H_SVGA;
+ int ret = ov2640_set_params(client, &width, &height,
+ V4L2_MBUS_FMT_UYVY8_2X8);
+ if (ret < 0)
+ return ret;
+ }
+
+ mf->width = priv->win->width;
+ mf->height = priv->win->height;
+ mf->code = priv->cfmt_code;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+ mf->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+static int ov2640_s_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ ret = ov2640_set_params(client, &mf->width, &mf->height, mf->code);
+
+ return ret;
+}
+
+static int ov2640_try_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ const struct ov2640_win_size *win;
+
+ /*
+ * select suitable win
+ */
+ win = ov2640_select_win(&mf->width, &mf->height);
+
+ mf->field = V4L2_FIELD_NONE;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ return 0;
+}
+
+static int ov2640_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+ enum v4l2_mbus_pixelcode *code)
+{
+ if (index >= ARRAY_SIZE(ov2640_codes))
+ return -EINVAL;
+
+ *code = ov2640_codes[index];
+ return 0;
+}
+
+static int ov2640_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+ a->c.left = 0;
+ a->c.top = 0;
+ a->c.width = W_UXGA;
+ a->c.height = H_UXGA;
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ return 0;
+}
+
+static int ov2640_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
+{
+ a->bounds.left = 0;
+ a->bounds.top = 0;
+ a->bounds.width = W_UXGA;
+ a->bounds.height = H_UXGA;
+ a->defrect = a->bounds;
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ a->pixelaspect.numerator = 1;
+ a->pixelaspect.denominator = 1;
+
+ return 0;
+}
+
+static int ov2640_video_probe(struct soc_camera_device *icd,
+ struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ u8 pid, ver, midh, midl;
+ const char *devname;
+ int ret;
+
+ /*
+ * we must have a parent by now. And it cannot be a wrong one.
+ * So this entire test is completely redundant.
+ */
+ if (!icd->dev.parent ||
+ to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
+ dev_err(&client->dev, "Parent missing or invalid!\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ /*
+ * check and show product ID and manufacturer ID
+ */
+ i2c_smbus_write_byte_data(client, BANK_SEL, BANK_SEL_SENS);
+ pid = i2c_smbus_read_byte_data(client, PID);
+ ver = i2c_smbus_read_byte_data(client, VER);
+ midh = i2c_smbus_read_byte_data(client, MIDH);
+ midl = i2c_smbus_read_byte_data(client, MIDL);
+
+ switch (VERSION(pid, ver)) {
+ case PID_OV2640:
+ devname = "ov2640";
+ priv->model = V4L2_IDENT_OV2640;
+ break;
+ default:
+ dev_err(&client->dev,
+ "Product ID error %x:%x\n", pid, ver);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ dev_info(&client->dev,
+ "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
+ devname, pid, ver, midh, midl);
+
+ return 0;
+
+err:
+ return ret;
+}
+
+static struct soc_camera_ops ov2640_ops = {
+ .set_bus_param = ov2640_set_bus_param,
+ .query_bus_param = ov2640_query_bus_param,
+ .controls = ov2640_controls,
+ .num_controls = ARRAY_SIZE(ov2640_controls),
+};
+
+static struct v4l2_subdev_core_ops ov2640_subdev_core_ops = {
+ .g_ctrl = ov2640_g_ctrl,
+ .s_ctrl = ov2640_s_ctrl,
+ .g_chip_ident = ov2640_g_chip_ident,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = ov2640_g_register,
+ .s_register = ov2640_s_register,
+#endif
+};
+
+static struct v4l2_subdev_video_ops ov2640_subdev_video_ops = {
+ .s_stream = ov2640_s_stream,
+ .g_mbus_fmt = ov2640_g_fmt,
+ .s_mbus_fmt = ov2640_s_fmt,
+ .try_mbus_fmt = ov2640_try_fmt,
+ .cropcap = ov2640_cropcap,
+ .g_crop = ov2640_g_crop,
+ .enum_mbus_fmt = ov2640_enum_fmt,
+};
+
+static struct v4l2_subdev_ops ov2640_subdev_ops = {
+ .core = &ov2640_subdev_core_ops,
+ .video = &ov2640_subdev_video_ops,
+};
+
+/*
+ * i2c_driver functions
+ */
+static int ov2640_probe(struct i2c_client *client,
+ const struct i2c_device_id *did)
+{
+ struct ov2640_priv *priv;
+ struct soc_camera_device *icd = client->dev.platform_data;
+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ struct soc_camera_link *icl;
+ int ret;
+
+ if (!icd) {
+ dev_err(&adapter->dev, "OV2640: missing soc-camera data!\n");
+ return -EINVAL;
+ }
+
+ icl = to_soc_camera_link(icd);
+ if (!icl) {
+ dev_err(&adapter->dev,
+ "OV2640: Missing platform_data for driver\n");
+ return -EINVAL;
+ }
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&adapter->dev,
+ "OV2640: I2C-Adapter doesn't support SMBUS\n");
+ return -EIO;
+ }
+
+ priv = kzalloc(sizeof(struct ov2640_priv), GFP_KERNEL);
+ if (!priv) {
+ dev_err(&adapter->dev,
+ "Failed to allocate memory for private data!\n");
+ return -ENOMEM;
+ }
+
+ priv->info = icl->priv;
+
+ v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops);
+
+ icd->ops = &ov2640_ops;
+
+ ret = ov2640_video_probe(icd, client);
+ if (ret) {
+ icd->ops = NULL;
+ kfree(priv);
+ } else {
+ dev_info(&adapter->dev, "OV2640 Probed\n");
+ }
+
+ return ret;
+}
+
+static int ov2640_remove(struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ struct soc_camera_device *icd = client->dev.platform_data;
+
+ icd->ops = NULL;
+ kfree(priv);
+ return 0;
+}
+
+static const struct i2c_device_id ov2640_id[] = {
+ { "ov2640", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ov2640_id);
+
+static struct i2c_driver ov2640_i2c_driver = {
+ .driver = {
+ .name = "ov2640",
+ },
+ .probe = ov2640_probe,
+ .remove = ov2640_remove,
+ .id_table = ov2640_id,
+};
+
+/*
+ * Module functions
+ */
+static int __init ov2640_module_init(void)
+{
+ return i2c_add_driver(&ov2640_i2c_driver);
+}
+
+static void __exit ov2640_module_exit(void)
+{
+ i2c_del_driver(&ov2640_i2c_driver);
+}
+
+module_init(ov2640_module_init);
+module_exit(ov2640_module_exit);
+
+MODULE_DESCRIPTION("SoC Camera driver for Omni Vision 2640 sensor");
+MODULE_AUTHOR("Alberto Panizzo");
+MODULE_LICENSE("GPL v2");
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 51e89f2..44fe44e 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -74,6 +74,7 @@ enum {
V4L2_IDENT_SOI968 = 256,
V4L2_IDENT_OV9640 = 257,
V4L2_IDENT_OV6650 = 258,
+ V4L2_IDENT_OV2640 = 259,
/* module saa7146: reserved range 300-309 */
V4L2_IDENT_SAA7146 = 300,
--
1.6.3.3
Alberto
it would be slowly on the time to address my comments and submit updates.
While at it, also, please update the subject - you probably meant "YUV422"
or "YUV444" there, also below:
On Wed, 1 Dec 2010, Guennadi Liakhovetski wrote:
> On Sun, 28 Nov 2010, Alberto Panizzo wrote:
>
> > This patch is tested and works with the OV2640 camera that output
> > YUV422 (UYVY) and RGB565 data.
> >
> > The YUV422 format is managed to be converted in IPU internal YUV444 format
> > so this stream could be used in the future to feed directly other IPU
> > blocks.
> > The RGB565 format is managed as GENERIC and can be moved only from CSI
> > to memory.
> >
> > Signed-off-by: Alberto Panizzo <[email protected]>
> > ---
> >
> > Before applying, please give me feedback if this break in some way other
> > pixel formats!
> >
> >
> > drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> > 1 files changed, 110 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> > index 29c5fc3..6811d6f 100644
> > --- a/drivers/media/video/mx3_camera.c
> > +++ b/drivers/media/video/mx3_camera.c
> > @@ -55,6 +55,31 @@
> > #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> > #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
> >
> > +/*
> > + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> > + * 1 YUV 4:4:4 or RGB—8 bits per color component
> > + * 2 YUV 4:4:4 or RGB—10 bits per color component
don't know what characters are those. Please, replace with ASCII.
Thanks
Guennadi
> > + * 3 Generic data (from sensor to the system memory only)
> > + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> > + * recognized by IPU blocks.
> > + *
> > + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> > + * align (or rearrange) the sampled data to fit the IPU supported formats
> > + * as follows:
> > + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> > + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> > + * The CSI output in this case can feed other IPU blocks.
> > + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> > + * 2 components of width DATA_WIDTH were the first is the alternating U V
>
> s/were/where/
>
> > + * components and the second is Y. It construct the YUV444 word repeating
> > + * the previous U, V samples aligning the results to a 32 bit word.
> > + * The CSI output in this case can feed other IPU blocks.
> > + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> > + * The sensor data is given as is, considering _every sample_ as a pixel
> > + * data. This format (combined with the GENERIC IPU pixel formats) can
> > + * carry all the other sensor pixel formats to the system memory.
> > + * The CSI output in this case _can not_ feed other IPU blocks.
> > + */
> > #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> > {
> > /* Add more formats as need arises and test possibilities appear... */
> > switch (fourcc) {
> > - case V4L2_PIX_FMT_RGB565:
> > - return IPU_PIX_FMT_RGB565;
> > case V4L2_PIX_FMT_RGB24:
> > return IPU_PIX_FMT_RGB24;
> > + case V4L2_PIX_FMT_UYVY:
> > + return IPU_PIX_FMT_UYVY;
> > + case V4L2_PIX_FMT_RGB565:
> > case V4L2_PIX_FMT_RGB332:
> > - return IPU_PIX_FMT_RGB332;
> > - case V4L2_PIX_FMT_YUV422P:
> > - return IPU_PIX_FMT_YVU422P;
> > default:
> > return IPU_PIX_FMT_GENERIC;
> > }
>
> Ok, so far mx3_camera has only been used with mt9m022 and mt9t031 sensors
> (from what I can see in the mainline), both are bayer. It can also work
> with monochrome cameras, and that would be the IPU_PIX_FMT_GENERIC case
> too. So, I wouldn't mind removing the rest, and only adding / fixing what
> you've now tested / implemented with your omnivision sensor. If anyone is
> using mx3_camera with any other formats and thinks, that they work -
> please, shout now. I'll probably also post a separate mail with this
> warning.
>
> > @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
> >
> > /* This is the configuration of one sg-element */
> > video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> > - video->out_width = icd->user_width;
> > - video->out_height = icd->user_height;
> > - video->out_stride = icd->user_width;
> > +
> > + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> > + /*
> > + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> > + * video->out_width and stride to the correct unit.
> > + */
> > + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> > + icd->current_fmt->host_fmt);
> > + BUG_ON(bytes_per_line <= 0);
> > +
> > + video->out_width = bytes_per_line;
> > + video->out_height = icd->user_height;
> > + video->out_stride = bytes_per_line;
> > + } else {
> > + /* For IPU known formats the pixel unit is OK */
> > + video->out_width = icd->user_width;
> > + video->out_height = icd->user_height;
> > + video->out_stride = icd->user_width;
> > + }
> >
> > #ifdef DEBUG
> > /* helps to see what DMA actually has written */
> > @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> > if (xlate) {
> > xlate->host_fmt = fmt;
> > xlate->code = code;
> > + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> > + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> > + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> > xlate++;
> > - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> > - xlate->host_fmt->fourcc);
>
> make it even simpler: s/xlate->host_fmt/fmt/g
>
> > }
> >
> > return formats;
> > }
> >
> > +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> > +{
> > + switch (mcode) {
> > + case V4L2_MBUS_FMT_YUYV8_2X8:
> > + case V4L2_MBUS_FMT_YVYU8_2X8:
> > + case V4L2_MBUS_FMT_VYUY8_2X8:
> > + case V4L2_MBUS_FMT_YVYU10_2X10:
> > + case V4L2_MBUS_FMT_YUYV10_2X10:
> > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> > + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> > + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> > + return 2;
> > + case V4L2_MBUS_FMT_SBGGR8_1X8:
> > + case V4L2_MBUS_FMT_SBGGR10_1X10:
> > + case V4L2_MBUS_FMT_GREY8_1X8:
> > + case V4L2_MBUS_FMT_Y10_1X10:
> > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
>
> Are these two really 1 sample per pixel?
>
> > + case V4L2_MBUS_FMT_SGRBG8_1X8:
> > + return 1;
> > + default:
> > + /* Add other pixel codes as needed */
> > + return 0;
> > + }
> > +}
>
> Let's just do the following:
>
> s32 soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf)
> {
> switch (mf->packing) {
> case SOC_MBUS_PACKING_NONE:
> case SOC_MBUS_PACKING_EXTEND16:
> return 1;
> case SOC_MBUS_PACKING_2X8_PADHI:
> case SOC_MBUS_PACKING_2X8_PADLO:
> return 2;
> }
> return -EINVAL;
> }
> EXPORT_SYMBOL(soc_mbus_samples_per_pixel);
>
> in drivers/media/video/soc_mediabus.c, agree?
>
> > +
> > static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> > - unsigned int width, unsigned int height)
> > + unsigned int width, unsigned int height,
> > + enum v4l2_mbus_pixelcode code)
> > {
> > u32 ctrl, width_field, height_field;
> > + const struct soc_mbus_pixelfmt *fmt;
> > +
> > + fmt = soc_mbus_get_fmtdesc(code);
> > + BUG_ON(!fmt);
> > +
> > + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> > + /*
> > + * As we don't have an IPU native format, the CSI will be
> > + * configured to output BAYER and here we need to convert
> > + * geometry unit from pixels to samples.
> > + * TODO: Support vertical down sampling (YUV420)
> > + */
> > + width = width * samples_per_pixel(code);
> > + BUG_ON(!width);
> > + }
>
> width *= soc_mbus_samples_per_pixel(fmt);
> BUG_ON((int)width < 0);
>
> >
> > /* Setup frame size - this cannot be changed on-the-fly... */
> > width_field = width - 1;
> > @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> > return ret;
> > }
> >
> > - configure_geometry(mx3_cam, mf.width, mf.height);
> > + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> > }
> >
> > dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> > @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> > * mxc_v4l2_s_fmt()
> > */
> >
> > - configure_geometry(mx3_cam, pix->width, pix->height);
> > + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
> >
> > mf.width = pix->width;
> > mf.height = pix->height;
> > @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> > (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> > (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
> >
> > - /* TODO: Support RGB and YUV formats */
> > + /* TODO: Support RGB_YUV444 formats */
> >
> > - /* This has been set in mx3_camera_activate(), but we clear it above */
> > - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > + switch (xlate->code) {
> > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> > + break;
> > + default:
> > + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > + }
> >
> > if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> > sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> > --
> > 1.6.3.3
>
> If after all the above changed your set up still works, we're cool!;)
>
> Thanks
> Guennadi
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
>
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
On Sat, 18 Dec 2010, Guennadi Liakhovetski wrote:
> Alberto
>
> it would be slowly on the time to address my comments and submit updates.
> While at it, also, please update the subject - you probably meant "YUV422"
> or "YUV444" there, also below:
Ok, I'm dropping this patch
Alberto, I've applied and pushed your other 2 patches from this series,
but I've dropped this one. The reason is not (only), that you didn't reply
to my two last mails with update-requests. But because of that I took the
time today to look deeper into detail at this patch. And as a result, I
don't think it is correct.
Currently the mx3_camera driver transfers data from video clients (camera
sensors) only in one mode - as raw data, 1-to-1. This is extablished in
the way, how it creates format translation tables during the initial
negotiation with client drivers in mx3_camera_get_formats().
Your patch is trying to add support for specific modes on CSI, but is only
doing this in the transfer part of the driver, and not in the negotiation
part. So, if you really need native support for various pixel formats,
this is a wrong way to do this. If you only want to transfer data from
your sensor into RAM and the current driver is failing for you, then this
is a wrong way to do this, and the bug has to be found and fixed, while
maintaining the present pass-through only model.
Thanks
Guennadi
> On Wed, 1 Dec 2010, Guennadi Liakhovetski wrote:
>
> > On Sun, 28 Nov 2010, Alberto Panizzo wrote:
> >
> > > This patch is tested and works with the OV2640 camera that output
> > > YUV422 (UYVY) and RGB565 data.
> > >
> > > The YUV422 format is managed to be converted in IPU internal YUV444 format
> > > so this stream could be used in the future to feed directly other IPU
> > > blocks.
> > > The RGB565 format is managed as GENERIC and can be moved only from CSI
> > > to memory.
> > >
> > > Signed-off-by: Alberto Panizzo <[email protected]>
> > > ---
> > >
> > > Before applying, please give me feedback if this break in some way other
> > > pixel formats!
> > >
> > >
> > > drivers/media/video/mx3_camera.c | 126 +++++++++++++++++++++++++++++++++-----
> > > 1 files changed, 110 insertions(+), 16 deletions(-)
> > >
> > > diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c
> > > index 29c5fc3..6811d6f 100644
> > > --- a/drivers/media/video/mx3_camera.c
> > > +++ b/drivers/media/video/mx3_camera.c
> > > @@ -55,6 +55,31 @@
> > > #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
> > > #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
> > >
> > > +/*
> > > + * IPU support the following data formatting (44.1.1.3 Data Flows and Formats):
> > > + * 1 YUV 4:4:4 or RGB—8 bits per color component
> > > + * 2 YUV 4:4:4 or RGB—10 bits per color component
>
> don't know what characters are those. Please, replace with ASCII.
>
> Thanks
> Guennadi
>
> > > + * 3 Generic data (from sensor to the system memory only)
> > > + * The formats 1 and 2 are aligned in words of 32 bits, 3 is free and not
> > > + * recognized by IPU blocks.
> > > + *
> > > + * Taking the value of SENS_DATA_FORMAT and DATA_WIDTH, the CSI tries to
> > > + * align (or rearrange) the sampled data to fit the IPU supported formats
> > > + * as follows:
> > > + * - CSI_SENS_CONF_DATA_FMT_RGB_YUV444: It consider the pixel as a sequence of
> > > + * 3 components of width DATA_WIDTH aligning these to a 32 bit word.
> > > + * The CSI output in this case can feed other IPU blocks.
> > > + * - CSI_SENS_CONF_DATA_FMT_YUV422: It consider the pixel as a sequence of
> > > + * 2 components of width DATA_WIDTH were the first is the alternating U V
> >
> > s/were/where/
> >
> > > + * components and the second is Y. It construct the YUV444 word repeating
> > > + * the previous U, V samples aligning the results to a 32 bit word.
> > > + * The CSI output in this case can feed other IPU blocks.
> > > + * - CSI_SENS_CONF_DATA_FMT_BAYER: No rework is performed in this case.
> > > + * The sensor data is given as is, considering _every sample_ as a pixel
> > > + * data. This format (combined with the GENERIC IPU pixel formats) can
> > > + * carry all the other sensor pixel formats to the system memory.
> > > + * The CSI output in this case _can not_ feed other IPU blocks.
> > > + */
> > > #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
> > > @@ -323,14 +348,12 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
> > > {
> > > /* Add more formats as need arises and test possibilities appear... */
> > > switch (fourcc) {
> > > - case V4L2_PIX_FMT_RGB565:
> > > - return IPU_PIX_FMT_RGB565;
> > > case V4L2_PIX_FMT_RGB24:
> > > return IPU_PIX_FMT_RGB24;
> > > + case V4L2_PIX_FMT_UYVY:
> > > + return IPU_PIX_FMT_UYVY;
> > > + case V4L2_PIX_FMT_RGB565:
> > > case V4L2_PIX_FMT_RGB332:
> > > - return IPU_PIX_FMT_RGB332;
> > > - case V4L2_PIX_FMT_YUV422P:
> > > - return IPU_PIX_FMT_YVU422P;
> > > default:
> > > return IPU_PIX_FMT_GENERIC;
> > > }
> >
> > Ok, so far mx3_camera has only been used with mt9m022 and mt9t031 sensors
> > (from what I can see in the mainline), both are bayer. It can also work
> > with monochrome cameras, and that would be the IPU_PIX_FMT_GENERIC case
> > too. So, I wouldn't mind removing the rest, and only adding / fixing what
> > you've now tested / implemented with your omnivision sensor. If anyone is
> > using mx3_camera with any other formats and thinks, that they work -
> > please, shout now. I'll probably also post a separate mail with this
> > warning.
> >
> > > @@ -358,9 +381,25 @@ static void mx3_videobuf_queue(struct videobuf_queue *vq,
> > >
> > > /* This is the configuration of one sg-element */
> > > video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
> > > - video->out_width = icd->user_width;
> > > - video->out_height = icd->user_height;
> > > - video->out_stride = icd->user_width;
> > > +
> > > + if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
> > > + /*
> > > + * IPU_PIX_FMT_GENERIC transport bytes, not pixels. So convert
> > > + * video->out_width and stride to the correct unit.
> > > + */
> > > + int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
> > > + icd->current_fmt->host_fmt);
> > > + BUG_ON(bytes_per_line <= 0);
> > > +
> > > + video->out_width = bytes_per_line;
> > > + video->out_height = icd->user_height;
> > > + video->out_stride = bytes_per_line;
> > > + } else {
> > > + /* For IPU known formats the pixel unit is OK */
> > > + video->out_width = icd->user_width;
> > > + video->out_height = icd->user_height;
> > > + video->out_stride = icd->user_width;
> > > + }
> > >
> > > #ifdef DEBUG
> > > /* helps to see what DMA actually has written */
> > > @@ -730,18 +769,68 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id
> > > if (xlate) {
> > > xlate->host_fmt = fmt;
> > > xlate->code = code;
> > > + dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
> > > + (xlate->host_fmt->fourcc >> (0*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (1*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (2*8)) & 0xFF,
> > > + (xlate->host_fmt->fourcc >> (3*8)) & 0xFF);
> > > xlate++;
> > > - dev_dbg(dev, "Providing format %x in pass-through mode\n",
> > > - xlate->host_fmt->fourcc);
> >
> > make it even simpler: s/xlate->host_fmt/fmt/g
> >
> > > }
> > >
> > > return formats;
> > > }
> > >
> > > +static int samples_per_pixel(enum v4l2_mbus_pixelcode mcode)
> > > +{
> > > + switch (mcode) {
> > > + case V4L2_MBUS_FMT_YUYV8_2X8:
> > > + case V4L2_MBUS_FMT_YVYU8_2X8:
> > > + case V4L2_MBUS_FMT_VYUY8_2X8:
> > > + case V4L2_MBUS_FMT_YVYU10_2X10:
> > > + case V4L2_MBUS_FMT_YUYV10_2X10:
> > > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE:
> > > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
> > > + case V4L2_MBUS_FMT_RGB565_2X8_LE:
> > > + case V4L2_MBUS_FMT_RGB565_2X8_BE:
> > > + case V4L2_MBUS_FMT_BGR565_2X8_LE:
> > > + case V4L2_MBUS_FMT_BGR565_2X8_BE:
> > > + return 2;
> > > + case V4L2_MBUS_FMT_SBGGR8_1X8:
> > > + case V4L2_MBUS_FMT_SBGGR10_1X10:
> > > + case V4L2_MBUS_FMT_GREY8_1X8:
> > > + case V4L2_MBUS_FMT_Y10_1X10:
> > > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
> > > + case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
> >
> > Are these two really 1 sample per pixel?
> >
> > > + case V4L2_MBUS_FMT_SGRBG8_1X8:
> > > + return 1;
> > > + default:
> > > + /* Add other pixel codes as needed */
> > > + return 0;
> > > + }
> > > +}
> >
> > Let's just do the following:
> >
> > s32 soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf)
> > {
> > switch (mf->packing) {
> > case SOC_MBUS_PACKING_NONE:
> > case SOC_MBUS_PACKING_EXTEND16:
> > return 1;
> > case SOC_MBUS_PACKING_2X8_PADHI:
> > case SOC_MBUS_PACKING_2X8_PADLO:
> > return 2;
> > }
> > return -EINVAL;
> > }
> > EXPORT_SYMBOL(soc_mbus_samples_per_pixel);
> >
> > in drivers/media/video/soc_mediabus.c, agree?
> >
> > > +
> > > static void configure_geometry(struct mx3_camera_dev *mx3_cam,
> > > - unsigned int width, unsigned int height)
> > > + unsigned int width, unsigned int height,
> > > + enum v4l2_mbus_pixelcode code)
> > > {
> > > u32 ctrl, width_field, height_field;
> > > + const struct soc_mbus_pixelfmt *fmt;
> > > +
> > > + fmt = soc_mbus_get_fmtdesc(code);
> > > + BUG_ON(!fmt);
> > > +
> > > + if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
> > > + /*
> > > + * As we don't have an IPU native format, the CSI will be
> > > + * configured to output BAYER and here we need to convert
> > > + * geometry unit from pixels to samples.
> > > + * TODO: Support vertical down sampling (YUV420)
> > > + */
> > > + width = width * samples_per_pixel(code);
> > > + BUG_ON(!width);
> > > + }
> >
> > width *= soc_mbus_samples_per_pixel(fmt);
> > BUG_ON((int)width < 0);
> >
> > >
> > > /* Setup frame size - this cannot be changed on-the-fly... */
> > > width_field = width - 1;
> > > @@ -850,7 +939,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd,
> > > return ret;
> > > }
> > >
> > > - configure_geometry(mx3_cam, mf.width, mf.height);
> > > + configure_geometry(mx3_cam, mf.width, mf.height, mf.code);
> > > }
> > >
> > > dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
> > > @@ -893,7 +982,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd,
> > > * mxc_v4l2_s_fmt()
> > > */
> > >
> > > - configure_geometry(mx3_cam, pix->width, pix->height);
> > > + configure_geometry(mx3_cam, pix->width, pix->height, xlate->code);
> > >
> > > mf.width = pix->width;
> > > mf.height = pix->height;
> > > @@ -1112,10 +1201,15 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
> > > (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
> > > (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
> > >
> > > - /* TODO: Support RGB and YUV formats */
> > > + /* TODO: Support RGB_YUV444 formats */
> > >
> > > - /* This has been set in mx3_camera_activate(), but we clear it above */
> > > - sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > > + switch (xlate->code) {
> > > + case V4L2_MBUS_FMT_UYVY8_2X8:
> > > + sens_conf |= CSI_SENS_CONF_DATA_FMT_YUV422;
> > > + break;
> > > + default:
> > > + sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
> > > + }
> > >
> > > if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
> > > sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
> > > --
> > > 1.6.3.3
> >
> > If after all the above changed your set up still works, we're cool!;)
> >
> > Thanks
> > Guennadi
> > ---
> > Guennadi Liakhovetski, Ph.D.
> > Freelance Open-Source Software Developer
> > http://www.open-technology.de/
> >
>
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
>
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/