This series implements driver for Sophgo cv180x/sg200x on-chip thermal
sensor and adds thermal zones for CV1800B SoCs.
Changed from v1:
1. style and code improvements
2. make sample parameters configurable
3. generalize document temperature calculating formula
Haylen Chu (3):
dt-bindings: thermal: sophgo,cv180x-thermal: Add Sophgo CV180x thermal
riscv: dts: sophgo: cv18xx: Add sensor device and thermal zone
thermal: cv180x: Add cv180x thermal driver support
.../thermal/sophgo,cv180x-thermal.yaml | 82 ++++++
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 30 ++
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 +
drivers/thermal/Kconfig | 6 +
drivers/thermal/Makefile | 1 +
drivers/thermal/cv180x_thermal.c | 262 ++++++++++++++++++
6 files changed, 389 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
create mode 100644 drivers/thermal/cv180x_thermal.c
--
2.45.2
Add common sensor device Sophgo CV18xx SoCs and thermal zone for
CV1800b SoCs.
Signed-off-by: Haylen Chu <[email protected]>
---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 30 +++++++++++++++++++++++++
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 +++++++
2 files changed, 38 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index ec9530972ae2..9e669ab35380 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -12,6 +12,34 @@ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x4000000>;
};
+
+ thermal-zones {
+ soc-thermal-0 {
+ polling-delay-passive = <1000>;
+ polling-delay = <1000>;
+ thermal-sensors = <&soc_temp>;
+
+ trips {
+ soc_passive: soc-passive {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+
+ soc_hot: soc-hot {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+
+ soc_critical: soc-critical {
+ temperature = <100000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
&plic {
@@ -25,3 +53,5 @@ &clint {
&clk {
compatible = "sophgo,cv1800-clk";
};
+
+
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 891932ae470f..b165866d4cad 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -310,5 +310,13 @@ clint: timer@74000000 {
reg = <0x74000000 0x10000>;
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
};
+
+ soc_temp: thermal-sensor@30e0000 {
+ compatible = "sophgo,cv180x-thermal";
+ reg = <0x30e0000 0x100>;
+ clocks = <&clk CLK_TEMPSEN>;
+ clock-names = "clk_tempsen";
+ #thermal-sensor-cells = <0>;
+ };
};
};
--
2.45.2
Add support for cv180x SoCs integrated thermal sensors.
Signed-off-by: Haylen Chu <[email protected]>
---
drivers/thermal/Kconfig | 6 +
drivers/thermal/Makefile | 1 +
drivers/thermal/cv180x_thermal.c | 262 +++++++++++++++++++++++++++++++
3 files changed, 269 insertions(+)
create mode 100644 drivers/thermal/cv180x_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 204ed89a3ec9..f53c973a361d 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
is higher than the high temperature threshold or lower than the low
temperature threshold, the interrupt will occur.
+config CV180X_THERMAL
+ tristate "Temperature sensor driver for Sophgo CV180X"
+ help
+ If you say yes here you get support for thermal sensor integrated in
+ Sophgo CV180X SoCs.
+
endif
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 5cdf7d68687f..5b59bde8a579 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL) += amlogic_thermal.o
obj-$(CONFIG_SPRD_THERMAL) += sprd_thermal.o
obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL) += khadas_mcu_fan.o
obj-$(CONFIG_LOONGSON2_THERMAL) += loongson2_thermal.o
+obj-$(CONFIG_CV180X_THERMAL) += cv180x_thermal.o
diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
new file mode 100644
index 000000000000..89425e2b75a2
--- /dev/null
+++ b/drivers/thermal/cv180x_thermal.c
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Sophgo Inc.
+ * Copyright (C) 2024 Haylen Chu <[email protected]>
+ */
+
+#include <linux/bits.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/thermal.h>
+
+#define TEMPSEN_VERSION 0x0
+#define TEMPSEN_CTRL 0x4
+#define TEMPSEN_CTRL_EN BIT(0)
+#define TEMPSEN_CTRL_SEL_MASK GENMASK(7, 4)
+#define TEMPSEN_CTRL_SEL_OFFSET 4
+#define TEMPSEN_STATUS 0x8
+#define TEMPSEN_SET 0xc
+#define TEMPSEN_SET_CHOPSEL_MASK GENMASK(5, 4)
+#define TEMPSEN_SET_CHOPSEL_OFFSET 4
+#define TEMPSEN_SET_CHOPSEL_128T 0
+#define TEMPSEN_SET_CHOPSEL_256T 1
+#define TEMPSEN_SET_CHOPSEL_512T 2
+#define TEMPSEN_SET_CHOPSEL_1024T 3
+#define TEMPSEN_SET_ACCSEL_MASK GENMASK(7, 6)
+#define TEMPSEN_SET_ACCSEL_OFFSET 6
+#define TEMPSEN_SET_ACCSEL_512T 0
+#define TEMPSEN_SET_ACCSEL_1024T 1
+#define TEMPSEN_SET_ACCSEL_2048T 2
+#define TEMPSEN_SET_ACCSEL_4096T 3
+#define TEMPSEN_SET_CYC_CLKDIV_MASK GENMASK(15, 8)
+#define TEMPSEN_SET_CYC_CLKDIV_OFFSET 8
+#define TEMPSEN_INTR_EN 0x10
+#define TEMPSEN_INTR_CLR 0x14
+#define TEMPSEN_INTR_STA 0x18
+#define TEMPSEN_INTR_RAW 0x1c
+#define TEMPSEN_RESULT(n) (0x20 + (n) * 4)
+#define TEMPSEN_RESULT_RESULT_MASK GENMASK(12, 0)
+#define TEMPSEN_RESULT_MAX_RESULT_MASK GENMASK(28, 16)
+#define TEMPSEN_RESULT_CLR_MAX_RESULT BIT(31)
+#define TEMPSEN_AUTO_PERIOD 0x64
+#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK GENMASK(23, 0)
+#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET 0
+
+struct cv180x_thermal_zone {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *clk_tempsen;
+ u32 chop_period;
+ u32 accum_period;
+ u32 sample_cycle;
+};
+
+static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
+{
+ void __iomem *base = ctz->base;
+ u32 regval;
+
+ writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
+ writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
+
+ regval = readl(base + TEMPSEN_SET);
+ regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
+ regval &= ~TEMPSEN_SET_ACCSEL_MASK;
+ regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
+ regval |= ctz->chop_period << TEMPSEN_SET_CHOPSEL_OFFSET;
+ regval |= ctz->accum_period << TEMPSEN_SET_ACCSEL_OFFSET;
+ regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
+ writel(regval, base + TEMPSEN_SET);
+
+ regval = readl(base + TEMPSEN_AUTO_PERIOD);
+ regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
+ regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
+ writel(regval, base + TEMPSEN_AUTO_PERIOD);
+
+ regval = readl(base + TEMPSEN_CTRL);
+ regval &= ~TEMPSEN_CTRL_SEL_MASK;
+ regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
+ regval |= TEMPSEN_CTRL_EN;
+ writel(regval, base + TEMPSEN_CTRL);
+}
+
+static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
+{
+ void __iomem *base = ct->base;
+ u32 regval;
+
+ regval = readl(base + TEMPSEN_CTRL);
+ regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
+ writel(regval, base + TEMPSEN_CTRL);
+
+ writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
+}
+
+/*
+ * Raw register value to temperature (mC) formula:
+ *
+ * read_val * 1000 * 716
+ * Temperature = ----------------------- - 273000
+ * divider
+ *
+ * where divider should be ticks number of accumulation period,
+ * e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
+ */
+static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
+{
+ u32 divider = (u32)(512 * int_pow(2, ctz->accum_period));
+
+ return (result * 1000) * 716 / divider - 273000;
+}
+
+static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
+{
+ struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
+ void __iomem *base = ctz->base;
+ u32 result;
+
+ result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
+ *temperature = cv180x_calc_temp(ctz, result);
+
+ return 0;
+}
+
+static const struct thermal_zone_device_ops cv180x_thermal_ops = {
+ .get_temp = cv180x_get_temp,
+};
+
+static const struct of_device_id cv180x_thermal_of_match[] = {
+ { .compatible = "sophgo,cv1800-thermal" },
+ { .compatible = "sophgo,cv180x-thermal" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
+
+static int
+cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
+{
+ struct device_node *np = ctz->dev->of_node;
+
+ if (of_property_read_u32(np, "accumulation-period",
+ &ctz->accum_period)) {
+ ctz->accum_period = TEMPSEN_SET_ACCSEL_2048T;
+ } else {
+ if (ctz->accum_period < TEMPSEN_SET_ACCSEL_512T ||
+ ctz->accum_period > TEMPSEN_SET_ACCSEL_4096T) {
+ dev_err(ctz->dev, "invalid accumulation period %d\n",
+ ctz->accum_period);
+ return -EINVAL;
+ }
+ }
+
+ if (of_property_read_u32(np, "chop-period", &ctz->chop_period)) {
+ ctz->chop_period = TEMPSEN_SET_CHOPSEL_1024T;
+ } else {
+ if (ctz->chop_period < TEMPSEN_SET_CHOPSEL_128T ||
+ ctz->chop_period > TEMPSEN_SET_CHOPSEL_1024T) {
+ dev_err(ctz->dev, "invalid chop period %d\n",
+ ctz->chop_period);
+ return -EINVAL;
+ }
+ }
+
+ if (of_property_read_u32(np, "sample-cycle-us", &ctz->sample_cycle))
+ ctz->sample_cycle = 1000000;
+
+ return 0;
+}
+
+static int cv180x_thermal_probe(struct platform_device *pdev)
+{
+ struct cv180x_thermal_zone *ctz;
+ struct thermal_zone_device *tz;
+ struct resource *res;
+ int ret;
+
+ ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
+ if (!ctz)
+ return -ENOMEM;
+
+ ctz->dev = &pdev->dev;
+
+ ret = cv180x_parse_dt(ctz);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ ctz->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(ctz->base))
+ return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
+ "failed to map tempsen registers\n");
+
+ ctz->clk_tempsen = devm_clk_get(&pdev->dev, "clk_tempsen");
+ if (IS_ERR(ctz->clk_tempsen))
+ return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
+ "failed to get clk_tempsen\n");
+
+ clk_prepare_enable(ctz->clk_tempsen);
+
+ cv180x_thermal_init(ctz);
+
+ tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
+ &cv180x_thermal_ops);
+ if (IS_ERR(tz))
+ return dev_err_probe(&pdev->dev, PTR_ERR(tz),
+ "failed to register thermal zone\n");
+
+ platform_set_drvdata(pdev, ctz);
+
+ return 0;
+}
+
+static int cv180x_thermal_remove(struct platform_device *pdev)
+{
+ struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
+
+ cv180x_thermal_deinit(ctz);
+ clk_disable_unprepare(ctz->clk_tempsen);
+
+ return 0;
+}
+
+static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
+{
+ struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
+
+ cv180x_thermal_deinit(ctz);
+ clk_disable_unprepare(ctz->clk_tempsen);
+
+ return 0;
+}
+
+static int __maybe_unused cv180x_thermal_resume(struct device *dev)
+{
+ struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
+
+ clk_prepare_enable(ctz->clk_tempsen);
+ cv180x_thermal_init(ctz);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
+ cv180x_thermal_suspend, cv180x_thermal_resume);
+
+static struct platform_driver cv180x_thermal_driver = {
+ .probe = cv180x_thermal_probe,
+ .remove = cv180x_thermal_remove,
+ .driver = {
+ .name = "cv180x-thermal",
+ .pm = &cv180x_thermal_pm_ops,
+ .of_match_table = cv180x_thermal_of_match,
+ },
+};
+
+module_platform_driver(cv180x_thermal_driver);
+
+MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
+MODULE_AUTHOR("Haylen Chu <[email protected]>");
+MODULE_LICENSE("GPL");
--
2.45.2
Add devicetree binding documentation for thermal sensors integrated in
Sophgo CV180X SoCs.
Signed-off-by: Haylen Chu <[email protected]>
---
.../thermal/sophgo,cv180x-thermal.yaml | 82 +++++++++++++++++++
1 file changed, 82 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
diff --git a/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
new file mode 100644
index 000000000000..1c3a6f74ff1d
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/sophgo,cv180x-thermal.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo CV180x on-SoC Thermal Sensor
+
+maintainers:
+ - Haylen Chu <[email protected]>
+
+description: Binding for Sophgo CV180x on-SoC thermal sensor
+
+properties:
+ compatible:
+ enum:
+ - sophgo,cv1800-thermal
+ - sophgo,cv180x-thermal
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: The thermal sensor clock
+
+ clock-names:
+ const: clk_tempsen
+
+ accumulation-period:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Accumulation period for a sample
+ oneOf:
+ - const: 0
+ description: 512 ticks
+ - const: 1
+ description: 1024 ticks
+ - const: 2
+ description: 2048 ticks
+ - const: 3
+ description: 4096 ticks
+ default: 2
+
+ chop-period:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: ADC chop period
+ oneOf:
+ - const: 0
+ description: 128 ticks
+ - const: 1
+ description: 256 ticks
+ - const: 2
+ description: 512 ticks
+ - const: 3
+ description: 1024 ticks
+ default: 3
+
+ sample-cycle-us:
+ description: Period between samples
+ default: 1000000
+
+ '#thermal-sensor-cells':
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/sophgo,cv1800.h>
+ thermal-sensor@30e0000 {
+ compatible = "sophgo,cv180x-thermal";
+ reg = <0x30e0000 0x100>;
+ clocks = <&clk CLK_TEMPSEN>;
+ clock-names = "clk_tempsen";
+ #thermal-sensor-cells = <0>;
+ };
+...
--
2.45.2
On Tue, Jun 04, 2024 at 12:54:19PM GMT, Haylen Chu wrote:
> Add devicetree binding documentation for thermal sensors integrated in
> Sophgo CV180X SoCs.
>
> Signed-off-by: Haylen Chu <[email protected]>
> ---
> .../thermal/sophgo,cv180x-thermal.yaml | 82 +++++++++++++++++++
> 1 file changed, 82 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
>
> diff --git a/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
> new file mode 100644
> index 000000000000..1c3a6f74ff1d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/thermal/sophgo,cv180x-thermal.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo CV180x on-SoC Thermal Sensor
> +
> +maintainers:
> + - Haylen Chu <[email protected]>
> +
> +description: Binding for Sophgo CV180x on-SoC thermal sensor
> +
> +properties:
> + compatible:
> + enum:
> + - sophgo,cv1800-thermal
> + - sophgo,cv180x-thermal
> +
Is this necessary? I don't find any change between the sensor of these.
> + reg:
> + maxItems: 1
> +
> + clocks:
> + description: The thermal sensor clock
> +
> + clock-names:
> + const: clk_tempsen
> +
> + accumulation-period:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Accumulation period for a sample
> + oneOf:
> + - const: 0
> + description: 512 ticks
> + - const: 1
> + description: 1024 ticks
> + - const: 2
> + description: 2048 ticks
> + - const: 3
> + description: 4096 ticks
> + default: 2
> +
> + chop-period:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: ADC chop period
> + oneOf:
> + - const: 0
> + description: 128 ticks
> + - const: 1
> + description: 256 ticks
> + - const: 2
> + description: 512 ticks
> + - const: 3
> + description: 1024 ticks
> + default: 3
> +
> + sample-cycle-us:
> + description: Period between samples
> + default: 1000000
> +
> + '#thermal-sensor-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/sophgo,cv1800.h>
> + thermal-sensor@30e0000 {
> + compatible = "sophgo,cv180x-thermal";
> + reg = <0x30e0000 0x100>;
> + clocks = <&clk CLK_TEMPSEN>;
> + clock-names = "clk_tempsen";
> + #thermal-sensor-cells = <0>;
> + };
> +...
Where is the interrupt number? The sensors does support the interrupt,
but I don't see you describe it in the binding.
> --
> 2.45.2
>
On Wed, Jun 05, 2024 at 11:40:32AM +0800, Inochi Amaoto wrote:
> On Tue, Jun 04, 2024 at 12:54:19PM GMT, Haylen Chu wrote:
> > Add devicetree binding documentation for thermal sensors integrated in
> > Sophgo CV180X SoCs.
> >
> > Signed-off-by: Haylen Chu <[email protected]>
> > ---
> > .../thermal/sophgo,cv180x-thermal.yaml | 82 +++++++++++++++++++
> > 1 file changed, 82 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
> > new file mode 100644
> > index 000000000000..1c3a6f74ff1d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml
> > @@ -0,0 +1,82 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/thermal/sophgo,cv180x-thermal.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Sophgo CV180x on-SoC Thermal Sensor
> > +
> > +maintainers:
> > + - Haylen Chu <[email protected]>
> > +
> > +description: Binding for Sophgo CV180x on-SoC thermal sensor
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - sophgo,cv1800-thermal
> > + - sophgo,cv180x-thermal
> > +
>
> Is this necessary? I don't find any change between the sensor of these.
"cv180x" isn't even a real device. Either we have a compatible that
matches an actual SoC and use it everywhere, or we add ones for each SoC
and have a fallback to cv1800.
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + description: The thermal sensor clock
> > +
> > + clock-names:
> > + const: clk_tempsen
clock-names is not useful here as there's only one clock.
"clk_tempsen" sounds more like the name for this clock at the provider
than at the consumer anyway.
> > +
> > + accumulation-period:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: Accumulation period for a sample
> > + oneOf:
> > + - const: 0
> > + description: 512 ticks
> > + - const: 1
> > + description: 1024 ticks
> > + - const: 2
> > + description: 2048 ticks
> > + - const: 3
> > + description: 4096 ticks
> > + default: 2
> > +
> > + chop-period:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: ADC chop period
What's a "chop" and why is either this or the accumulation-period a
fixed property of the hardware? Shouldn't this choice really be up to
the user?
> > + oneOf:
> > + - const: 0
> > + description: 128 ticks
> > + - const: 1
> > + description: 256 ticks
> > + - const: 2
> > + description: 512 ticks
> > + - const: 3
> > + description: 1024 ticks
Can we just make the number of ticks the unit here, and above?
Also, a "oneOf: - const" structure is just an enum.
> > + default: 3
> > +
> > + sample-cycle-us:
> > + description: Period between samples
> > + default: 1000000
No constraints?
Thanks,
Conor.
> > +
> > + '#thermal-sensor-cells':
> > + const: 0
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/sophgo,cv1800.h>
> > + thermal-sensor@30e0000 {
> > + compatible = "sophgo,cv180x-thermal";
> > + reg = <0x30e0000 0x100>;
> > + clocks = <&clk CLK_TEMPSEN>;
> > + clock-names = "clk_tempsen";
> > + #thermal-sensor-cells = <0>;
> > + };
> > +...
>
> Where is the interrupt number? The sensors does support the interrupt,
> but I don't see you describe it in the binding.
>
> > --
> > 2.45.2
> >
On Wed, Jun 05, 2024 at 06:54:17PM +0100, Conor Dooley wrote:
> > > + accumulation-period:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: Accumulation period for a sample
> > > + oneOf:
> > > + - const: 0
> > > + description: 512 ticks
> > > + - const: 1
> > > + description: 1024 ticks
> > > + - const: 2
> > > + description: 2048 ticks
> > > + - const: 3
> > > + description: 4096 ticks
> > > + default: 2
> > > +
> > > + chop-period:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + description: ADC chop period
>
> What's a "chop" and why is either this or the accumulation-period a
> fixed property of the hardware? Shouldn't this choice really be up to
> the user?
The chop-period is an ADC parameter.
Both accumulation-period and chop-period specify how the sensor
measures temperature. Making these parameters up to end users brings
extra unnecessary code complexity. Being configurable for each board
should be enough and other thermal drivers have been doing things in
this way.
>
> > > + oneOf:
> > > + - const: 0
> > > + description: 128 ticks
> > > + - const: 1
> > > + description: 256 ticks
> > > + - const: 2
> > > + description: 512 ticks
> > > + - const: 3
> > > + description: 1024 ticks
>
> Can we just make the number of ticks the unit here, and above?
> Also, a "oneOf: - const" structure is just an enum.
I do not catch your idea. These values directly map to raw register
configuration, which simplify the implementation a lot.
>
> > > + default: 3
> > > +
> > > + sample-cycle-us:
> > > + description: Period between samples
> > > + default: 1000000
> No constraints?
Sample cycle is more flexible because of hardware designing.
Best reguards,
Haylen Chu
On Thu, Jun 06, 2024 at 01:32:46PM +0000, Haylen Chu wrote:
> On Wed, Jun 05, 2024 at 06:54:17PM +0100, Conor Dooley wrote:
> > > > + accumulation-period:
> > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > + description: Accumulation period for a sample
> > > > + oneOf:
> > > > + - const: 0
> > > > + description: 512 ticks
> > > > + - const: 1
> > > > + description: 1024 ticks
> > > > + - const: 2
> > > > + description: 2048 ticks
> > > > + - const: 3
> > > > + description: 4096 ticks
> > > > + default: 2
> > > > +
> > > > + chop-period:
> > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > + description: ADC chop period
> >
> > What's a "chop" and why is either this or the accumulation-period a
> > fixed property of the hardware? Shouldn't this choice really be up to
> > the user?
>
> The chop-period is an ADC parameter.
>
> Both accumulation-period and chop-period specify how the sensor
> measures temperature. Making these parameters up to end users brings
> extra unnecessary code complexity. Being configurable for each board
> should be enough and other thermal drivers have been doing things in
> this way.
Other systems may well have properties for this, but something being
done in the past doesn't mean it might be the right thing to do now.
I don't really buy that this is something you set to a fixed value per
board, but rather the use case of a particular board would factor into
whether or not you would want to use a shorter or longer accumulation
period.
> > > > + oneOf:
> > > > + - const: 0
> > > > + description: 128 ticks
> > > > + - const: 1
> > > > + description: 256 ticks
> > > > + - const: 2
> > > > + description: 512 ticks
> > > > + - const: 3
> > > > + description: 1024 ticks
> >
> > Can we just make the number of ticks the unit here, and above?
> > Also, a "oneOf: - const" structure is just an enum.
>
> I do not catch your idea. These values directly map to raw register
> configuration, which simplify the implementation a lot.
It should be trivial to convert them to register values in your driver.
> > > > + default: 3
> > > > +
> > > > + sample-cycle-us:
> > > > + description: Period between samples
> > > > + default: 1000000
> > No constraints?
>
> Sample cycle is more flexible because of hardware designing.
It quite likely has constraints, flexible or not. Is the hardware
capable of both 1 us and uint32_max us?
Thanks,
Conor.
Hi Haylen,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rafael-pm/thermal]
[also build test WARNING on robh/for-next linus/master v6.10-rc2 next-20240606]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Haylen-Chu/dt-bindings-thermal-sophgo-cv180x-thermal-Add-Sophgo-CV180x-thermal/20240604-205916
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git thermal
patch link: https://lore.kernel.org/r/SG2PR01MB42184CFE2C3D3E210CC6F7DAD7F82%40SG2PR01MB4218.apcprd01.prod.exchangelabs.com
patch subject: [PATCH v2 2/3] riscv: dts: sophgo: cv18xx: Add sensor device and thermal zone
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project d7d2d4f53fc79b4b58e8d8d08151b577c3699d4a)
dtschema version: 2024.6.dev1+g833054f
reproduce: (https://download.01.org/0day-ci/archive/20240607/[email protected]/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
dtcheck warnings: (new ones prefixed by >>)
>> arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dtb: thermal-zones: 'soc-thermal-0' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
On Tue, Jun 04, 2024 at 12:54:21PM GMT, Haylen Chu wrote:
> Add support for cv180x SoCs integrated thermal sensors.
>
> Signed-off-by: Haylen Chu <[email protected]>
> ---
> drivers/thermal/Kconfig | 6 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/cv180x_thermal.c | 262 +++++++++++++++++++++++++++++++
> 3 files changed, 269 insertions(+)
> create mode 100644 drivers/thermal/cv180x_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 204ed89a3ec9..f53c973a361d 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
> is higher than the high temperature threshold or lower than the low
> temperature threshold, the interrupt will occur.
>
> +config CV180X_THERMAL
> + tristate "Temperature sensor driver for Sophgo CV180X"
> + help
> + If you say yes here you get support for thermal sensor integrated in
> + Sophgo CV180X SoCs.
> +
> endif
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 5cdf7d68687f..5b59bde8a579 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL) += amlogic_thermal.o
> obj-$(CONFIG_SPRD_THERMAL) += sprd_thermal.o
> obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL) += khadas_mcu_fan.o
> obj-$(CONFIG_LOONGSON2_THERMAL) += loongson2_thermal.o
> +obj-$(CONFIG_CV180X_THERMAL) += cv180x_thermal.o
> diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> new file mode 100644
> index 000000000000..89425e2b75a2
> --- /dev/null
> +++ b/drivers/thermal/cv180x_thermal.c
> @@ -0,0 +1,262 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2021 Sophgo Inc.
> + * Copyright (C) 2024 Haylen Chu <[email protected]>
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <linux/thermal.h>
> +
> +#define TEMPSEN_VERSION 0x0
> +#define TEMPSEN_CTRL 0x4
> +#define TEMPSEN_CTRL_EN BIT(0)
> +#define TEMPSEN_CTRL_SEL_MASK GENMASK(7, 4)
> +#define TEMPSEN_CTRL_SEL_OFFSET 4
> +#define TEMPSEN_STATUS 0x8
> +#define TEMPSEN_SET 0xc
> +#define TEMPSEN_SET_CHOPSEL_MASK GENMASK(5, 4)
> +#define TEMPSEN_SET_CHOPSEL_OFFSET 4
> +#define TEMPSEN_SET_CHOPSEL_128T 0
> +#define TEMPSEN_SET_CHOPSEL_256T 1
> +#define TEMPSEN_SET_CHOPSEL_512T 2
> +#define TEMPSEN_SET_CHOPSEL_1024T 3
> +#define TEMPSEN_SET_ACCSEL_MASK GENMASK(7, 6)
> +#define TEMPSEN_SET_ACCSEL_OFFSET 6
> +#define TEMPSEN_SET_ACCSEL_512T 0
> +#define TEMPSEN_SET_ACCSEL_1024T 1
> +#define TEMPSEN_SET_ACCSEL_2048T 2
> +#define TEMPSEN_SET_ACCSEL_4096T 3
> +#define TEMPSEN_SET_CYC_CLKDIV_MASK GENMASK(15, 8)
> +#define TEMPSEN_SET_CYC_CLKDIV_OFFSET 8
> +#define TEMPSEN_INTR_EN 0x10
> +#define TEMPSEN_INTR_CLR 0x14
> +#define TEMPSEN_INTR_STA 0x18
> +#define TEMPSEN_INTR_RAW 0x1c
> +#define TEMPSEN_RESULT(n) (0x20 + (n) * 4)
> +#define TEMPSEN_RESULT_RESULT_MASK GENMASK(12, 0)
> +#define TEMPSEN_RESULT_MAX_RESULT_MASK GENMASK(28, 16)
> +#define TEMPSEN_RESULT_CLR_MAX_RESULT BIT(31)
> +#define TEMPSEN_AUTO_PERIOD 0x64
> +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK GENMASK(23, 0)
> +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET 0
> +
> +struct cv180x_thermal_zone {
> + struct device *dev;
> + void __iomem *base;
> + struct clk *clk_tempsen;
> + u32 chop_period;
> + u32 accum_period;
> + u32 sample_cycle;
> +};
> +
> +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> +{
> + void __iomem *base = ctz->base;
> + u32 regval;
> +
> + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> + writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> +
> + regval = readl(base + TEMPSEN_SET);
> + regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> + regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> + regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> + regval |= ctz->chop_period << TEMPSEN_SET_CHOPSEL_OFFSET;
> + regval |= ctz->accum_period << TEMPSEN_SET_ACCSEL_OFFSET;
> + regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> + writel(regval, base + TEMPSEN_SET);
> +
> + regval = readl(base + TEMPSEN_AUTO_PERIOD);
> + regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> + regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> + writel(regval, base + TEMPSEN_AUTO_PERIOD);
> +
> + regval = readl(base + TEMPSEN_CTRL);
> + regval &= ~TEMPSEN_CTRL_SEL_MASK;
> + regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> + regval |= TEMPSEN_CTRL_EN;
> + writel(regval, base + TEMPSEN_CTRL);
> +}
> +
> +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> +{
> + void __iomem *base = ct->base;
> + u32 regval;
> +
> + regval = readl(base + TEMPSEN_CTRL);
> + regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> + writel(regval, base + TEMPSEN_CTRL);
> +
> + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> +}
> +
> +/*
> + * Raw register value to temperature (mC) formula:
> + *
> + * read_val * 1000 * 716
> + * Temperature = ----------------------- - 273000
> + * divider
> + *
> + * where divider should be ticks number of accumulation period,
> + * e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> + */
> +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> +{
> + u32 divider = (u32)(512 * int_pow(2, ctz->accum_period));
> +
> + return (result * 1000) * 716 / divider - 273000;
> +}
> +
According to the staff from Sophgo, the original formula is just done
by curve fitting. And the formula is not affected by any parameters.
Those parameters only affect timing.
Although this is still uncertainty about how to calculate the temp,
I suspect you did not test your patch well, and the formula you wrote
is obviously broken. Please test your patch in all conditions.
> +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> +{
> + struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> + void __iomem *base = ctz->base;
> + u32 result;
> +
> + result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> + *temperature = cv180x_calc_temp(ctz, result);
> +
> + return 0;
> +}
> +
> +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> + .get_temp = cv180x_get_temp,
> +};
> +
> +static const struct of_device_id cv180x_thermal_of_match[] = {
> + { .compatible = "sophgo,cv1800-thermal" },
> + { .compatible = "sophgo,cv180x-thermal" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> +
> +static int
> +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> +{
> + struct device_node *np = ctz->dev->of_node;
> +
> + if (of_property_read_u32(np, "accumulation-period",
> + &ctz->accum_period)) {
> + ctz->accum_period = TEMPSEN_SET_ACCSEL_2048T;
> + } else {
> + if (ctz->accum_period < TEMPSEN_SET_ACCSEL_512T ||
> + ctz->accum_period > TEMPSEN_SET_ACCSEL_4096T) {
> + dev_err(ctz->dev, "invalid accumulation period %d\n",
> + ctz->accum_period);
> + return -EINVAL;
> + }
> + }
> +
> + if (of_property_read_u32(np, "chop-period", &ctz->chop_period)) {
> + ctz->chop_period = TEMPSEN_SET_CHOPSEL_1024T;
> + } else {
> + if (ctz->chop_period < TEMPSEN_SET_CHOPSEL_128T ||
> + ctz->chop_period > TEMPSEN_SET_CHOPSEL_1024T) {
> + dev_err(ctz->dev, "invalid chop period %d\n",
> + ctz->chop_period);
> + return -EINVAL;
> + }
> + }
> +
> + if (of_property_read_u32(np, "sample-cycle-us", &ctz->sample_cycle))
> + ctz->sample_cycle = 1000000;
> +
> + return 0;
> +}
> +
> +static int cv180x_thermal_probe(struct platform_device *pdev)
> +{
> + struct cv180x_thermal_zone *ctz;
> + struct thermal_zone_device *tz;
> + struct resource *res;
> + int ret;
> +
> + ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> + if (!ctz)
> + return -ENOMEM;
> +
> + ctz->dev = &pdev->dev;
> +
> + ret = cv180x_parse_dt(ctz);
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + ctz->base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(ctz->base))
> + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> + "failed to map tempsen registers\n");
> +
> + ctz->clk_tempsen = devm_clk_get(&pdev->dev, "clk_tempsen");
> + if (IS_ERR(ctz->clk_tempsen))
> + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> + "failed to get clk_tempsen\n");
> +
> + clk_prepare_enable(ctz->clk_tempsen);
> +
> + cv180x_thermal_init(ctz);
> +
> + tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> + &cv180x_thermal_ops);
> + if (IS_ERR(tz))
> + return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> + "failed to register thermal zone\n");
> +
> + platform_set_drvdata(pdev, ctz);
> +
> + return 0;
> +}
> +
> +static int cv180x_thermal_remove(struct platform_device *pdev)
> +{
> + struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> +
> + cv180x_thermal_deinit(ctz);
> + clk_disable_unprepare(ctz->clk_tempsen);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> +{
> + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> + cv180x_thermal_deinit(ctz);
> + clk_disable_unprepare(ctz->clk_tempsen);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> +{
> + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> + clk_prepare_enable(ctz->clk_tempsen);
> + cv180x_thermal_init(ctz);
> +
> + return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> + cv180x_thermal_suspend, cv180x_thermal_resume);
> +
> +static struct platform_driver cv180x_thermal_driver = {
> + .probe = cv180x_thermal_probe,
> + .remove = cv180x_thermal_remove,
> + .driver = {
> + .name = "cv180x-thermal",
> + .pm = &cv180x_thermal_pm_ops,
> + .of_match_table = cv180x_thermal_of_match,
> + },
> +};
> +
> +module_platform_driver(cv180x_thermal_driver);
> +
> +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> +MODULE_AUTHOR("Haylen Chu <[email protected]>");
> +MODULE_LICENSE("GPL");
> --
> 2.45.2
>