Hi Bjorn/ Lorenzo/Krzysztof,
Can you please provide any update on this patch series.
Regards,
Thippeswamy H
> -----Original Message-----
> From: Bjorn Helgaas <[email protected]>
> Sent: Wednesday, September 6, 2023 10:55 PM
> To: Havalige, Thippeswamy <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Simek, Michal
> <[email protected]>; Gogada, Bharat Kumar
> <[email protected]>
> Subject: Re: [PATCH v7 3/3] PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
>
> On Wed, Aug 30, 2023 at 02:37:07PM +0530, Thippeswamy Havalige wrote:
> > Add support for Xilinx XDMA Soft IP core as Root Port.
> >
> > The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in
> > programmable logic.
> >
> > The integrated XDMA soft IP block has integrated bridge function that
> > can act as PCIe Root Port.
>
> > + if (!pci_is_root_bus(bus)) {
> > + /* Checking whether the link is up is the last line of
> > + * defense, and this check is inherently racy by definition.
> > + * Sending a PIO request to a downstream device when the
> link is
> > + * down causes an unrecoverable error, and a reset of the
> entire
> > + * PCIe controller will be needed. We can reduce the
> likelihood
> > + * of that unrecoverable error by checking whether the link is
> > + * up, but we can't completely prevent it because the link may
> > + * go down between the link-up check and the PIO request.
> > + */
>
> Looks fine to me. If Lorenzo or Krzysztof thinks this is ready to go, maybe they
> will tidy the comment above, i.e.,
>
> /*
> * Checking whether ...
On 19/09/2023 15:21, Havalige, Thippeswamy wrote:
> Hi Bjorn/ Lorenzo/Krzysztof,
>
> Can you please provide any update on this patch series.
Krzysztof? You need to Cc him first... I mean, the other Krzysztof, or
whoever is needed to be Cc-ed.
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC (and consider --no-git-fallback argument). It might
happen, that command when run on an older kernel, gives you outdated
entries. Therefore please be sure you base your patches on recent Linux
kernel.
Best regards,
Krzysztof
++Krzysztof Wilczyński
Can you please provide any update on this patch series.
Regards,
Thippeswamy H
> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: Wednesday, September 20, 2023 6:49 PM
> To: Havalige, Thippeswamy <[email protected]>; Bjorn
> Helgaas <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Simek, Michal
> <[email protected]>; Gogada, Bharat Kumar
> <[email protected]>
> Subject: Re: [PATCH v7 3/3] PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
>
> On 19/09/2023 15:21, Havalige, Thippeswamy wrote:
> > Hi Bjorn/ Lorenzo/Krzysztof,
> >
> > Can you please provide any update on this patch series.
>
> Krzysztof? You need to Cc him first... I mean, the other Krzysztof, or whoever
> is needed to be Cc-ed.
>
> Please use scripts/get_maintainers.pl to get a list of necessary people and lists
> to CC (and consider --no-git-fallback argument). It might happen, that
> command when run on an older kernel, gives you outdated entries. Therefore
> please be sure you base your patches on recent Linux kernel.
>
> Best regards,
> Krzysztof
On 25/09/2023 11:22, Havalige, Thippeswamy wrote:
> ++Krzysztof Wilczyński
>
> Can you please provide any update on this patch series.
And now please think... how can he comment on this one liner since he
did not receive anything else? Since he was not Cced on original
submission, he has nothing from this thread in inbox. Only this one
email with one line above.
How any reviewer can understand something without context? This does not
work like that. You cannot just add someone to Cc to one line comment
and expect that maintainers will start looking for your patches so they
can perform the review, just because you need it.
You must resend your patchset following Linux kernel process - Ccing all
respective maintainers, not just some.
You have experienced contributors and maintainers in Xilinx/AMD, so
please talk with them how the process should look like.
Best regards,
Krzysztof