Hi Greg,
Due to an unfortunate oversight, commit 2d4dd0da45401c7a ("serial: sh-sci:
Allow for compressed SCIF address") broke earlycon on all Renesas ARM
platforms using a SCIF port for the serial console (R-Car, RZ/A1, RZ/G1,
RZ/G2 SoCs), due to an incorrect value of port->regshift.
This patch series fixes that by reverting that commit, and a (reverse)
dependency.
Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
separate patch.
Thanks for applying!
Geert Uytterhoeven (2):
Revert "serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE"
Revert "serial: sh-sci: Allow for compressed SCIF address"
drivers/tty/serial/sh-sci.c | 56 +++++++++++++++++++++++++++----------
include/linux/serial_sci.h | 1 +
2 files changed, 42 insertions(+), 15 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
This reverts commit 7acece71a517cad83a0842a94d94c13f271b680c.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
drivers/tty/serial/sh-sci.c | 31 +++++++++++++++++++++++++++++++
include/linux/serial_sci.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index ac4424bf6b136cc4..5d42c9a63001575a 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -291,6 +291,33 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
.error_clear = SCIF_ERROR_CLEAR,
},
+ /*
+ * The "SCIFA" that is in RZ/T and RZ/A2.
+ * It looks like a normal SCIF with FIFO data, but with a
+ * compressed address space. Also, the break out of interrupts
+ * are different: ERI/BRI, RXI, TXI, TEI, DRI.
+ */
+ [SCIx_RZ_SCIFA_REGTYPE] = {
+ .regs = {
+ [SCSMR] = { 0x00, 16 },
+ [SCBRR] = { 0x02, 8 },
+ [SCSCR] = { 0x04, 16 },
+ [SCxTDR] = { 0x06, 8 },
+ [SCxSR] = { 0x08, 16 },
+ [SCxRDR] = { 0x0A, 8 },
+ [SCFCR] = { 0x0C, 16 },
+ [SCFDR] = { 0x0E, 16 },
+ [SCSPTR] = { 0x10, 16 },
+ [SCLSR] = { 0x12, 16 },
+ },
+ .fifosize = 16,
+ .overrun_reg = SCLSR,
+ .overrun_mask = SCLSR_ORER,
+ .sampling_rate_mask = SCI_SR(32),
+ .error_mask = SCIF_DEFAULT_ERROR_MASK,
+ .error_clear = SCIF_ERROR_CLEAR,
+ },
+
/*
* Common SH-3 SCIF definitions.
*/
@@ -3110,6 +3137,10 @@ static const struct of_device_id of_sci_match[] = {
.compatible = "renesas,scif-r7s72100",
.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH2_SCIF_FIFODATA_REGTYPE),
},
+ {
+ .compatible = "renesas,scif-r7s9210",
+ .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
+ },
/* Family-specific types */
{
.compatible = "renesas,rcar-gen1-scif",
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index c0e795d95477daea..1c89611e0e0634ae 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -36,6 +36,7 @@ enum {
SCIx_SH4_SCIF_FIFODATA_REGTYPE,
SCIx_SH7705_SCIF_REGTYPE,
SCIx_HSCIF_REGTYPE,
+ SCIx_RZ_SCIFA_REGTYPE,
SCIx_NR_REGTYPES,
};
--
2.17.1
This reverts commit 2d4dd0da45401c7ae7332b4d1eb7bbb1348edde9.
This broke earlycon on all Renesas ARM platforms using a SCIF port for the
serial console (R-Car, RZ/A1, RZ/G1, RZ/G2 SoCs), due to an incorrect value
of port->regshift.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
drivers/tty/serial/sh-sci.c | 25 ++++++++++---------------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 5d42c9a63001575a..ab3f6e91853da3c2 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -346,15 +346,15 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
[SCIx_SH4_SCIF_REGTYPE] = {
.regs = {
[SCSMR] = { 0x00, 16 },
- [SCBRR] = { 0x02, 8 },
- [SCSCR] = { 0x04, 16 },
- [SCxTDR] = { 0x06, 8 },
- [SCxSR] = { 0x08, 16 },
- [SCxRDR] = { 0x0a, 8 },
- [SCFCR] = { 0x0c, 16 },
- [SCFDR] = { 0x0e, 16 },
- [SCSPTR] = { 0x10, 16 },
- [SCLSR] = { 0x12, 16 },
+ [SCBRR] = { 0x04, 8 },
+ [SCSCR] = { 0x08, 16 },
+ [SCxTDR] = { 0x0c, 8 },
+ [SCxSR] = { 0x10, 16 },
+ [SCxRDR] = { 0x14, 8 },
+ [SCFCR] = { 0x18, 16 },
+ [SCFDR] = { 0x1c, 16 },
+ [SCSPTR] = { 0x20, 16 },
+ [SCLSR] = { 0x24, 16 },
},
.fifosize = 16,
.overrun_reg = SCLSR,
@@ -2837,7 +2837,7 @@ static int sci_init_single(struct platform_device *dev,
{
struct uart_port *port = &sci_port->port;
const struct resource *res;
- unsigned int i, regtype;
+ unsigned int i;
int ret;
sci_port->cfg = p;
@@ -2874,7 +2874,6 @@ static int sci_init_single(struct platform_device *dev,
if (unlikely(sci_port->params == NULL))
return -EINVAL;
- regtype = sci_port->params - sci_port_params;
switch (p->type) {
case PORT_SCIFB:
sci_port->rx_trigger = 48;
@@ -2929,10 +2928,6 @@ static int sci_init_single(struct platform_device *dev,
port->regshift = 1;
}
- if (regtype == SCIx_SH4_SCIF_REGTYPE)
- if (sci_port->reg_size >= 0x20)
- port->regshift = 1;
-
/*
* The UART port needs an IRQ value, so we peg this to the RX IRQ
* for the multi-IRQ ports, which is where we are primarily
--
2.17.1
Hi Geert,
On Thursday, August 30, 2018, Geert Uytterhoeven wrote:
> Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
> separate patch.
I assume something like this:
(which works for me)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index ab3f6e91853d..426241da2e44 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -3414,6 +3414,12 @@ static int __init scif_early_console_setup(struct earlycon_device *device,
{
return early_console_setup(device, PORT_SCIF);
}
+static int __init rzscifa_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ port_cfg.regtype = SCIx_RZ_SCIFA_REGTYPE;
+ return early_console_setup(device, PORT_SCIF);
+}
static int __init scifa_early_console_setup(struct earlycon_device *device,
const char *opt)
{
@@ -3432,6 +3438,7 @@ static int __init hscif_early_console_setup(struct earlycon_device *device,
OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup);
OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup);
+OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup);
OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup);
OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup);
Chris
Hi Chris,
On Thu, Aug 30, 2018 at 8:52 PM Chris Brandt <[email protected]> wrote:
> On Thursday, August 30, 2018, Geert Uytterhoeven wrote:
> > Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
> > separate patch.
>
> I assume something like this:
Exactly!
> (which works for me)
Thanks for checking!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Thursday, August 30, 2018, Geert Uytterhoeven wrote:
> This reverts commit 7acece71a517cad83a0842a94d94c13f271b680c.
>
> Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Chris Brandt <[email protected]>
> ---
> drivers/tty/serial/sh-sci.c | 31 +++++++++++++++++++++++++++++++
> include/linux/serial_sci.h | 1 +
> 2 files changed, 32 insertions(+)
>
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> index ac4424bf6b136cc4..5d42c9a63001575a 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -291,6 +291,33 @@ static const struct sci_port_params
> sci_port_params[SCIx_NR_REGTYPES] = {
> .error_clear = SCIF_ERROR_CLEAR,
> },
>
> + /*
> + * The "SCIFA" that is in RZ/T and RZ/A2.
> + * It looks like a normal SCIF with FIFO data, but with a
> + * compressed address space. Also, the break out of interrupts
> + * are different: ERI/BRI, RXI, TXI, TEI, DRI.
> + */
> + [SCIx_RZ_SCIFA_REGTYPE] = {
> + .regs = {
> + [SCSMR] = { 0x00, 16 },
> + [SCBRR] = { 0x02, 8 },
> + [SCSCR] = { 0x04, 16 },
> + [SCxTDR] = { 0x06, 8 },
> + [SCxSR] = { 0x08, 16 },
> + [SCxRDR] = { 0x0A, 8 },
> + [SCFCR] = { 0x0C, 16 },
> + [SCFDR] = { 0x0E, 16 },
> + [SCSPTR] = { 0x10, 16 },
> + [SCLSR] = { 0x12, 16 },
> + },
> + .fifosize = 16,
> + .overrun_reg = SCLSR,
> + .overrun_mask = SCLSR_ORER,
> + .sampling_rate_mask = SCI_SR(32),
> + .error_mask = SCIF_DEFAULT_ERROR_MASK,
> + .error_clear = SCIF_ERROR_CLEAR,
> + },
> +
> /*
> * Common SH-3 SCIF definitions.
> */
> @@ -3110,6 +3137,10 @@ static const struct of_device_id of_sci_match[] =
> {
> .compatible = "renesas,scif-r7s72100",
> .data = SCI_OF_DATA(PORT_SCIF,
> SCIx_SH2_SCIF_FIFODATA_REGTYPE),
> },
> + {
> + .compatible = "renesas,scif-r7s9210",
> + .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
> + },
> /* Family-specific types */
> {
> .compatible = "renesas,rcar-gen1-scif",
> diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
> index c0e795d95477daea..1c89611e0e0634ae 100644
> --- a/include/linux/serial_sci.h
> +++ b/include/linux/serial_sci.h
> @@ -36,6 +36,7 @@ enum {
> SCIx_SH4_SCIF_FIFODATA_REGTYPE,
> SCIx_SH7705_SCIF_REGTYPE,
> SCIx_HSCIF_REGTYPE,
> + SCIx_RZ_SCIFA_REGTYPE,
>
> SCIx_NR_REGTYPES,
> };
> --
> 2.17.1
On Thursday, August 30, 2018, Geert Uytterhoeven wrote:
> This reverts commit 2d4dd0da45401c7ae7332b4d1eb7bbb1348edde9.
>
> This broke earlycon on all Renesas ARM platforms using a SCIF port for
> the
> serial console (R-Car, RZ/A1, RZ/G1, RZ/G2 SoCs), due to an incorrect
> value
> of port->regshift.
>
> Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Chris Brandt <[email protected]>
> ---
> drivers/tty/serial/sh-sci.c | 25 ++++++++++---------------
> 1 file changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> index 5d42c9a63001575a..ab3f6e91853da3c2 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -346,15 +346,15 @@ static const struct sci_port_params
> sci_port_params[SCIx_NR_REGTYPES] = {
> [SCIx_SH4_SCIF_REGTYPE] = {
> .regs = {
> [SCSMR] = { 0x00, 16 },
> - [SCBRR] = { 0x02, 8 },
> - [SCSCR] = { 0x04, 16 },
> - [SCxTDR] = { 0x06, 8 },
> - [SCxSR] = { 0x08, 16 },
> - [SCxRDR] = { 0x0a, 8 },
> - [SCFCR] = { 0x0c, 16 },
> - [SCFDR] = { 0x0e, 16 },
> - [SCSPTR] = { 0x10, 16 },
> - [SCLSR] = { 0x12, 16 },
> + [SCBRR] = { 0x04, 8 },
> + [SCSCR] = { 0x08, 16 },
> + [SCxTDR] = { 0x0c, 8 },
> + [SCxSR] = { 0x10, 16 },
> + [SCxRDR] = { 0x14, 8 },
> + [SCFCR] = { 0x18, 16 },
> + [SCFDR] = { 0x1c, 16 },
> + [SCSPTR] = { 0x20, 16 },
> + [SCLSR] = { 0x24, 16 },
> },
> .fifosize = 16,
> .overrun_reg = SCLSR,
> @@ -2837,7 +2837,7 @@ static int sci_init_single(struct platform_device
> *dev,
> {
> struct uart_port *port = &sci_port->port;
> const struct resource *res;
> - unsigned int i, regtype;
> + unsigned int i;
> int ret;
>
> sci_port->cfg = p;
> @@ -2874,7 +2874,6 @@ static int sci_init_single(struct platform_device
> *dev,
> if (unlikely(sci_port->params == NULL))
> return -EINVAL;
>
> - regtype = sci_port->params - sci_port_params;
> switch (p->type) {
> case PORT_SCIFB:
> sci_port->rx_trigger = 48;
> @@ -2929,10 +2928,6 @@ static int sci_init_single(struct platform_device
> *dev,
> port->regshift = 1;
> }
>
> - if (regtype == SCIx_SH4_SCIF_REGTYPE)
> - if (sci_port->reg_size >= 0x20)
> - port->regshift = 1;
> -
> /*
> * The UART port needs an IRQ value, so we peg this to the RX IRQ
> * for the multi-IRQ ports, which is where we are primarily
> --
> 2.17.1
Hi Greg,
On Thu, Aug 30, 2018 at 2:54 PM Geert Uytterhoeven
<[email protected]> wrote:
> Due to an unfortunate oversight, commit 2d4dd0da45401c7a ("serial: sh-sci:
> Allow for compressed SCIF address") broke earlycon on all Renesas ARM
> platforms using a SCIF port for the serial console (R-Car, RZ/A1, RZ/G1,
> RZ/G2 SoCs), due to an incorrect value of port->regshift.
>
> This patch series fixes that by reverting that commit, and a (reverse)
> dependency.
>
> Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
> separate patch.
>
> Thanks for applying!
>
> Geert Uytterhoeven (2):
> Revert "serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE"
> Revert "serial: sh-sci: Allow for compressed SCIF address"
>
> drivers/tty/serial/sh-sci.c | 56 +++++++++++++++++++++++++++----------
> include/linux/serial_sci.h | 1 +
> 2 files changed, 42 insertions(+), 15 deletions(-)
These are now in tty-next:
10c63443b74d1ef5 Revert "serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE"
a1c2fd7e1098ea49 Revert "serial: sh-sci: Allow for compressed SCIF address"
Can you please include them in v4.19-rc6, as they fix a regression introduced
in v4.19-rc1?
In addition:
3d8b43ad9c0cf023 serial: sh-sci: Add earlycon for R7S9210
(also in tty-next) enables earlycon on RZ/A2 again, as it was disabled
by the two
reverts above.
Thanks a lot!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Thu, Sep 27, 2018 at 09:38:19AM +0200, Geert Uytterhoeven wrote:
> Hi Greg,
>
> On Thu, Aug 30, 2018 at 2:54 PM Geert Uytterhoeven
> <[email protected]> wrote:
> > Due to an unfortunate oversight, commit 2d4dd0da45401c7a ("serial: sh-sci:
> > Allow for compressed SCIF address") broke earlycon on all Renesas ARM
> > platforms using a SCIF port for the serial console (R-Car, RZ/A1, RZ/G1,
> > RZ/G2 SoCs), due to an incorrect value of port->regshift.
> >
> > This patch series fixes that by reverting that commit, and a (reverse)
> > dependency.
> >
> > Earlycon for RZ/A2 (which is a new platform) will be fixed later in a
> > separate patch.
> >
> > Thanks for applying!
> >
> > Geert Uytterhoeven (2):
> > Revert "serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE"
> > Revert "serial: sh-sci: Allow for compressed SCIF address"
> >
> > drivers/tty/serial/sh-sci.c | 56 +++++++++++++++++++++++++++----------
> > include/linux/serial_sci.h | 1 +
> > 2 files changed, 42 insertions(+), 15 deletions(-)
>
> These are now in tty-next:
>
> 10c63443b74d1ef5 Revert "serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE"
> a1c2fd7e1098ea49 Revert "serial: sh-sci: Allow for compressed SCIF address"
>
> Can you please include them in v4.19-rc6, as they fix a regression introduced
> in v4.19-rc1?
>
> In addition:
>
> 3d8b43ad9c0cf023 serial: sh-sci: Add earlycon for R7S9210
>
> (also in tty-next) enables earlycon on RZ/A2 again, as it was disabled
> by the two
> reverts above.
>
> Thanks a lot!
Now fixed up, thanks.
greg k-h