As of yet, the Fast Ethernet Controller (FEC) driver only supports Clause 22
conform MDIO transactions. IEEE 802.3ae Clause 45 defines a modified MDIO
protocol that uses a two staged access model in order to increase the address
space.
This patch adds support for Clause 45 conform MDIO read and write operations to
the FEC driver.
Marco Hartmann (1):
fec: add C45 MDIO read/write support
drivers/net/ethernet/freescale/fec_main.c | 65 ++++++++++++++++++++++++++++---
1 file changed, 59 insertions(+), 6 deletions(-)
--
2.7.4
On Mon, Aug 19, 2019 at 05:11:14PM +0000, Marco Hartmann wrote:
> As of yet, the Fast Ethernet Controller (FEC) driver only supports Clause 22
> conform MDIO transactions. IEEE 802.3ae Clause 45 defines a modified MDIO
> protocol that uses a two staged access model in order to increase the address
> space.
>
> This patch adds support for Clause 45 conform MDIO read and write operations to
> the FEC driver.
Hi Marco
Do all versions of the FEC hardware support C45? Or do we need to make
use of the quirk support in this driver to just enable it for some
revisions of FEC?
Thanks
Andrew
From: Andrew Lunn <[email protected]>
> On Mon, Aug 19, 2019 at 05:11:14PM +0000, Marco Hartmann wrote:
> > As of yet, the Fast Ethernet Controller (FEC) driver only supports
> > Clause 22 conform MDIO transactions. IEEE 802.3ae Clause 45 defines a
> > modified MDIO protocol that uses a two staged access model in order to
> > increase the address space.
> >
> > This patch adds support for Clause 45 conform MDIO read and write
> > operations to the FEC driver.
>
> Hi Marco
>
> Do all versions of the FEC hardware support C45? Or do we need to make use
> of the quirk support in this driver to just enable it for some revisions of FEC?
>
> Thanks
> Andrew
i.MX legacy platforms like i.MX6/7 series, they doesn't support Write & Read Increment.
But for i.MX8MQ/MM series, it support C45 full features like Write & Read Increment.
For the patch itself, it doesn't support Write & Read Increment, so I think the patch doesn't
need to add quirk support.
Andy
On Tue, Aug 20, 2019 at 02:32:26AM +0000, Andy Duan wrote:
> From: Andrew Lunn <[email protected]>
> > On Mon, Aug 19, 2019 at 05:11:14PM +0000, Marco Hartmann wrote:
> > > As of yet, the Fast Ethernet Controller (FEC) driver only supports
> > > Clause 22 conform MDIO transactions. IEEE 802.3ae Clause 45 defines a
> > > modified MDIO protocol that uses a two staged access model in order to
> > > increase the address space.
> > >
> > > This patch adds support for Clause 45 conform MDIO read and write
> > > operations to the FEC driver.
> >
> > Hi Marco
> >
> > Do all versions of the FEC hardware support C45? Or do we need to make use
> > of the quirk support in this driver to just enable it for some revisions of FEC?
> >
> > Thanks
> > Andrew
>
> i.MX legacy platforms like i.MX6/7 series, they doesn't support Write & Read Increment.
> But for i.MX8MQ/MM series, it support C45 full features like Write & Read Increment.
>
> For the patch itself, it doesn't support Write & Read Increment, so I think the patch doesn't
> need to add quirk support.
Hi Andy
So what happens with something older than a i.MX8MQ/MM when a C45
transfer is attempted? This patch adds a new write. Does that write
immediately trigger a completion interrupt? Does it never trigger an
interrupt, and we have to wait FEC_MII_TIMEOUT?
Ideally, if the hardware does not support C45, we want it to return
EOPNOTSUPP.
Thanks
Andrew
From: Andrew Lunn <[email protected]> Sent: Tuesday, August 20, 2019 9:04 PM
> On Tue, Aug 20, 2019 at 02:32:26AM +0000, Andy Duan wrote:
> > From: Andrew Lunn <[email protected]>
> > > On Mon, Aug 19, 2019 at 05:11:14PM +0000, Marco Hartmann wrote:
> > > > As of yet, the Fast Ethernet Controller (FEC) driver only supports
> > > > Clause 22 conform MDIO transactions. IEEE 802.3ae Clause 45
> > > > defines a modified MDIO protocol that uses a two staged access
> > > > model in order to increase the address space.
> > > >
> > > > This patch adds support for Clause 45 conform MDIO read and write
> > > > operations to the FEC driver.
> > >
> > > Hi Marco
> > >
> > > Do all versions of the FEC hardware support C45? Or do we need to
> > > make use of the quirk support in this driver to just enable it for some
> revisions of FEC?
> > >
> > > Thanks
> > > Andrew
> >
> > i.MX legacy platforms like i.MX6/7 series, they doesn't support Write & Read
> Increment.
> > But for i.MX8MQ/MM series, it support C45 full features like Write & Read
> Increment.
> >
> > For the patch itself, it doesn't support Write & Read Increment, so I
> > think the patch doesn't need to add quirk support.
>
> Hi Andy
>
> So what happens with something older than a i.MX8MQ/MM when a C45
> transfer is attempted? This patch adds a new write. Does that write
> immediately trigger a completion interrupt? Does it never trigger an interrupt,
> and we have to wait FEC_MII_TIMEOUT?
>
> Ideally, if the hardware does not support C45, we want it to return
> EOPNOTSUPP.
>
> Thanks
> Andrew
It still trigger an interrupt to wakeup the completion, we have to wait FEC_MII_TIMEOUT.
Older chips just support part of C45 feature just like the patch implementation.