> -----Original Message-----
> From: Lucas Stach <[email protected]>
> Sent: Monday, March 22, 2021 8:15 PM
> To: Richard Zhu <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; dl-linux-imx <[email protected]>;
> [email protected]; [email protected];
> [email protected]
> Subject: [EXT] Re: Re: [PATCH 1/3] dt-bindings: imx6q-pcie: specify the
> imx8mq pcie phy voltage
> Hi Richard,
>
> Am Montag, dem 22.03.2021 um 09:06 +0000 schrieb Richard Zhu:
> > > -----Original Message-----
> > > From: Lucas Stach <[email protected]>
> > > Sent: Friday, March 19, 2021 5:49 PM
> > > To: Richard Zhu <[email protected]>; [email protected];
> > > [email protected]; [email protected]; [email protected];
> > > [email protected]; [email protected]
> > > Cc: [email protected]; dl-linux-imx <[email protected]>;
> > > [email protected]; [email protected];
> > > [email protected]
> > > Subject: Re: [PATCH 1/3] dt-bindings: imx6q-pcie: specify the
> > > imx8mq pcie phy voltage Am Freitag, dem 19.03.2021 um 16:24 +0800
> > > schrieb Richard Zhu:
> > > > Both 1.8v and 3.3v power supplies can be feeded to i.MX8MQ PCIe
> > > > PHY.
> > > > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to
> > > > data sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic
> > > > design, the VREG_BYPASS bits of GPR registers should be cleared
> > > > from default value 1b'1 to 1b'0.
> > > >
> > > > Signed-off-by: Richard Zhu <[email protected]>
> > > > ---
> > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4
> > > > ++++
> > > > 1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-
> > > > pcie.txt
> > > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > > > index de4b2baf91e8..23efbad9e804 100644
> > > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
> > > > @@ -59,6 +59,10 @@ Additional required properties for imx7d-pcie
> > > > and
> > > imx8mq-pcie:
> > > > Additional required properties for imx8mq-pcie:
> > > > - clock-names: Must include the following additional entries:
> > > > - "pcie_aux"
> > > > +- pcie-vph-3v3: If present then PCIE_VPH is feeded by 3.3v in
> > > > the HW
> > > > + schematic design. The PCIE_VPH is suggested to be 1.8v refer
> > > > to the
> > > > + data sheet. If the PCIE_VPH is supplied by 3.3V, the
> > > > VREG_BYPASS
> > > > + should be cleared to zero accordingly.
> > >
> > > Uhm, no. Please don't add boolean DT properties for random parts of
> > > the board design.
> > >
> > > If we need to know the voltage of PCIE_VPH, we should really add the
> > > VPH regulator as a supply to the PCIe controller node, then work out
> > > the voltage the usual way by using the Linux regulator API.
> > >
> > [Richard Zhu] Hi Lucas:
> > Thanks for your comments. Since the vgen5_reg is used to power up PCIe
> > PHY on i.MX8MQ EVK board, and it's set to be "regulator-always-on;".
> > Did only the regulator_get_voltage or combined with
> > regulator_enable/regulator_disable can be used in the driver?
>
> The regulator API doesn't care, you can call enable/disable in the driver as
> normal. If the regulator is marked as always-on it will just stay enabled even if
> the use-count drops to 0.
>
> The other question however is if it's even allowed by the SoC design to disable
> this supply outside of deep power down. A quick look into the reference
> manual and datasheet didn't yield any information about this.
[Richard Zhu] Hi Lucas: Yes it is. The PCIe PHY power down manipulations are not
described in the RM document.
How about to get voltage here only currently, and the regulator enable/disable operations
would be added further if these enable/disable operations are possible and required later?
Best Regards
Richard
>
> Regards,
> Lucas