Introduce bindings description for the V3s PWM, which is
register-compatible with the A20 PWM.
Signed-off-by: Paul Kocialkowski <[email protected]>
---
.../devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
index 7dcab2bf8128..04ff708fdc86 100644
--- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
@@ -24,6 +24,9 @@ properties:
- items:
- const: allwinner,sun8i-a83t-pwm
- const: allwinner,sun8i-h3-pwm
+ - items:
+ - const: allwinner,sun8i-v3s-pwm
+ - const: allwinner,sun7i-a20-pwm
- items:
- const: allwinner,sun50i-a64-pwm
- const: allwinner,sun5i-a13-pwm
--
2.29.2
This introduces definitions for the PWM controller found in the V3s,
as well as associated pins. This fashion of the controller has two PWM
outputs and is register-compatible with the A20.
Both PWM outputs were tested on a Lichee Pi Zero with a simple
transistor-LED setup.
Signed-off-by: Paul Kocialkowski <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index bff822b9fa01..f02aa988156d 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -404,6 +404,16 @@ spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};
+
+ pwm0_pin: pwm0-pin {
+ pins = "PB4";
+ function = "pwm0";
+ };
+
+ pwm1_pin: pwm1-pin {
+ pins = "PB5";
+ function = "pwm1";
+ };
};
timer@1c20c00 {
@@ -422,6 +432,15 @@ wdt0: watchdog@1c20ca0 {
clocks = <&osc24M>;
};
+ pwm: pwm@1c21400 {
+ compatible = "allwinner,sun8i-v3s-pwm",
+ "allwinner,sun7i-a20-pwm";
+ reg = <0x01c21400 0xc>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x400>;
--
2.29.2
Hi!
Dne petek, 18. december 2020 ob 21:54:35 CET je Paul Kocialkowski napisal(a):
> Introduce bindings description for the V3s PWM, which is
> register-compatible with the A20 PWM.
>
> Signed-off-by: Paul Kocialkowski <[email protected]>
This is meant to be used together with V3s PWM patch you recently send? Can
you please resend them together, with fixed compatible in DT node? Currently
it's not clear why this patch is needed and PWM patch will need fix anyway.
Best regards,
Jernej
> ---
> .../devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git
> a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml index
> 7dcab2bf8128..04ff708fdc86 100644
> --- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> @@ -24,6 +24,9 @@ properties:
> - items:
> - const: allwinner,sun8i-a83t-pwm
> - const: allwinner,sun8i-h3-pwm
> + - items:
> + - const: allwinner,sun8i-v3s-pwm
> + - const: allwinner,sun7i-a20-pwm
> - items:
> - const: allwinner,sun50i-a64-pwm
> - const: allwinner,sun5i-a13-pwm
Hi,
Le Tue 22 Dec 20, 09:21, Jernej Škrabec a écrit :
> Dne petek, 18. december 2020 ob 21:54:35 CET je Paul Kocialkowski napisal(a):
> > Introduce bindings description for the V3s PWM, which is
> > register-compatible with the A20 PWM.
> >
> > Signed-off-by: Paul Kocialkowski <[email protected]>
>
> This is meant to be used together with V3s PWM patch you recently send? Can
> you please resend them together, with fixed compatible in DT node? Currently
> it's not clear why this patch is needed and PWM patch will need fix anyway.
I've sent them together (this one is v2 1/2 and 2/2 is the PWM dt patch).
You can grab it at: https://lore.kernel.org/patchwork/patch/1355289/
if it didn't reach your emails.
Cheers,
Paul
> > ---
> > .../devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> > b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml index
> > 7dcab2bf8128..04ff708fdc86 100644
> > --- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> > +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
> > @@ -24,6 +24,9 @@ properties:
> > - items:
> > - const: allwinner,sun8i-a83t-pwm
> > - const: allwinner,sun8i-h3-pwm
> > + - items:
> > + - const: allwinner,sun8i-v3s-pwm
> > + - const: allwinner,sun7i-a20-pwm
> > - items:
> > - const: allwinner,sun50i-a64-pwm
> > - const: allwinner,sun5i-a13-pwm
>
>
>
>
--
Developer of free digital technology and hardware support.
Website: https://www.paulk.fr/
Coding blog: https://code.paulk.fr/
Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/
On Fri, 18 Dec 2020 21:54:35 +0100, Paul Kocialkowski wrote:
> Introduce bindings description for the V3s PWM, which is
> register-compatible with the A20 PWM.
>
> Signed-off-by: Paul Kocialkowski <[email protected]>
> ---
> .../devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <[email protected]>