LinuxLists.cc - [PATCH 0/2] riscv: Fix alternatives issues on for-next

2023-02-12 02:15:44

Subject: [PATCH 0/2] riscv: Fix alternatives issues on for-next

Several people have reported that D1 fails to boot on linux-next.
Patch 1 fixes a bug where early alternative patching used the wrong
address. Patch 2 fixes a separate issue where the Zbb alternatives
are incorrectly applied based on the 'C' extension instead of Zbb.

Samuel Holland (2):
riscv: Fix early alternative patching
riscv: Fix Zbb alternative IDs

arch/riscv/errata/thead/errata.c | 4 +---
arch/riscv/include/asm/errata_list.h | 5 -----
arch/riscv/lib/strcmp.S | 2 +-
arch/riscv/lib/strlen.S | 2 +-
arch/riscv/lib/strncmp.S | 2 +-
5 files changed, 4 insertions(+), 11 deletions(-)

--
2.37.4

2023-02-12 02:15:44

by Samuel Holland

[permalink] [raw]

Subject: [PATCH 1/2] riscv: Fix early alternative patching

Now that the text to patch is located using a relative offset from the
alternative entry, the text address should be computed without applying
the kernel mapping offset, both before and after VM setup.

Fixes: 8d23e94a4433 ("riscv: switch to relative alternative entries")
Signed-off-by: Samuel Holland <[email protected]>
---

arch/riscv/errata/thead/errata.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index c0bea5c94128..1dd90a5f86f0 100644
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -102,9 +102,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al

/* On vm-alternatives, the mmu isn't running yet */
if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
- memcpy((void *)__pa_symbol(oldptr),
- (void *)__pa_symbol(altptr),
- alt->alt_len);
+ memcpy(oldptr, altptr, alt->alt_len);
else
patch_text_nosync(oldptr, altptr, alt->alt_len);
}
--
2.37.4

2023-02-12 02:15:44

by Samuel Holland

[permalink] [raw]

Subject: [PATCH 2/2] riscv: Fix Zbb alternative IDs

Commit 4bf8860760d9 ("riscv: cpufeature: extend
riscv_cpufeature_patch_func to all ISA extensions") switched ISA
extension alternatives to use the RISCV_ISA_EXT_* macros instead of
CPUFEATURE_*. This was mismerged when applied on top of the Zbb series,
so the Zbb alternatives referenced the wrong errata ID values.

Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"")
Signed-off-by: Samuel Holland <[email protected]>
---

arch/riscv/include/asm/errata_list.h | 5 -----
arch/riscv/lib/strcmp.S | 2 +-
arch/riscv/lib/strlen.S | 2 +-
arch/riscv/lib/strncmp.S | 2 +-
4 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index e158439029ce..274c6f889602 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -23,11 +23,6 @@
#define ERRATA_THEAD_NUMBER 3
#endif

-#define CPUFEATURE_SVPBMT 0
-#define CPUFEATURE_ZICBOM 1
-#define CPUFEATURE_ZBB 2
-#define CPUFEATURE_NUMBER 3
-
#ifdef __ASSEMBLY__

#define ALT_INSN_FAULT(x) \
diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S
index 8148b6418f61..986ab23fe787 100644
--- a/arch/riscv/lib/strcmp.S
+++ b/arch/riscv/lib/strcmp.S
@@ -9,7 +9,7 @@
/* int strcmp(const char *cs, const char *ct) */
SYM_FUNC_START(strcmp)

- ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
+ ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)

/*
* Returns
diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S
index 0f9dbf93301a..8345ceeee3f6 100644
--- a/arch/riscv/lib/strlen.S
+++ b/arch/riscv/lib/strlen.S
@@ -9,7 +9,7 @@
/* int strlen(const char *s) */
SYM_FUNC_START(strlen)

- ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
+ ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)

/*
* Returns
diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S
index 7940ddab2d48..ee49595075be 100644
--- a/arch/riscv/lib/strncmp.S
+++ b/arch/riscv/lib/strncmp.S
@@ -9,7 +9,7 @@
/* int strncmp(const char *cs, const char *ct, size_t count) */
SYM_FUNC_START(strncmp)

- ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
+ ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)

/*
* Returns
--
2.37.4

2023-02-12 15:09:13

by Conor Dooley

[permalink] [raw]

Subject: Re: [PATCH 0/2] riscv: Fix alternatives issues on for-next

Hey Samuel,

On Sat, Feb 11, 2023 at 08:15:31PM -0600, Samuel Holland wrote:
> Several people have reported that D1 fails to boot on linux-next.
> Patch 1 fixes a bug where early alternative patching used the wrong
> address. Patch 2 fixes a separate issue where the Zbb alternatives
> are incorrectly applied based on the 'C' extension instead of Zbb.

On Icicle, Nezha & VisionFive 2:
Tested-by: Conor Dooley <[email protected]>

I was really curious why my CI didn't catch this, but I think boot
on Icicle wasn't broken as the toolchains pre-date Zbb and therefore it
isn't even compiled in.
And the VisionFive 2 doesn't care as it has Zbb.

Thanks for the fixes :)
Conor.

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2023-02-12 15:20:47

by Conor Dooley

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Subject: Re: [PATCH 2/2] riscv: Fix Zbb alternative IDs

On Sat, Feb 11, 2023 at 08:15:33PM -0600, Samuel Holland wrote:
> Commit 4bf8860760d9 ("riscv: cpufeature: extend
> riscv_cpufeature_patch_func to all ISA extensions") switched ISA
> extension alternatives to use the RISCV_ISA_EXT_* macros instead of
> CPUFEATURE_*. This was mismerged when applied on top of the Zbb series,
> so the Zbb alternatives referenced the wrong errata ID values.
>
> Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"")

Re: your question on irc, I think you did the right thing here as
Jisheng did remove them in his series:
https://lore.kernel.org/linux-riscv/[email protected]/
Reviewed-by: Conor Dooley <[email protected]>

> Signed-off-by: Samuel Holland <[email protected]>
> ---
>
> arch/riscv/include/asm/errata_list.h | 5 -----
> arch/riscv/lib/strcmp.S | 2 +-
> arch/riscv/lib/strlen.S | 2 +-
> arch/riscv/lib/strncmp.S | 2 +-
> 4 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index e158439029ce..274c6f889602 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -23,11 +23,6 @@
> #define ERRATA_THEAD_NUMBER 3
> #endif
>
> -#define CPUFEATURE_SVPBMT 0
> -#define CPUFEATURE_ZICBOM 1
> -#define CPUFEATURE_ZBB 2
> -#define CPUFEATURE_NUMBER 3
> -
> #ifdef __ASSEMBLY__
>
> #define ALT_INSN_FAULT(x) \
> diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S
> index 8148b6418f61..986ab23fe787 100644
> --- a/arch/riscv/lib/strcmp.S
> +++ b/arch/riscv/lib/strcmp.S
> @@ -9,7 +9,7 @@
> /* int strcmp(const char *cs, const char *ct) */
> SYM_FUNC_START(strcmp)
>
> - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S
> index 0f9dbf93301a..8345ceeee3f6 100644
> --- a/arch/riscv/lib/strlen.S
> +++ b/arch/riscv/lib/strlen.S
> @@ -9,7 +9,7 @@
> /* int strlen(const char *s) */
> SYM_FUNC_START(strlen)
>
> - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S
> index 7940ddab2d48..ee49595075be 100644
> --- a/arch/riscv/lib/strncmp.S
> +++ b/arch/riscv/lib/strncmp.S
> @@ -9,7 +9,7 @@
> /* int strncmp(const char *cs, const char *ct, size_t count) */
> SYM_FUNC_START(strncmp)
>
> - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> --
> 2.37.4
>

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2023-02-12 15:48:34

by Conor Dooley

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Subject: Re: [PATCH 1/2] riscv: Fix early alternative patching

On Sat, Feb 11, 2023 at 08:15:32PM -0600, Samuel Holland wrote:
> Now that the text to patch is located using a relative offset from the
> alternative entry, the text address should be computed without applying
> the kernel mapping offset, both before and after VM setup.
>
> Fixes: 8d23e94a4433 ("riscv: switch to relative alternative entries")

Reviewed-by: Conor Dooley <[email protected]>

> Signed-off-by: Samuel Holland <[email protected]>
> ---
>
> arch/riscv/errata/thead/errata.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> index c0bea5c94128..1dd90a5f86f0 100644
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -102,9 +102,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al
>
> /* On vm-alternatives, the mmu isn't running yet */
> if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> - memcpy((void *)__pa_symbol(oldptr),
> - (void *)__pa_symbol(altptr),
> - alt->alt_len);
> + memcpy(oldptr, altptr, alt->alt_len);
> else
> patch_text_nosync(oldptr, altptr, alt->alt_len);
> }
> --
> 2.37.4
>

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2023-02-12 16:32:25

by Andrew Jones

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Subject: Re: [PATCH 2/2] riscv: Fix Zbb alternative IDs

2023-02-13 01:20:20

by Guo Ren

[permalink] [raw]

Subject: Re: [PATCH 2/2] riscv: Fix Zbb alternative IDs

Reviewed-by: Guo Ren <[email protected]>

On Sun, Feb 12, 2023 at 10:15 AM Samuel Holland <[email protected]> wrote:
>
> Commit 4bf8860760d9 ("riscv: cpufeature: extend
> riscv_cpufeature_patch_func to all ISA extensions") switched ISA
> extension alternatives to use the RISCV_ISA_EXT_* macros instead of
> CPUFEATURE_*. This was mismerged when applied on top of the Zbb series,
> so the Zbb alternatives referenced the wrong errata ID values.
>
> Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"")
> Signed-off-by: Samuel Holland <[email protected]>
> ---
>
> arch/riscv/include/asm/errata_list.h | 5 -----
> arch/riscv/lib/strcmp.S | 2 +-
> arch/riscv/lib/strlen.S | 2 +-
> arch/riscv/lib/strncmp.S | 2 +-
> 4 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index e158439029ce..274c6f889602 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -23,11 +23,6 @@
> #define ERRATA_THEAD_NUMBER 3
> #endif
>
> -#define CPUFEATURE_SVPBMT 0
> -#define CPUFEATURE_ZICBOM 1
> -#define CPUFEATURE_ZBB 2
> -#define CPUFEATURE_NUMBER 3
> -
> #ifdef __ASSEMBLY__
>
> #define ALT_INSN_FAULT(x) \
> diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S
> index 8148b6418f61..986ab23fe787 100644
> --- a/arch/riscv/lib/strcmp.S
> +++ b/arch/riscv/lib/strcmp.S
> @@ -9,7 +9,7 @@
> /* int strcmp(const char *cs, const char *ct) */
> SYM_FUNC_START(strcmp)
>
> - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S
> index 0f9dbf93301a..8345ceeee3f6 100644
> --- a/arch/riscv/lib/strlen.S
> +++ b/arch/riscv/lib/strlen.S
> @@ -9,7 +9,7 @@
> /* int strlen(const char *s) */
> SYM_FUNC_START(strlen)
>
> - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S
> index 7940ddab2d48..ee49595075be 100644
> --- a/arch/riscv/lib/strncmp.S
> +++ b/arch/riscv/lib/strncmp.S
> @@ -9,7 +9,7 @@
> /* int strncmp(const char *cs, const char *ct, size_t count) */
> SYM_FUNC_START(strncmp)
>
> - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB)
> + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
>
> /*
> * Returns
> --
> 2.37.4
>

--
Best Regards
Guo Ren

2023-02-13 01:22:21

by Guo Ren

[permalink] [raw]

Subject: Re: [PATCH 1/2] riscv: Fix early alternative patching

On Sun, Feb 12, 2023 at 10:15 AM Samuel Holland <[email protected]> wrote:
>
> Now that the text to patch is located using a relative offset from the
> alternative entry, the text address should be computed without applying
> the kernel mapping offset, both before and after VM setup.
>
> Fixes: 8d23e94a4433 ("riscv: switch to relative alternative entries")
> Signed-off-by: Samuel Holland <[email protected]>
> ---
>
> arch/riscv/errata/thead/errata.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> index c0bea5c94128..1dd90a5f86f0 100644
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -102,9 +102,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al
>
> /* On vm-alternatives, the mmu isn't running yet */
> if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> - memcpy((void *)__pa_symbol(oldptr),
> - (void *)__pa_symbol(altptr),
> - alt->alt_len);
> + memcpy(oldptr, altptr, alt->alt_len);
> else
> patch_text_nosync(oldptr, altptr, alt->alt_len);
> }
> --
> 2.37.4
>
Reviewed-by: Guo Ren <[email protected]>

--
Best Regards
Guo Ren

2023-02-13 01:24:03

by Guo Ren

[permalink] [raw]

Subject: Re: [PATCH 0/2] riscv: Fix alternatives issues on for-next

On Sun, Feb 12, 2023 at 10:15 AM Samuel Holland <[email protected]> wrote:
>
> Several people have reported that D1 fails to boot on linux-next.
> Patch 1 fixes a bug where early alternative patching used the wrong
> address. Patch 2 fixes a separate issue where the Zbb alternatives
> are incorrectly applied based on the 'C' extension instead of Zbb.
Great Job! Thx for fixup.

>
>
> Samuel Holland (2):
> riscv: Fix early alternative patching
> riscv: Fix Zbb alternative IDs
>
> arch/riscv/errata/thead/errata.c | 4 +---
> arch/riscv/include/asm/errata_list.h | 5 -----
> arch/riscv/lib/strcmp.S | 2 +-
> arch/riscv/lib/strlen.S | 2 +-
> arch/riscv/lib/strncmp.S | 2 +-
> 5 files changed, 4 insertions(+), 11 deletions(-)
>
> --
> 2.37.4
>

--
Best Regards
Guo Ren

2023-02-13 16:57:33

by Jisheng Zhang

[permalink] [raw]

Subject: Re: [PATCH 1/2] riscv: Fix early alternative patching

On Sat, Feb 11, 2023 at 08:15:32PM -0600, Samuel Holland wrote:
> Now that the text to patch is located using a relative offset from the
> alternative entry, the text address should be computed without applying
> the kernel mapping offset, both before and after VM setup.

Good catch!
>
> Fixes: 8d23e94a4433 ("riscv: switch to relative alternative entries")
> Signed-off-by: Samuel Holland <[email protected]>

Reviewed-by: Jisheng Zhang <[email protected]>
> ---
>
> arch/riscv/errata/thead/errata.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> index c0bea5c94128..1dd90a5f86f0 100644
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -102,9 +102,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al
>
> /* On vm-alternatives, the mmu isn't running yet */
> if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> - memcpy((void *)__pa_symbol(oldptr),
> - (void *)__pa_symbol(altptr),
> - alt->alt_len);
> + memcpy(oldptr, altptr, alt->alt_len);
> else
> patch_text_nosync(oldptr, altptr, alt->alt_len);
> }
> --
> 2.37.4
>

2023-02-15 14:57:49

by Palmer Dabbelt

[permalink] [raw]

Subject: Re: [PATCH 0/2] riscv: Fix alternatives issues on for-next

On Sat, 11 Feb 2023 20:15:31 -0600, Samuel Holland wrote:
> Several people have reported that D1 fails to boot on linux-next.
> Patch 1 fixes a bug where early alternative patching used the wrong
> address. Patch 2 fixes a separate issue where the Zbb alternatives
> are incorrectly applied based on the 'C' extension instead of Zbb.
>
>
> Samuel Holland (2):
> riscv: Fix early alternative patching
> riscv: Fix Zbb alternative IDs
>
> [...]

Applied, thanks!

[1/2] riscv: Fix early alternative patching
https://git.kernel.org/palmer/c/bfd6fc5d8014
[2/2] riscv: Fix Zbb alternative IDs
https://git.kernel.org/palmer/c/d5a7fab7859d

Best regards,
--
Palmer Dabbelt <[email protected]>

2023-02-15 15:00:33

by patchwork-bot+linux-riscv

[permalink] [raw]

Subject: Re: [PATCH 0/2] riscv: Fix alternatives issues on for-next

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <[email protected]>:

On Sat, 11 Feb 2023 20:15:31 -0600 you wrote:
> Several people have reported that D1 fails to boot on linux-next.
> Patch 1 fixes a bug where early alternative patching used the wrong
> address. Patch 2 fixes a separate issue where the Zbb alternatives
> are incorrectly applied based on the 'C' extension instead of Zbb.
>
>
> Samuel Holland (2):
> riscv: Fix early alternative patching
> riscv: Fix Zbb alternative IDs
>
> [...]

Here is the summary with links:
- [1/2] riscv: Fix early alternative patching
https://git.kernel.org/riscv/c/bfd6fc5d8014
- [2/2] riscv: Fix Zbb alternative IDs
https://git.kernel.org/riscv/c/d5a7fab7859d

You are awesome, thank you!
--
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