Fix IMXRT1050_CLK_LCDIF_APB offsets.
Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock driver")
Cc: Jesse Taube <[email protected]>
Signed-off-by: Giulio Benetti <[email protected]>
---
V1->V2:
* nothing done
V2->V3:
* added commit log and not only subject as suggested by Jesse Taube
V3->V4:
* added Fixes: as suggested by Fabio Estevam
---
drivers/clk/imx/clk-imxrt1050.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 9539d35588ee..26108e9f7e67 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -140,7 +140,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
- hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
+ hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
imx_check_clk_hws(hws, IMXRT1050_CLK_END);
--
2.34.1
Prepend a 0 in the memory address to make it clear it's 32MB
Cc: Jesse Taube <[email protected]>
Signed-off-by: Giulio Benetti <[email protected]>
Acked-by: Jesse Taube <[email protected]>
---
V1->V2:
* nothing done
V2->V3:
* added commit log and not only subject as suggested by Jesse Taube
* added Jesse Taube's Acked-by:
V3->V4:
* nothing done
---
arch/arm/boot/dts/imxrt1050-evk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imxrt1050-evk.dts b/arch/arm/boot/dts/imxrt1050-evk.dts
index 1d339f48899f..3de392d014fe 100644
--- a/arch/arm/boot/dts/imxrt1050-evk.dts
+++ b/arch/arm/boot/dts/imxrt1050-evk.dts
@@ -28,7 +28,7 @@ aliases {
memory@80000000 {
device_type = "memory";
- reg = <0x80000000 0x2000000>;
+ reg = <0x80000000 0x02000000>;
};
panel {
--
2.34.1
Add IMXRT1050_CLK_LCDIF_PIX clock gate.
Cc: Jesse Taube <[email protected]>
Signed-off-by: Giulio Benetti <[email protected]>
Acked-by: Jesse Taube <[email protected]>
---
V1->V2:
* nothing done
V2->V3:
* added commit log and not only subject as suggested by Jesse Taube
* added Jesse Taube's Acked-by:
V3->V4:
* nothing done
---
drivers/clk/imx/clk-imxrt1050.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 26108e9f7e67..39f77c03b892 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -141,6 +141,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
+ hws[IMXRT1050_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif", ccm_base + 0x74, 10);
hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
imx_check_clk_hws(hws, IMXRT1050_CLK_END);
--
2.34.1
According to i.MXRT1050 Datasheet usdhc supports up to 200Mhz clock so
let's increase max-frequency property to 200Mhz.
Cc: Jesse Taube <[email protected]>
Signed-off-by: Giulio Benetti <[email protected]>
Acked-by: Jesse Taube <[email protected]>
---
V1->V2:
* set max-frequency to 200Mhz instead of removing it as suggested by
Bough Chen
V2->V3:
* added Jesse Taube's Acked-by:
V3->V4:
* nothing done
---
arch/arm/boot/dts/imxrt1050.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imxrt1050.dtsi b/arch/arm/boot/dts/imxrt1050.dtsi
index 114465e4dde6..5b1991c32748 100644
--- a/arch/arm/boot/dts/imxrt1050.dtsi
+++ b/arch/arm/boot/dts/imxrt1050.dtsi
@@ -93,7 +93,7 @@ usdhc1: mmc@402c0000 {
bus-width = <4>;
fsl,wp-controller;
no-1-8-v;
- max-frequency = <4000000>;
+ max-frequency = <200000000>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step = <2>;
status = "disabled";
--
2.34.1
On 22-11-17 19:10:11, Giulio Benetti wrote:
> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>
> Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock driver")
> Cc: Jesse Taube <[email protected]>
> Signed-off-by: Giulio Benetti <[email protected]>
You dropped the patch version from the subject line.
Other than that:
Reviewed-by: Abel Vesa <[email protected]>
> ---
> V1->V2:
> * nothing done
> V2->V3:
> * added commit log and not only subject as suggested by Jesse Taube
> V3->V4:
> * added Fixes: as suggested by Fabio Estevam
> ---
> drivers/clk/imx/clk-imxrt1050.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
> index 9539d35588ee..26108e9f7e67 100644
> --- a/drivers/clk/imx/clk-imxrt1050.c
> +++ b/drivers/clk/imx/clk-imxrt1050.c
> @@ -140,7 +140,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
> hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
> hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
> hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
> - hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
> + hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
> hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
> hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
> imx_check_clk_hws(hws, IMXRT1050_CLK_END);
> --
> 2.34.1
>
On 22-11-21 21:30:06, Giulio Benetti wrote:
> ....
Please, no HTML formatting. Plain text email only.
So I guess I'll just apply this version then.
Thanks,
Abel
On 21/11/22 22:30, Abel Vesa wrote:
> On 22-11-21 21:30:06, Giulio Benetti wrote:
>> ....
>
> Please, no HTML formatting. Plain text email only.
Oh, I was on my mobile, sorry!
--
Giulio Benetti
CEO/CTO@Benetti Engineering sas
> So I guess I'll just apply this version then.
>
> Thanks,
> Abel
On 21/11/22 23:10, Abel Vesa wrote:
> On 22-11-17 19:10:11, Giulio Benetti wrote:
>> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>>
>> Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock driver")
>> Cc: Jesse Taube <[email protected]>
>> Signed-off-by: Giulio Benetti <[email protected]>
>
> Applied patches #1 and #2. Thanks.
>
> As a suggestion, next time, please send two separate patchsets,
> since there are two different subsystems involved (and the patches #3
> and #4 are not related to #1 and #2).
Ok, thank you for pointing. Next time I will do like that.
--
Giulio Benetti
CEO/CTO@Benetti Engineering sas
>> ---
>> V1->V2:
>> * nothing done
>> V2->V3:
>> * added commit log and not only subject as suggested by Jesse Taube
>> V3->V4:
>> * added Fixes: as suggested by Fabio Estevam
>> ---
>> drivers/clk/imx/clk-imxrt1050.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
>> index 9539d35588ee..26108e9f7e67 100644
>> --- a/drivers/clk/imx/clk-imxrt1050.c
>> +++ b/drivers/clk/imx/clk-imxrt1050.c
>> @@ -140,7 +140,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
>> hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
>> hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
>> hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
>> - hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
>> + hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
>> hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
>> hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
>> imx_check_clk_hws(hws, IMXRT1050_CLK_END);
>> --
>> 2.34.1
>>
On 22-11-17 19:10:11, Giulio Benetti wrote:
> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>
> Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock driver")
> Cc: Jesse Taube <[email protected]>
> Signed-off-by: Giulio Benetti <[email protected]>
Applied patches #1 and #2. Thanks.
As a suggestion, next time, please send two separate patchsets,
since there are two different subsystems involved (and the patches #3
and #4 are not related to #1 and #2).
> ---
> V1->V2:
> * nothing done
> V2->V3:
> * added commit log and not only subject as suggested by Jesse Taube
> V3->V4:
> * added Fixes: as suggested by Fabio Estevam
> ---
> drivers/clk/imx/clk-imxrt1050.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
> index 9539d35588ee..26108e9f7e67 100644
> --- a/drivers/clk/imx/clk-imxrt1050.c
> +++ b/drivers/clk/imx/clk-imxrt1050.c
> @@ -140,7 +140,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
> hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
> hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
> hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
> - hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
> + hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
> hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
> hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
> imx_check_clk_hws(hws, IMXRT1050_CLK_END);
> --
> 2.34.1
>