2022-12-19 17:41:34

by Hanna Hawa

[permalink] [raw]
Subject: [PATCH v3 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

From: Lareine Khawaly <[email protected]>

In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
by depending on the values of the given parameters including the ic_clk.
For example in our use case where ic_clk is larger than one million,
multiplication of ic_clk * 4700 will result in 32 bit overflow.

Add cast of u64 to the calculation to avoid multiplication overflow, and
use the corresponding define for divide.

Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts")
Signed-off-by: Lareine Khawaly <[email protected]>
Signed-off-by: Hanna Hawa <[email protected]>

Change Log v2->v3:
- Avoid changing the ic_clk parameter to u64, and do casting in the
calculation itself instead.
- use DIV_ROUND_CLOSEST_ULL instead of DIV_ROUND_CLOSEST

Change Log v1->v2:
- Update commit message and add fix tag.
---
drivers/i2c/busses/i2c-designware-common.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
index e0a46dfd1c15..9cc02d0142df 100644
--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -351,7 +351,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
*
* If your hardware is free from tHD;STA issue, try this one.
*/
- return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL,
+ MICRO) - 8 + offset;
else
/*
* Conditional expression:
@@ -367,7 +368,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
* The reason why we need to take into account "tf" here,
* is the same as described in i2c_dw_scl_lcnt().
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
+ MICRO) - 3 + offset;
}

u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
@@ -383,7 +385,8 @@ u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
* account the fall time of SCL signal (tf). Default tf value
* should be 0.3 us, for safety.
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf),
+ MICRO) - 1 + offset;
}

int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev)
--
2.38.1


2022-12-20 11:03:46

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v3 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Mon, Dec 19, 2022 at 05:17:13PM +0000, Hanna Hawa wrote:
> From: Lareine Khawaly <[email protected]>

Thank you for an update, my comments below.

> In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
> by depending on the values of the given parameters including the ic_clk.
> For example in our use case where ic_clk is larger than one million,
> multiplication of ic_clk * 4700 will result in 32 bit overflow.
>
> Add cast of u64 to the calculation to avoid multiplication overflow, and
> use the corresponding define for divide.
>
> Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts")

It's not clear if the second patch you sent (about unsigned long --> u32) is
required or not, can you clarify this in the changelog?

> Signed-off-by: Lareine Khawaly <[email protected]>
> Signed-off-by: Hanna Hawa <[email protected]>

This should be last part of the message body. The cutter '---' line makes it
so, currently you finish your message with a changelog and not tags. So, you
need to move the changelog after the cutter line.

> Change Log v2->v3:
> - Avoid changing the ic_clk parameter to u64, and do casting in the
> calculation itself instead.
> - use DIV_ROUND_CLOSEST_ULL instead of DIV_ROUND_CLOSEST
>
> Change Log v1->v2:
> - Update commit message and add fix tag.
> ---
> drivers/i2c/busses/i2c-designware-common.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
> index e0a46dfd1c15..9cc02d0142df 100644
> --- a/drivers/i2c/busses/i2c-designware-common.c
> +++ b/drivers/i2c/busses/i2c-designware-common.c
> @@ -351,7 +351,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
> *
> * If your hardware is free from tHD;STA issue, try this one.
> */
> - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL,
> + MICRO) - 8 + offset;

There is still a room for 'MICRO) -' part on the previous line.
Ditto for the similar cases.

--
With Best Regards,
Andy Shevchenko


2022-12-20 17:11:24

by Hanna Hawa

[permalink] [raw]
Subject: Re: [PATCH v3 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow



On 12/20/2022 12:47 PM, Andy Shevchenko wrote:
>> Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts")
> It's not clear if the second patch you sent (about unsigned long --> u32) is
> required or not, can you clarify this in the changelog?
>

Sure will add to the changelog, it's not required to have the second
change to avoid the overflow.

>> Signed-off-by: Lareine Khawaly<[email protected]>
>> Signed-off-by: Hanna Hawa<[email protected]>
> This should be last part of the message body. The cutter '---' line makes it
> so, currently you finish your message with a changelog and not tags. So, you
> need to move the changelog after the cutter line.

Thanks for the info. will update.

>
>> Change Log v2->v3:
.
.
>> - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
>> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL,
>> + MICRO) - 8 + offset;
> There is still a room for 'MICRO) -' part on the previous line.
> Ditto for the similar cases.

Ack will be fixed