2022-12-20 16:58:50

by Hanna Hawa

[permalink] [raw]
Subject: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

From: Lareine Khawaly <[email protected]>

In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
by depending on the values of the given parameters including the ic_clk.
For example in our use case where ic_clk is larger than one million,
multiplication of ic_clk * 4700 will result in 32 bit overflow.

Add cast of u64 to the calculation to avoid multiplication overflow, and
use the corresponding define for divide.

Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts")
Signed-off-by: Lareine Khawaly <[email protected]>
Signed-off-by: Hanna Hawa <[email protected]>

---
Change Log v3->v4:
- update line length when possible
- fix change log location in the patch

Change Log v2->v3:
- Avoid changing the ic_clk parameter to u64, and do casting in the
calculation itself instead.
- i2c_dw_clk_rate() returns unsigned long which is confusing because the
function return the value of get_clk_rate_khz() which returns u32.
This is not effect the overflow issue, pushed change in separated
patch.
- use DIV_ROUND_CLOSEST_ULL instead of DIV_ROUND_CLOSEST

Change Log v1->v2:
- Update commit message and add fix tag.

drivers/i2c/busses/i2c-designware-common.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c
index e0a46dfd1c15..2a669da08762 100644
--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -351,7 +351,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
*
* If your hardware is free from tHD;STA issue, try this one.
*/
- return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
+ offset;
else
/*
* Conditional expression:
@@ -367,7 +368,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
* The reason why we need to take into account "tf" here,
* is the same as described in i2c_dw_scl_lcnt().
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
+ MICRO) - 3 + offset;
}

u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
@@ -383,7 +385,8 @@ u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
* account the fall time of SCL signal (tf). Default tf value
* should be 0.3 us, for safety.
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
+ offset;
}

int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev)
--
2.38.1


2022-12-20 17:37:19

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Tue, Dec 20, 2022 at 04:48:06PM +0000, Hanna Hawa wrote:
> From: Lareine Khawaly <[email protected]>
>
> In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
> by depending on the values of the given parameters including the ic_clk.
> For example in our use case where ic_clk is larger than one million,
> multiplication of ic_clk * 4700 will result in 32 bit overflow.
>
> Add cast of u64 to the calculation to avoid multiplication overflow, and
> use the corresponding define for divide.

...

> - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
> + offset;

Broken indentation.

...

> - return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
> + MICRO) - 3 + offset;

I would still go with 'MICRO) -' part to be on the previous line despite being
over 80, this is logical split which increases readability.

> - return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
> + offset;

Broken indentation.

--
With Best Regards,
Andy Shevchenko


2022-12-20 17:37:56

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Tue, Dec 20, 2022 at 07:11:51PM +0200, Andy Shevchenko wrote:
> On Tue, Dec 20, 2022 at 04:48:06PM +0000, Hanna Hawa wrote:

...

> > - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
> > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
> > + offset;
>
> Broken indentation.
>
> ...
>
> > - return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
> > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
> > + MICRO) - 3 + offset;
>
> I would still go with 'MICRO) -' part to be on the previous line despite being
> over 80, this is logical split which increases readability.
>
> > - return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
> > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
> > + offset;
>
> Broken indentation.

That said, can you just follow what I have said in a review of v3?

--
With Best Regards,
Andy Shevchenko


2022-12-20 18:01:29

by Hanna Hawa

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow



On 12/20/2022 7:11 PM, Andy Shevchenko wrote:
> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you can confirm the sender and know the content is safe.
>
>
>
> On Tue, Dec 20, 2022 at 04:48:06PM +0000, Hanna Hawa wrote:
>> From: Lareine Khawaly <[email protected]>
>>
>> In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
>> by depending on the values of the given parameters including the ic_clk.
>> For example in our use case where ic_clk is larger than one million,
>> multiplication of ic_clk * 4700 will result in 32 bit overflow.
>>
>> Add cast of u64 to the calculation to avoid multiplication overflow, and
>> use the corresponding define for divide.
>
> ...
>
>> - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
>> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
>> + offset;
>
> Broken indentation.
>
> ...
>
>> - return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
>> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
>> + MICRO) - 3 + offset;
>
> I would still go with 'MICRO) -' part to be on the previous line despite being
> over 80, this is logical split which increases readability.

Okay.. will move the 'MICRO) -' one line before
>
>> - return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
>> + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
>> + offset;
>
> Broken indentation.

Why it's broken indentation? I'm asking to know for the next time. The
word 'offset' is not part of DIV_ROUND_CLOSEST_ULL parentheses. In wrong
indentation the checkpatch shout about it, but it didn't happen with the
above.

Does the below the correct indentation?

--- a/drivers/i2c/busses/i2c-designware-common.c
+++ b/drivers/i2c/busses/i2c-designware-common.c
@@ -351,7 +351,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf,
int cond, int offset)
*
* If your hardware is free from tHD;STA issue, try
this one.
*/
- return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 +
offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) -
+ 8 + offset;
else
/*
* Conditional expression:
@@ -367,7 +368,8 @@ u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf,
int cond, int offset)
* The reason why we need to take into account "tf" here,
* is the same as described in i2c_dw_scl_lcnt().
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO)
- 3 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL +
tf), MICRO) -
+ 3 + offset;
}

u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
@@ -383,7 +385,8 @@ u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf,
int offset)
* account the fall time of SCL signal (tf). Default tf value
* should be 0.3 us, for safety.
*/
- return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
+ return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) -
+ 1 + offset;
}


>
> --
> With Best Regards,
> Andy Shevchenko
>
>

2022-12-20 19:40:43

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Tue, Dec 20, 2022 at 09:23:53PM +0200, Andy Shevchenko wrote:
> On Tue, Dec 20, 2022 at 07:43:06PM +0200, Hawa, Hanna wrote:

...

> return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) -
> 8 + offset;
>
> return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf), MICRO) -
> 3 + offset;
>
> return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) -
> 1 + offset;

Thinking more on this, I would probably replace the order of arguments to make
it ' + offset - N' in each case. Since plus will be on the previous line and
become first it will be easier to parse the arithmetical expression.

--
With Best Regards,
Andy Shevchenko


2022-12-20 20:13:28

by Hanna Hawa

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow



On 12/20/2022 9:27 PM, Andy Shevchenko wrote:
> Thinking more on this, I would probably replace the order of arguments to make
> it ' + offset - N' in each case. Since plus will be on the previous line and
> become first it will be easier to parse the arithmetical expression.

Do you want this change in the same patch? i don't think it's related
here.. I can push separated change

Thanks,
Hanna

2022-12-20 20:13:38

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Tue, Dec 20, 2022 at 07:43:06PM +0200, Hawa, Hanna wrote:
> On 12/20/2022 7:11 PM, Andy Shevchenko wrote:
> > On Tue, Dec 20, 2022 at 04:48:06PM +0000, Hanna Hawa wrote:

...

> > > - return DIV_ROUND_CLOSEST(ic_clk * tSYMBOL, MICRO) - 8 + offset;
> > > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - 8 +
> > > + offset;
> >
> > Broken indentation.

...

> > > - return DIV_ROUND_CLOSEST(ic_clk * (tSYMBOL + tf), MICRO) - 3 + offset;
> > > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf),
> > > + MICRO) - 3 + offset;
> >
> > I would still go with 'MICRO) -' part to be on the previous line despite being
> > over 80, this is logical split which increases readability.
>
> Okay.. will move the 'MICRO) -' one line before
> >
> > > - return DIV_ROUND_CLOSEST(ic_clk * (tLOW + tf), MICRO) - 1 + offset;
> > > + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - 1 +
> > > + offset;
> >
> > Broken indentation.
>
> Why it's broken indentation? I'm asking to know for the next time. The word
> 'offset' is not part of DIV_ROUND_CLOSEST_ULL parentheses. In wrong
> indentation the checkpatch shout about it, but it didn't happen with the
> above.

The continuation line of the expression should go under the opening
parentheses, but you are right, the part outside DIV_ should be under
D and not as you suggested below.

But the problem is that you made illogical split while I suggested to leave
DIV_...() on one line and the rest on the other.

> Does the below the correct indentation?

No.

return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) -
8 + offset;

return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf), MICRO) -
3 + offset;

return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) -
1 + offset;

--
With Best Regards,
Andy Shevchenko


2022-12-21 17:18:50

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow

On Tue, Dec 20, 2022 at 09:43:25PM +0200, Hawa, Hanna wrote:
> On 12/20/2022 9:27 PM, Andy Shevchenko wrote:
> > Thinking more on this, I would probably replace the order of arguments to make
> > it ' + offset - N' in each case. Since plus will be on the previous line and
> > become first it will be easier to parse the arithmetical expression.
>
> Do you want this change in the same patch? i don't think it's related here..
> I can push separated change

Up to you. If you think it's not suitable, then don't change.

--
With Best Regards,
Andy Shevchenko


2022-12-21 20:07:41

by Hanna Hawa

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] i2c: designware: use casting of u64 in clock multiplication to avoid overflow



On 12/21/2022 6:59 PM, Andy Shevchenko wrote:
>> Do you want this change in the same patch? i don't think it's related here..
>> I can push separated change
> Up to you. If you think it's not suitable, then don't change.

Will push as separated patch.

Thanks,
Hanna