Instead of using hard coded magic number here and there,
define maximum pad number in the group in newly added
INTEL_PINCTRL_MAX_GPP_SIZE.
Signed-off-by: Andy Shevchenko <[email protected]>
---
drivers/pinctrl/intel/pinctrl-intel.c | 6 +++---
drivers/pinctrl/intel/pinctrl-intel.h | 4 +++-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 9d2791a81ffa..2f7931d9602c 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -1403,7 +1403,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
for (i = 0; i < ngpps; i++) {
gpps[i] = community->gpps[i];
- if (gpps[i].size > 32)
+ if (gpps[i].size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL;
/* Special treatment for GPIO base */
@@ -1421,7 +1421,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
}
gpps[i].padown_num = padown_num;
- padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
+ padown_num += DIV_ROUND_UP(gpps[i].size * 4, INTEL_PINCTRL_MAX_GPP_SIZE);
}
community->gpps = gpps;
@@ -1437,7 +1437,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl,
unsigned int padown_num = 0;
size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size);
- if (community->gpp_size > 32)
+ if (community->gpp_size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL;
gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 981c1f520f13..3b0e2d3f15d5 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -46,11 +46,13 @@ struct intel_function {
size_t ngroups;
};
+#define INTEL_PINCTRL_MAX_GPP_SIZE 32
+
/**
* struct intel_padgroup - Hardware pad group information
* @reg_num: GPI_IS register number
* @base: Starting pin of this group
- * @size: Size of this group (maximum is 32).
+ * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE).
* @gpio_base: Starting GPIO base of this group
* @padown_num: PAD_OWN register number (assigned by the core driver)
*
--
2.35.1
On Mon, Dec 19, 2022 at 02:32:40PM +0200, Andy Shevchenko wrote:
> Instead of using hard coded magic number here and there,
> define maximum pad number in the group in newly added
> INTEL_PINCTRL_MAX_GPP_SIZE.
>
> Signed-off-by: Andy Shevchenko <[email protected]>
Acked-by: Mika Westerberg <[email protected]>
On Mon, Dec 19, 2022 at 04:35:08PM +0200, Mika Westerberg wrote:
> On Mon, Dec 19, 2022 at 02:32:40PM +0200, Andy Shevchenko wrote:
> > Instead of using hard coded magic number here and there,
> > define maximum pad number in the group in newly added
> > INTEL_PINCTRL_MAX_GPP_SIZE.
> >
> > Signed-off-by: Andy Shevchenko <[email protected]>
>
> Acked-by: Mika Westerberg <[email protected]>
Pushed to my review and testing queue, thanks!
--
With Best Regards,
Andy Shevchenko