This patch series adds the i2c and spi nodes that are missing on the
sc8280xp platform. Since I am already making changes to sc8280xp.dtsi
in this series, I also included a change to enable the rng node for this
platform as well.
The first three patches in this series are new in v2 and rename one node
at a time to try to make the review easier. Each patch has a changelog.
Note that this series needs to be applied on top of:
[PATCH v5] arm64: dts: qcom: sa8540p-ride: enable pcie2a node
https://lore.kernel.org/lkml/[email protected]/
Changes from v2 to v3:
- Reordered rng node in patch 7 so that it's sorted correctly by address
- Since I respun the series, I made Konrad's sort order suggestion to
the state nodes since I'm making changes here.
- Collected R-b and T-b tags.
Brian Masney (7):
arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17
arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21
arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4
arm64: dts: qcom: sc8280xp: add missing i2c nodes
arm64: dts: qcom: sc8280xp: add missing spi nodes
arm64: dts: qcom: sa8540p-ride: add i2c nodes
arm64: dts: qcom: sc8280xp: add rng device tree node
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +-
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 91 ++-
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 160 ++--
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 178 ++---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 725 +++++++++++++++++-
5 files changed, 983 insertions(+), 183 deletions(-)
--
2.38.1
Add the necessary nodes in order to get i2c0, i2c1, i2c12, i2c15, and
i2c18 functioning on the automotive board and exposed to userspace.
This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel. This change was validated by using
i2c-tools 4.3.3 on CentOS Stream 9:
[root@localhost ~]# i2cdetect -l
i2c-0 i2c Geni-I2C I2C adapter
i2c-1 i2c Geni-I2C I2C adapter
i2c-12 i2c Geni-I2C I2C adapter
i2c-15 i2c Geni-I2C I2C adapter
i2c-18 i2c Geni-I2C I2C adapter
[root@localhost ~]# i2cdetect -a -y 15
Warning: Can't use SMBus Quick Write command, will skip some addresses
0 1 2 3 4 5 6 7 8 9 a b c d e f
00:
10:
20:
30: -- -- -- -- -- -- -- --
40:
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60:
70:
Signed-off-by: Brian Masney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Shazad Hussain <[email protected]>
---
Changes from v2 to v3
- Added Konrad's R-b and Shazad's T-b
Changes from v1 to v2
- Dropped qupX_ prefix from labels. (Johan)
- Reordered nodes based on new name.
- Added i2c buses 0, 1, and 12 (Shazad)
- Drop mux/config-pins and have the pin properties live directly
under the i2cX-default-state node. (Konrad)
- Use decimal notation for drive strength (Johan)
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 83 +++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index b6e0db5508c7..ccd2ea3c9d04 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -17,6 +17,11 @@ / {
compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c12 = &i2c12;
+ i2c15 = &i2c15;
+ i2c18 = &i2c18;
serial0 = &uart17;
};
@@ -146,6 +151,41 @@ vreg_l8g: ldo8 {
};
};
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_default>;
+
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_default>;
+
+ status = "okay";
+};
+
+&i2c12 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c12_default>;
+
+ status = "okay";
+};
+
+&i2c15 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c15_default>;
+
+ status = "okay";
+};
+
+&i2c18 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c18_default>;
+
+ status = "okay";
+};
+
&pcie2a {
ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>,
<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>,
@@ -188,6 +228,14 @@ &pcie3a_phy {
status = "okay";
};
+&qup0 {
+ status = "okay";
+};
+
+&qup1 {
+ status = "okay";
+};
+
&qup2 {
status = "okay";
};
@@ -268,6 +316,41 @@ &xo_board_clk {
/* PINCTRL */
&tlmm {
+ i2c0_default: i2c0-default-state {
+ pins = "gpio135", "gpio136";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ i2c1_default: i2c1-default-state {
+ pins = "gpio158", "gpio159";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ i2c12_default: i2c12-default-state {
+ pins = "gpio0", "gpio1";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ i2c15_default: i2c15-default-state {
+ pins = "gpio36", "gpio37";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ i2c18_default: i2c18-default-state {
+ pins = "gpio66", "gpio67";
+ function = "qup18";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
pcie2a_default: pcie2a-default-state {
perst-pins {
pins = "gpio143";
--
2.38.1
On 12/20/22 1:28 PM, Brian Masney wrote:
> This patch series adds the i2c and spi nodes that are missing on the
> sc8280xp platform. Since I am already making changes to sc8280xp.dtsi
> in this series, I also included a change to enable the rng node for this
> platform as well.
>
> The first three patches in this series are new in v2 and rename one node
> at a time to try to make the review easier. Each patch has a changelog.
>
> Note that this series needs to be applied on top of:
> [PATCH v5] arm64: dts: qcom: sa8540p-ride: enable pcie2a node
> https://lore.kernel.org/lkml/[email protected]/
>
> Changes from v2 to v3:
> - Reordered rng node in patch 7 so that it's sorted correctly by address
> - Since I respun the series, I made Konrad's sort order suggestion to
> the state nodes since I'm making changes here.
> - Collected R-b and T-b tags.
>
> Brian Masney (7):
> arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17
> arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21
> arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4
> arm64: dts: qcom: sc8280xp: add missing i2c nodes
> arm64: dts: qcom: sc8280xp: add missing spi nodes
> arm64: dts: qcom: sa8540p-ride: add i2c nodes
> arm64: dts: qcom: sc8280xp: add rng device tree node
>
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +-
> arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 91 ++-
> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 160 ++--
> .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 178 ++---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 725 +++++++++++++++++-
> 5 files changed, 983 insertions(+), 183 deletions(-)
One note, and this isn't due to your patches at all, but the touchscreen
on the Thinkpad X13s needs to be manually bound in order to work via
echo 1-0010 | sudo tee /sys/bus/i2c/drivers/i2c_hid_of/bind - this patch
does not affect that, though I had hoped maybe it would.
Tested on the Lenovo Thinkpad X13s
Tested-by: Steev Klimaszewski <[email protected]>
On Wed, Dec 21, 2022 at 01:41:52PM -0600, Steev Klimaszewski wrote:
> One note, and this isn't due to your patches at all, but the touchscreen on
> the Thinkpad X13s needs to be manually bound in order to work via echo
> 1-0010 | sudo tee /sys/bus/i2c/drivers/i2c_hid_of/bind - this patch does not
> affect that, though I had hoped maybe it would.
>
> Tested on the Lenovo Thinkpad X13s
>
> Tested-by: Steev Klimaszewski <[email protected]>
Hi Steev,
I believe that I remember reading at some point that the touchscreen
issue on the x13s was related to some probe deferral issues. If so,
try adding this patch series from Javier to see if that helps the
situation:
https://lore.kernel.org/lkml/[email protected]/
Javier separately encountered a probe deferral issue when enabling a
Snapdragon-based Chromebook on Fedora that caused him to work on that
patch series.
Brian