2021-03-04 11:03:09

by Like Xu

Subject: [PATCH v3 1/9] perf/x86/intel: Fix a comment about guest LBR support

Starting from v5.12, KVM reports guest LBR and extra_regs
support when the host has relevant support.

Cc: Peter Zijlstra <[email protected]>
Reviewed-by: Kan Liang <[email protected]>
Signed-off-by: Like Xu <[email protected]>
---
arch/x86/events/intel/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index d4569bfa83e3..a32acc7733a7 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5565,7 +5565,7 @@ __init int intel_pmu_init(void)

/*
* Access LBR MSR may cause #GP under certain circumstances.
- * E.g. KVM doesn't support LBR MSR
+ * E.g. KVM doesn't support LBR MSR before v5.12.
* Check all LBT MSR here.
* Disable LBR access if any LBR MSRs can not be accessed.
*/
--
2.29.2

2021-03-04 12:13:01

by Sean Christopherson

Subject: Re: [PATCH v3 1/9] perf/x86/intel: Fix a comment about guest LBR support

On Wed, Mar 03, 2021, Like Xu wrote:
> Starting from v5.12, KVM reports guest LBR and extra_regs
> support when the host has relevant support.
>
> Cc: Peter Zijlstra <[email protected]>
> Reviewed-by: Kan Liang <[email protected]>
> Signed-off-by: Like Xu <[email protected]>
> ---
> arch/x86/events/intel/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index d4569bfa83e3..a32acc7733a7 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5565,7 +5565,7 @@ __init int intel_pmu_init(void)
>
> /*
> * Access LBR MSR may cause #GP under certain circumstances.
> - * E.g. KVM doesn't support LBR MSR
> + * E.g. KVM doesn't support LBR MSR before v5.12.

Just delete this part of the comment.

> * Check all LBT MSR here.
> * Disable LBR access if any LBR MSRs can not be accessed.
> */
> --
> 2.29.2
>