Hi Greg, Sasha,
These patches were not marked with a Fixes: tag but they do fix booting
ARM 32-bit platforms that have specific FDT placement and would cause
boot failures like these:
[ 0.000000] 8<--- cut here ---
[ 0.000000] Unable to handle kernel paging request at virtual address
ffa14000
[ 0.000000] pgd = (ptrval)
[ 0.000000] [ffa14000] *pgd=80000040007003, *pmd=00000000
[ 0.000000] Internal error: Oops: 206 [#1] SMP ARM
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.4.85-1.0 #1
[ 0.000000] Hardware name: Broadcom STB (Flattened Device Tree)
[ 0.000000] PC is at fdt_check_header+0xc/0x21c
[ 0.000000] LR is at __unflatten_device_tree+0x7c/0x2f8
[ 0.000000] pc : [<c0d30e44>] lr : [<c0a6c0fc>] psr: 600000d3
[ 0.000000] sp : c1401eac ip : c1401ec8 fp : c1401ec4
[ 0.000000] r10: 00000000 r9 : c150523c r8 : 00000000
[ 0.000000] r7 : c124eab4 r6 : ffa14000 r5 : 00000000 r4 :
c14ba920
[ 0.000000] r3 : 00000000 r2 : c150523c r1 : 00000000 r0 :
ffa14000
[ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM
Segment user
[ 0.000000] Control: 30c5383d Table: 40003000 DAC: fffffffd
[ 0.000000] Process swapper (pid: 0, stack limit = 0x(ptrval))
[ 0.000000] Stack: (0xc1401eac to 0xc1402000)
[ 0.000000] 1ea0: c14ba920 00000000
ffa14000 c1401ef4 c1401ec8
[ 0.000000] 1ec0: c0a6c0fc c0d30e44 c124eab4 c124eab4 00000000
c14ebfc0 c140e5b8 00000000
[ 0.000000] 1ee0: 00000001 c126f5a0 c1401f14 c1401ef8 c1250064
c0a6c08c 00000000 c1401f08
[ 0.000000] 1f00: c022ddac c140ce80 c1401f9c c1401f18 c120506c
c125002c 00000000 00000000
[ 0.000000] 1f20: 00000000 00000000 ffffffff c1401f94 c1401f6c
c1406308 3fffffff 00000001
[ 0.000000] 1f40: 00000000 00000001 c1432b58 c14ca180 c1213ca4
c1406308 c1406300 30c0387d
[ 0.000000] 1f60: c1401f8c c1401f70 c028e0ec 00000000 c1401f94
c1406308 c1406300 30c0387d
[ 0.000000] 1f80: 00000000 7fa14000 420f1000 30c5387d c1401ff4
c1401fa0 c1200c98 c120467c
[ 0.000000] 1fa0: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 c127fa44
[ 0.000000] 1fc0: 00000000 00000000 00000000 c1200330 00000000
30c0387d ffffffff 7fa14000
[ 0.000000] 1fe0: 420f1000 30c5387d 00000000 c1401ff8 00000000
c1200c28 00000000 00000000
[ 0.000000] Backtrace:
[ 0.000000] [<c0d30e38>] (fdt_check_header) from [<c0a6c0fc>]
(__unflatten_device_tree+0x7c/0x2f8)
[ 0.000000] r6:ffa14000 r5:00000000 r4:c14ba920
[ 0.000000] [<c0a6c080>] (__unflatten_device_tree) from [<c1250064>]
(unflatten_device_tree+0x44/0x54)
[ 0.000000] r10:c126f5a0 r9:00000001 r8:00000000 r7:c140e5b8
r6:c14ebfc0 r5:00000000
[ 0.000000] r4:c124eab4 r3:c124eab4
[ 0.000000] [<c1250020>] (unflatten_device_tree) from [<c120506c>]
(setup_arch+0x9fc/0xc84)
[ 0.000000] r4:c140ce80
[ 0.000000] [<c1204670>] (setup_arch) from [<c1200c98>]
(start_kernel+0x7c/0x540)
[ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:00000000
r6:30c0387d r5:c1406300
[ 0.000000] r4:c1406308
[ 0.000000] [<c1200c1c>] (start_kernel) from [<00000000>] (0x0)
[ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:ffffffff
r6:30c0387d r5:00000000
[ 0.000000] r4:c1200330
[ 0.000000] Code: e89da800 e1a0c00d e92dd870 e24cb004 (e5d03000)
[ 0.000000] random: get_random_bytes called from
print_oops_end_marker+0x50/0x58 with crng_init=0
[ 0.000000] ---[ end trace f34b4929828506c1 ]---
[ 0.000000] Kernel panic - not syncing: Attempted to kill the idle
task!
[ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill
the idle task! ]---
Ard Biesheuvel (3):
ARM: 9011/1: centralize phys-to-virt conversion of DT/ATAGS address
ARM: 9012/1: move device tree mapping out of linear region
ARM: 9020/1: mm: use correct section size macro to describe the FDT
virtual address
Documentation/arm/memory.rst | 7 ++++++-
arch/arm/include/asm/fixmap.h | 2 +-
arch/arm/include/asm/memory.h | 5 +++++
arch/arm/include/asm/prom.h | 4 ++--
arch/arm/kernel/atags.h | 4 ++--
arch/arm/kernel/atags_parse.c | 6 +++---
arch/arm/kernel/devtree.c | 6 +++---
arch/arm/kernel/head.S | 5 ++---
arch/arm/kernel/setup.c | 19 ++++++++++++++-----
arch/arm/mm/init.c | 1 -
arch/arm/mm/mmu.c | 20 ++++++++++++++------
arch/arm/mm/pv-fixup-asm.S | 4 ++--
12 files changed, 54 insertions(+), 29 deletions(-)
--
2.25.1
From: Ard Biesheuvel <[email protected]>
commit 7a1be318f5795cb66fa0dc86b3ace427fe68057f upstream
On ARM, setting up the linear region is tricky, given the constraints
around placement and alignment of the memblocks, and how the kernel
itself as well as the DT are placed in physical memory.
Let's simplify matters a bit, by moving the device tree mapping to the
top of the address space, right between the end of the vmalloc region
and the start of the the fixmap region, and create a read-only mapping
for it that is independent of the size of the linear region, and how it
is organized.
Since this region was formerly used as a guard region, which will now be
populated fully on LPAE builds by this read-only mapping (which will
still be able to function as a guard region for stray writes), bump the
start of the [underutilized] fixmap region by 512 KB as well, to ensure
that there is always a proper guard region here. Doing so still leaves
ample room for the fixmap space, even with NR_CPUS set to its maximum
value of 32.
Tested-by: Linus Walleij <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Reviewed-by: Nicolas Pitre <[email protected]>
Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
---
Documentation/arm/memory.rst | 7 ++++++-
arch/arm/include/asm/fixmap.h | 2 +-
arch/arm/include/asm/memory.h | 5 +++++
arch/arm/kernel/head.S | 5 ++---
arch/arm/kernel/setup.c | 11 ++++++++---
arch/arm/mm/init.c | 1 -
arch/arm/mm/mmu.c | 20 ++++++++++++++------
arch/arm/mm/pv-fixup-asm.S | 4 ++--
8 files changed, 38 insertions(+), 17 deletions(-)
diff --git a/Documentation/arm/memory.rst b/Documentation/arm/memory.rst
index 0521b4ce5c96..34bb23c44a71 100644
--- a/Documentation/arm/memory.rst
+++ b/Documentation/arm/memory.rst
@@ -45,9 +45,14 @@ fffe8000 fffeffff DTCM mapping area for platforms with
fffe0000 fffe7fff ITCM mapping area for platforms with
ITCM mounted inside the CPU.
-ffc00000 ffefffff Fixmap mapping region. Addresses provided
+ffc80000 ffefffff Fixmap mapping region. Addresses provided
by fix_to_virt() will be located here.
+ffc00000 ffc7ffff Guard region
+
+ff800000 ffbfffff Permanent, fixed read-only mapping of the
+ firmware provided DT blob
+
fee00000 feffffff Mapping of PCI I/O space. This is a static
mapping within the vmalloc space.
diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h
index fc56fc3e1931..9575b404019c 100644
--- a/arch/arm/include/asm/fixmap.h
+++ b/arch/arm/include/asm/fixmap.h
@@ -2,7 +2,7 @@
#ifndef _ASM_FIXMAP_H
#define _ASM_FIXMAP_H
-#define FIXADDR_START 0xffc00000UL
+#define FIXADDR_START 0xffc80000UL
#define FIXADDR_END 0xfff00000UL
#define FIXADDR_TOP (FIXADDR_END - PAGE_SIZE)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 99035b5891ef..bb79e52aeb90 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -67,6 +67,10 @@
*/
#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
+#define FDT_FIXED_BASE UL(0xff800000)
+#define FDT_FIXED_SIZE (2 * PMD_SIZE)
+#define FDT_VIRT_ADDR(physaddr) ((void *)(FDT_FIXED_BASE | (physaddr) % PMD_SIZE))
+
#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
/*
* Allow 16MB-aligned ioremap pages
@@ -107,6 +111,7 @@ extern unsigned long vectors_base;
#define MODULES_VADDR PAGE_OFFSET
#define XIP_VIRT_ADDR(physaddr) (physaddr)
+#define FDT_VIRT_ADDR(physaddr) ((void *)(physaddr))
#endif /* !CONFIG_MMU */
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 98c1e68bdfcb..8cd968199e2c 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -275,9 +275,8 @@ __create_page_tables:
*/
mov r0, r2, lsr #SECTION_SHIFT
movs r0, r0, lsl #SECTION_SHIFT
- subne r3, r0, r8
- addne r3, r3, #PAGE_OFFSET
- addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
+ ldrne r3, =FDT_FIXED_BASE >> (SECTION_SHIFT - PMD_ORDER)
+ addne r3, r3, r4
orrne r6, r7, r0
strne r6, [r3], #1 << PMD_ORDER
addne r6, r6, #1 << SECTION_SHIFT
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 306bcd9844be..694aa6b4bd03 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -18,6 +18,7 @@
#include <linux/of_platform.h>
#include <linux/init.h>
#include <linux/kexec.h>
+#include <linux/libfdt.h>
#include <linux/of_fdt.h>
#include <linux/cpu.h>
#include <linux/interrupt.h>
@@ -89,7 +90,6 @@ unsigned int cacheid __read_mostly;
EXPORT_SYMBOL(cacheid);
unsigned int __atags_pointer __initdata;
-void *atags_vaddr __initdata;
unsigned int system_rev;
EXPORT_SYMBOL(system_rev);
@@ -1083,13 +1083,18 @@ void __init hyp_mode_check(void)
void __init setup_arch(char **cmdline_p)
{
const struct machine_desc *mdesc = NULL;
+ void *atags_vaddr = NULL;
if (__atags_pointer)
- atags_vaddr = phys_to_virt(__atags_pointer);
+ atags_vaddr = FDT_VIRT_ADDR(__atags_pointer);
setup_processor();
- if (atags_vaddr)
+ if (atags_vaddr) {
mdesc = setup_machine_fdt(atags_vaddr);
+ if (mdesc)
+ memblock_reserve(__atags_pointer,
+ fdt_totalsize(atags_vaddr));
+ }
if (!mdesc)
mdesc = setup_machine_tags(atags_vaddr, __machine_arch_type);
if (!mdesc) {
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index c23dbf8bebee..d54d69cf1732 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -223,7 +223,6 @@ void __init arm_memblock_init(const struct machine_desc *mdesc)
if (mdesc->reserve)
mdesc->reserve();
- early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem();
/* reserve memory for DMA contiguous allocations */
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 55991fe60054..fa259825310c 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -39,6 +39,8 @@
#include "mm.h"
#include "tcm.h"
+extern unsigned long __atags_pointer;
+
/*
* empty_zero_page is a special page that is used for
* zero-initialized data and COW.
@@ -946,7 +948,7 @@ static void __init create_mapping(struct map_desc *md)
return;
}
- if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
+ if (md->type == MT_DEVICE &&
md->virtual >= PAGE_OFFSET && md->virtual < FIXADDR_START &&
(md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
pr_warn("BUG: mapping for 0x%08llx at 0x%08lx out of vmalloc space\n",
@@ -1333,6 +1335,15 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
for (addr = VMALLOC_START; addr < (FIXADDR_TOP & PMD_MASK); addr += PMD_SIZE)
pmd_clear(pmd_off_k(addr));
+ if (__atags_pointer) {
+ /* create a read-only mapping of the device tree */
+ map.pfn = __phys_to_pfn(__atags_pointer & SECTION_MASK);
+ map.virtual = FDT_FIXED_BASE;
+ map.length = FDT_FIXED_SIZE;
+ map.type = MT_ROM;
+ create_mapping(&map);
+ }
+
/*
* Map the kernel if it is XIP.
* It is always first in the modulearea.
@@ -1489,8 +1500,7 @@ static void __init map_lowmem(void)
}
#ifdef CONFIG_ARM_PV_FIXUP
-extern void *atags_vaddr;
-typedef void pgtables_remap(long long offset, unsigned long pgd, void *bdata);
+typedef void pgtables_remap(long long offset, unsigned long pgd);
pgtables_remap lpae_pgtables_remap_asm;
/*
@@ -1503,7 +1513,6 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
unsigned long pa_pgd;
unsigned int cr, ttbcr;
long long offset;
- void *boot_data;
if (!mdesc->pv_fixup)
return;
@@ -1520,7 +1529,6 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
*/
lpae_pgtables_remap = (pgtables_remap *)(unsigned long)__pa(lpae_pgtables_remap_asm);
pa_pgd = __pa(swapper_pg_dir);
- boot_data = atags_vaddr;
barrier();
pr_info("Switching physical address space to 0x%08llx\n",
@@ -1556,7 +1564,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
* needs to be assembly. It's fairly simple, as we're using the
* temporary tables setup by the initial assembly code.
*/
- lpae_pgtables_remap(offset, pa_pgd, boot_data);
+ lpae_pgtables_remap(offset, pa_pgd);
/* Re-enable the caches and cacheable TLB walks */
asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
diff --git a/arch/arm/mm/pv-fixup-asm.S b/arch/arm/mm/pv-fixup-asm.S
index 8eade0416739..5c5e1952000a 100644
--- a/arch/arm/mm/pv-fixup-asm.S
+++ b/arch/arm/mm/pv-fixup-asm.S
@@ -39,8 +39,8 @@ ENTRY(lpae_pgtables_remap_asm)
/* Update level 2 entries for the boot data */
add r7, r2, #0x1000
- add r7, r7, r3, lsr #SECTION_SHIFT - L2_ORDER
- bic r7, r7, #(1 << L2_ORDER) - 1
+ movw r3, #FDT_FIXED_BASE >> (SECTION_SHIFT - L2_ORDER)
+ add r7, r7, r3
ldrd r4, r5, [r7]
adds r4, r4, r0
adc r5, r5, r1
--
2.25.1
From: Ard Biesheuvel <[email protected]>
commit e9a2f8b599d0bc22a1b13e69527246ac39c697b4 upstream
Before moving the DT mapping out of the linear region, let's prepare
for this change by removing all the phys-to-virt translations of the
__atags_pointer variable, and perform this translation only once at
setup time.
Tested-by: Linus Walleij <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Acked-by: Nicolas Pitre <[email protected]>
Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/include/asm/prom.h | 4 ++--
arch/arm/kernel/atags.h | 4 ++--
arch/arm/kernel/atags_parse.c | 6 +++---
arch/arm/kernel/devtree.c | 6 +++---
arch/arm/kernel/setup.c | 14 +++++++++-----
arch/arm/mm/mmu.c | 4 ++--
6 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 1e36c40533c1..402e3f34c7ed 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -9,12 +9,12 @@
#ifdef CONFIG_OF
-extern const struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
+extern const struct machine_desc *setup_machine_fdt(void *dt_virt);
extern void __init arm_dt_init_cpu_maps(void);
#else /* CONFIG_OF */
-static inline const struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
+static inline const struct machine_desc *setup_machine_fdt(void *dt_virt)
{
return NULL;
}
diff --git a/arch/arm/kernel/atags.h b/arch/arm/kernel/atags.h
index 067e12edc341..f2819c25b602 100644
--- a/arch/arm/kernel/atags.h
+++ b/arch/arm/kernel/atags.h
@@ -2,11 +2,11 @@
void convert_to_tag_list(struct tag *tags);
#ifdef CONFIG_ATAGS
-const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer,
+const struct machine_desc *setup_machine_tags(void *__atags_vaddr,
unsigned int machine_nr);
#else
static inline const struct machine_desc * __init __noreturn
-setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
+setup_machine_tags(void *__atags_vaddr, unsigned int machine_nr)
{
early_print("no ATAGS support: can't continue\n");
while (true);
diff --git a/arch/arm/kernel/atags_parse.c b/arch/arm/kernel/atags_parse.c
index 6c12d9fe694e..373b61f9a4f0 100644
--- a/arch/arm/kernel/atags_parse.c
+++ b/arch/arm/kernel/atags_parse.c
@@ -174,7 +174,7 @@ static void __init squash_mem_tags(struct tag *tag)
}
const struct machine_desc * __init
-setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
+setup_machine_tags(void *atags_vaddr, unsigned int machine_nr)
{
struct tag *tags = (struct tag *)&default_tags;
const struct machine_desc *mdesc = NULL, *p;
@@ -195,8 +195,8 @@ setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
if (!mdesc)
return NULL;
- if (__atags_pointer)
- tags = phys_to_virt(__atags_pointer);
+ if (atags_vaddr)
+ tags = atags_vaddr;
else if (mdesc->atag_offset)
tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 7f0745a97e20..28311dd0fee6 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -203,12 +203,12 @@ static const void * __init arch_get_next_mach(const char *const **match)
/**
* setup_machine_fdt - Machine setup when an dtb was passed to the kernel
- * @dt_phys: physical address of dt blob
+ * @dt_virt: virtual address of dt blob
*
* If a dtb was passed to the kernel in r2, then use it to choose the
* correct machine_desc and to setup the system.
*/
-const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
+const struct machine_desc * __init setup_machine_fdt(void *dt_virt)
{
const struct machine_desc *mdesc, *mdesc_best = NULL;
@@ -221,7 +221,7 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
mdesc_best = &__mach_desc_GENERIC_DT;
#endif
- if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
+ if (!dt_virt || !early_init_dt_verify(dt_virt))
return NULL;
mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 3f65d0ac9f63..306bcd9844be 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -89,6 +89,7 @@ unsigned int cacheid __read_mostly;
EXPORT_SYMBOL(cacheid);
unsigned int __atags_pointer __initdata;
+void *atags_vaddr __initdata;
unsigned int system_rev;
EXPORT_SYMBOL(system_rev);
@@ -1081,19 +1082,22 @@ void __init hyp_mode_check(void)
void __init setup_arch(char **cmdline_p)
{
- const struct machine_desc *mdesc;
+ const struct machine_desc *mdesc = NULL;
+
+ if (__atags_pointer)
+ atags_vaddr = phys_to_virt(__atags_pointer);
setup_processor();
- mdesc = setup_machine_fdt(__atags_pointer);
+ if (atags_vaddr)
+ mdesc = setup_machine_fdt(atags_vaddr);
if (!mdesc)
- mdesc = setup_machine_tags(__atags_pointer, __machine_arch_type);
+ mdesc = setup_machine_tags(atags_vaddr, __machine_arch_type);
if (!mdesc) {
early_print("\nError: invalid dtb and unrecognized/unsupported machine ID\n");
early_print(" r1=0x%08x, r2=0x%08x\n", __machine_arch_type,
__atags_pointer);
if (__atags_pointer)
- early_print(" r2[]=%*ph\n", 16,
- phys_to_virt(__atags_pointer));
+ early_print(" r2[]=%*ph\n", 16, atags_vaddr);
dump_machine_table();
}
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ab69250a86bc..55991fe60054 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1489,7 +1489,7 @@ static void __init map_lowmem(void)
}
#ifdef CONFIG_ARM_PV_FIXUP
-extern unsigned long __atags_pointer;
+extern void *atags_vaddr;
typedef void pgtables_remap(long long offset, unsigned long pgd, void *bdata);
pgtables_remap lpae_pgtables_remap_asm;
@@ -1520,7 +1520,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
*/
lpae_pgtables_remap = (pgtables_remap *)(unsigned long)__pa(lpae_pgtables_remap_asm);
pa_pgd = __pa(swapper_pg_dir);
- boot_data = __va(__atags_pointer);
+ boot_data = atags_vaddr;
barrier();
pr_info("Switching physical address space to 0x%08llx\n",
--
2.25.1
From: Ard Biesheuvel <[email protected]>
commit fc2933c133744305236793025b00c2f7d258b687 upstream
Commit
149a3ffe62b9dbc3 ("9012/1: move device tree mapping out of linear region")
created a permanent, read-only section mapping of the device tree blob
provided by the firmware, and added a set of macros to get the base and
size of the virtually mapped FDT based on the physical address. However,
while the mapping code uses the SECTION_SIZE macro correctly, the macros
use PMD_SIZE instead, which means something entirely different on ARM when
using short descriptors, and is therefore not the right quantity to use
here. So replace PMD_SIZE with SECTION_SIZE. While at it, change the names
of the macro and its parameter to clarify that it returns the virtual
address of the start of the FDT, based on the physical address in memory.
Tested-by: Joel Stanley <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/include/asm/memory.h | 6 +++---
arch/arm/kernel/setup.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index bb79e52aeb90..f717d7122d9d 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -68,8 +68,8 @@
#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
#define FDT_FIXED_BASE UL(0xff800000)
-#define FDT_FIXED_SIZE (2 * PMD_SIZE)
-#define FDT_VIRT_ADDR(physaddr) ((void *)(FDT_FIXED_BASE | (physaddr) % PMD_SIZE))
+#define FDT_FIXED_SIZE (2 * SECTION_SIZE)
+#define FDT_VIRT_BASE(physbase) ((void *)(FDT_FIXED_BASE | (physbase) % SECTION_SIZE))
#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
/*
@@ -111,7 +111,7 @@ extern unsigned long vectors_base;
#define MODULES_VADDR PAGE_OFFSET
#define XIP_VIRT_ADDR(physaddr) (physaddr)
-#define FDT_VIRT_ADDR(physaddr) ((void *)(physaddr))
+#define FDT_VIRT_BASE(physbase) ((void *)(physbase))
#endif /* !CONFIG_MMU */
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 694aa6b4bd03..f90479d8b50c 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -1086,7 +1086,7 @@ void __init setup_arch(char **cmdline_p)
void *atags_vaddr = NULL;
if (__atags_pointer)
- atags_vaddr = FDT_VIRT_ADDR(__atags_pointer);
+ atags_vaddr = FDT_VIRT_BASE(__atags_pointer);
setup_processor();
if (atags_vaddr) {
--
2.25.1
On Sun, 9 May 2021 at 19:30, Florian Fainelli <[email protected]> wrote:
>
> Hi Greg, Sasha,
>
> These patches were not marked with a Fixes: tag but they do fix booting
> ARM 32-bit platforms that have specific FDT placement and would cause
> boot failures like these:
>
I don't have any objections to backporting these changes, but it would
be helpful if you could explain why this is a regression. Also, you'll
need to pull in the following patch as well
10fce53c0ef8 ARM: 9027/1: head.S: explicitly map DT even if it lives
in the first physical section
> [ 0.000000] 8<--- cut here ---
> [ 0.000000] Unable to handle kernel paging request at virtual address
> ffa14000
> [ 0.000000] pgd = (ptrval)
> [ 0.000000] [ffa14000] *pgd=80000040007003, *pmd=00000000
> [ 0.000000] Internal error: Oops: 206 [#1] SMP ARM
> [ 0.000000] Modules linked in:
> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.4.85-1.0 #1
> [ 0.000000] Hardware name: Broadcom STB (Flattened Device Tree)
> [ 0.000000] PC is at fdt_check_header+0xc/0x21c
> [ 0.000000] LR is at __unflatten_device_tree+0x7c/0x2f8
> [ 0.000000] pc : [<c0d30e44>] lr : [<c0a6c0fc>] psr: 600000d3
> [ 0.000000] sp : c1401eac ip : c1401ec8 fp : c1401ec4
> [ 0.000000] r10: 00000000 r9 : c150523c r8 : 00000000
> [ 0.000000] r7 : c124eab4 r6 : ffa14000 r5 : 00000000 r4 :
> c14ba920
> [ 0.000000] r3 : 00000000 r2 : c150523c r1 : 00000000 r0 :
> ffa14000
> [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM
> Segment user
> [ 0.000000] Control: 30c5383d Table: 40003000 DAC: fffffffd
> [ 0.000000] Process swapper (pid: 0, stack limit = 0x(ptrval))
> [ 0.000000] Stack: (0xc1401eac to 0xc1402000)
> [ 0.000000] 1ea0: c14ba920 00000000
> ffa14000 c1401ef4 c1401ec8
> [ 0.000000] 1ec0: c0a6c0fc c0d30e44 c124eab4 c124eab4 00000000
> c14ebfc0 c140e5b8 00000000
> [ 0.000000] 1ee0: 00000001 c126f5a0 c1401f14 c1401ef8 c1250064
> c0a6c08c 00000000 c1401f08
> [ 0.000000] 1f00: c022ddac c140ce80 c1401f9c c1401f18 c120506c
> c125002c 00000000 00000000
> [ 0.000000] 1f20: 00000000 00000000 ffffffff c1401f94 c1401f6c
> c1406308 3fffffff 00000001
> [ 0.000000] 1f40: 00000000 00000001 c1432b58 c14ca180 c1213ca4
> c1406308 c1406300 30c0387d
> [ 0.000000] 1f60: c1401f8c c1401f70 c028e0ec 00000000 c1401f94
> c1406308 c1406300 30c0387d
> [ 0.000000] 1f80: 00000000 7fa14000 420f1000 30c5387d c1401ff4
> c1401fa0 c1200c98 c120467c
> [ 0.000000] 1fa0: 00000000 00000000 00000000 00000000 00000000
> 00000000 00000000 c127fa44
> [ 0.000000] 1fc0: 00000000 00000000 00000000 c1200330 00000000
> 30c0387d ffffffff 7fa14000
> [ 0.000000] 1fe0: 420f1000 30c5387d 00000000 c1401ff8 00000000
> c1200c28 00000000 00000000
> [ 0.000000] Backtrace:
> [ 0.000000] [<c0d30e38>] (fdt_check_header) from [<c0a6c0fc>]
> (__unflatten_device_tree+0x7c/0x2f8)
> [ 0.000000] r6:ffa14000 r5:00000000 r4:c14ba920
> [ 0.000000] [<c0a6c080>] (__unflatten_device_tree) from [<c1250064>]
> (unflatten_device_tree+0x44/0x54)
> [ 0.000000] r10:c126f5a0 r9:00000001 r8:00000000 r7:c140e5b8
> r6:c14ebfc0 r5:00000000
> [ 0.000000] r4:c124eab4 r3:c124eab4
> [ 0.000000] [<c1250020>] (unflatten_device_tree) from [<c120506c>]
> (setup_arch+0x9fc/0xc84)
> [ 0.000000] r4:c140ce80
> [ 0.000000] [<c1204670>] (setup_arch) from [<c1200c98>]
> (start_kernel+0x7c/0x540)
> [ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:00000000
> r6:30c0387d r5:c1406300
> [ 0.000000] r4:c1406308
> [ 0.000000] [<c1200c1c>] (start_kernel) from [<00000000>] (0x0)
> [ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:ffffffff
> r6:30c0387d r5:00000000
> [ 0.000000] r4:c1200330
> [ 0.000000] Code: e89da800 e1a0c00d e92dd870 e24cb004 (e5d03000)
> [ 0.000000] random: get_random_bytes called from
> print_oops_end_marker+0x50/0x58 with crng_init=0
> [ 0.000000] ---[ end trace f34b4929828506c1 ]---
> [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle
> task!
> [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill
> the idle task! ]---
>
>
> Ard Biesheuvel (3):
> ARM: 9011/1: centralize phys-to-virt conversion of DT/ATAGS address
> ARM: 9012/1: move device tree mapping out of linear region
> ARM: 9020/1: mm: use correct section size macro to describe the FDT
> virtual address
>
> Documentation/arm/memory.rst | 7 ++++++-
> arch/arm/include/asm/fixmap.h | 2 +-
> arch/arm/include/asm/memory.h | 5 +++++
> arch/arm/include/asm/prom.h | 4 ++--
> arch/arm/kernel/atags.h | 4 ++--
> arch/arm/kernel/atags_parse.c | 6 +++---
> arch/arm/kernel/devtree.c | 6 +++---
> arch/arm/kernel/head.S | 5 ++---
> arch/arm/kernel/setup.c | 19 ++++++++++++++-----
> arch/arm/mm/init.c | 1 -
> arch/arm/mm/mmu.c | 20 ++++++++++++++------
> arch/arm/mm/pv-fixup-asm.S | 4 ++--
> 12 files changed, 54 insertions(+), 29 deletions(-)
>
> --
> 2.25.1
>
On 5/9/2021 12:17 PM, Ard Biesheuvel wrote:
> On Sun, 9 May 2021 at 19:30, Florian Fainelli <[email protected]> wrote:
>>
>> Hi Greg, Sasha,
>>
>> These patches were not marked with a Fixes: tag but they do fix booting
>> ARM 32-bit platforms that have specific FDT placement and would cause
>> boot failures like these:
>>
>
> I don't have any objections to backporting these changes, but it would
> be helpful if you could explain why this is a regression. Also, you'll
> need to pull in the following patch as well
This does not qualify as a regression in that it has never worked for
the specific platform that I have shown above until your 3 commits came
in and fixed that particular FDT placement. To me this qualifies as a
bug fix, and given that the 3 (now 4) commits applied without hunks, it
seems reasonable to me to back port those to stable.
>
> 10fce53c0ef8 ARM: 9027/1: head.S: explicitly map DT even if it lives
> in the first physical section
Thanks, I will add this and resubmit.
>
>
>> [ 0.000000] 8<--- cut here ---
>> [ 0.000000] Unable to handle kernel paging request at virtual address
>> ffa14000
>> [ 0.000000] pgd = (ptrval)
>> [ 0.000000] [ffa14000] *pgd=80000040007003, *pmd=00000000
>> [ 0.000000] Internal error: Oops: 206 [#1] SMP ARM
>> [ 0.000000] Modules linked in:
>> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.4.85-1.0 #1
>> [ 0.000000] Hardware name: Broadcom STB (Flattened Device Tree)
>> [ 0.000000] PC is at fdt_check_header+0xc/0x21c
>> [ 0.000000] LR is at __unflatten_device_tree+0x7c/0x2f8
>> [ 0.000000] pc : [<c0d30e44>] lr : [<c0a6c0fc>] psr: 600000d3
>> [ 0.000000] sp : c1401eac ip : c1401ec8 fp : c1401ec4
>> [ 0.000000] r10: 00000000 r9 : c150523c r8 : 00000000
>> [ 0.000000] r7 : c124eab4 r6 : ffa14000 r5 : 00000000 r4 :
>> c14ba920
>> [ 0.000000] r3 : 00000000 r2 : c150523c r1 : 00000000 r0 :
>> ffa14000
>> [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM
>> Segment user
>> [ 0.000000] Control: 30c5383d Table: 40003000 DAC: fffffffd
>> [ 0.000000] Process swapper (pid: 0, stack limit = 0x(ptrval))
>> [ 0.000000] Stack: (0xc1401eac to 0xc1402000)
>> [ 0.000000] 1ea0: c14ba920 00000000
>> ffa14000 c1401ef4 c1401ec8
>> [ 0.000000] 1ec0: c0a6c0fc c0d30e44 c124eab4 c124eab4 00000000
>> c14ebfc0 c140e5b8 00000000
>> [ 0.000000] 1ee0: 00000001 c126f5a0 c1401f14 c1401ef8 c1250064
>> c0a6c08c 00000000 c1401f08
>> [ 0.000000] 1f00: c022ddac c140ce80 c1401f9c c1401f18 c120506c
>> c125002c 00000000 00000000
>> [ 0.000000] 1f20: 00000000 00000000 ffffffff c1401f94 c1401f6c
>> c1406308 3fffffff 00000001
>> [ 0.000000] 1f40: 00000000 00000001 c1432b58 c14ca180 c1213ca4
>> c1406308 c1406300 30c0387d
>> [ 0.000000] 1f60: c1401f8c c1401f70 c028e0ec 00000000 c1401f94
>> c1406308 c1406300 30c0387d
>> [ 0.000000] 1f80: 00000000 7fa14000 420f1000 30c5387d c1401ff4
>> c1401fa0 c1200c98 c120467c
>> [ 0.000000] 1fa0: 00000000 00000000 00000000 00000000 00000000
>> 00000000 00000000 c127fa44
>> [ 0.000000] 1fc0: 00000000 00000000 00000000 c1200330 00000000
>> 30c0387d ffffffff 7fa14000
>> [ 0.000000] 1fe0: 420f1000 30c5387d 00000000 c1401ff8 00000000
>> c1200c28 00000000 00000000
>> [ 0.000000] Backtrace:
>> [ 0.000000] [<c0d30e38>] (fdt_check_header) from [<c0a6c0fc>]
>> (__unflatten_device_tree+0x7c/0x2f8)
>> [ 0.000000] r6:ffa14000 r5:00000000 r4:c14ba920
>> [ 0.000000] [<c0a6c080>] (__unflatten_device_tree) from [<c1250064>]
>> (unflatten_device_tree+0x44/0x54)
>> [ 0.000000] r10:c126f5a0 r9:00000001 r8:00000000 r7:c140e5b8
>> r6:c14ebfc0 r5:00000000
>> [ 0.000000] r4:c124eab4 r3:c124eab4
>> [ 0.000000] [<c1250020>] (unflatten_device_tree) from [<c120506c>]
>> (setup_arch+0x9fc/0xc84)
>> [ 0.000000] r4:c140ce80
>> [ 0.000000] [<c1204670>] (setup_arch) from [<c1200c98>]
>> (start_kernel+0x7c/0x540)
>> [ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:00000000
>> r6:30c0387d r5:c1406300
>> [ 0.000000] r4:c1406308
>> [ 0.000000] [<c1200c1c>] (start_kernel) from [<00000000>] (0x0)
>> [ 0.000000] r10:30c5387d r9:420f1000 r8:7fa14000 r7:ffffffff
>> r6:30c0387d r5:00000000
>> [ 0.000000] r4:c1200330
>> [ 0.000000] Code: e89da800 e1a0c00d e92dd870 e24cb004 (e5d03000)
>> [ 0.000000] random: get_random_bytes called from
>> print_oops_end_marker+0x50/0x58 with crng_init=0
>> [ 0.000000] ---[ end trace f34b4929828506c1 ]---
>> [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle
>> task!
>> [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill
>> the idle task! ]---
>>
>>
>> Ard Biesheuvel (3):
>> ARM: 9011/1: centralize phys-to-virt conversion of DT/ATAGS address
>> ARM: 9012/1: move device tree mapping out of linear region
>> ARM: 9020/1: mm: use correct section size macro to describe the FDT
>> virtual address
>>
>> Documentation/arm/memory.rst | 7 ++++++-
>> arch/arm/include/asm/fixmap.h | 2 +-
>> arch/arm/include/asm/memory.h | 5 +++++
>> arch/arm/include/asm/prom.h | 4 ++--
>> arch/arm/kernel/atags.h | 4 ++--
>> arch/arm/kernel/atags_parse.c | 6 +++---
>> arch/arm/kernel/devtree.c | 6 +++---
>> arch/arm/kernel/head.S | 5 ++---
>> arch/arm/kernel/setup.c | 19 ++++++++++++++-----
>> arch/arm/mm/init.c | 1 -
>> arch/arm/mm/mmu.c | 20 ++++++++++++++------
>> arch/arm/mm/pv-fixup-asm.S | 4 ++--
>> 12 files changed, 54 insertions(+), 29 deletions(-)
>>
>> --
>> 2.25.1
>>
--
Florian
On Sun, May 09, 2021 at 06:22:05PM -0700, Florian Fainelli wrote:
>
>
> On 5/9/2021 12:17 PM, Ard Biesheuvel wrote:
> > On Sun, 9 May 2021 at 19:30, Florian Fainelli <[email protected]> wrote:
> >>
> >> Hi Greg, Sasha,
> >>
> >> These patches were not marked with a Fixes: tag but they do fix booting
> >> ARM 32-bit platforms that have specific FDT placement and would cause
> >> boot failures like these:
> >>
> >
> > I don't have any objections to backporting these changes, but it would
> > be helpful if you could explain why this is a regression. Also, you'll
> > need to pull in the following patch as well
>
> This does not qualify as a regression in that it has never worked for
> the specific platform that I have shown above until your 3 commits came
> in and fixed that particular FDT placement. To me this qualifies as a
> bug fix, and given that the 3 (now 4) commits applied without hunks, it
> seems reasonable to me to back port those to stable.
As this isn't a regression, why not just use 5.12 on these platforms?
Why is 5.4 and 5.10 needed?
thanks,
greg k-h
On Mon, May 10, 2021 at 9:43 AM Greg Kroah-Hartman
<[email protected]> wrote:
> On Sun, May 09, 2021 at 06:22:05PM -0700, Florian Fainelli wrote:
> > This does not qualify as a regression in that it has never worked for
> > the specific platform that I have shown above until your 3 commits came
> > in and fixed that particular FDT placement. To me this qualifies as a
> > bug fix, and given that the 3 (now 4) commits applied without hunks, it
> > seems reasonable to me to back port those to stable.
>
> As this isn't a regression, why not just use 5.12 on these platforms?
> Why is 5.4 and 5.10 needed?
Actually I think it *is* a regression, but not a common one. The bug that
Ard is fixing can appear when the kernel grows over a certain size.
If a user compile in a new set of functionality and the kernel size
reach a tripping point so that the DTB ends up just outside the 1:1
lowmem map, disaster strikes.
This has been a long standing mysterious bug for people using
attached device trees.
Yours,
Linus Walleij
On Mon, May 10, 2021 at 11:37:01AM +0200, Linus Walleij wrote:
> On Mon, May 10, 2021 at 9:43 AM Greg Kroah-Hartman
> <[email protected]> wrote:
> > On Sun, May 09, 2021 at 06:22:05PM -0700, Florian Fainelli wrote:
>
> > > This does not qualify as a regression in that it has never worked for
> > > the specific platform that I have shown above until your 3 commits came
> > > in and fixed that particular FDT placement. To me this qualifies as a
> > > bug fix, and given that the 3 (now 4) commits applied without hunks, it
> > > seems reasonable to me to back port those to stable.
> >
> > As this isn't a regression, why not just use 5.12 on these platforms?
> > Why is 5.4 and 5.10 needed?
>
> Actually I think it *is* a regression, but not a common one. The bug that
> Ard is fixing can appear when the kernel grows over a certain size.
>
> If a user compile in a new set of functionality and the kernel size
> reach a tripping point so that the DTB ends up just outside the 1:1
> lowmem map, disaster strikes.
>
> This has been a long standing mysterious bug for people using
> attached device trees.
Ok, then feel free to ack them when they get resubmitted.
thanks,
greg k-h