This patch set is to add support for lpass sc7280 based targets.
Upadate compatible name and change of bulk clock voting to optional
clock voting in digital codecs va, rx, tx macro drivers.
Chnages Since V1:
-- Removed individual clock voting and used bulk clock optional.
-- Removed volatile changes and fixed default values.
-- Typo errors.
Srinivasa Rao Mandadapu (5):
ASoC: qcom: Add compatible names in va,wsa,rx,tx codec drivers for
sc7280
ASoC: qcom: dt-bindings: Add compatible names for lpass sc7280 digital
codecs
ASoC: codecs: tx-macro: Enable tx top soundwire mic clock
ASoC: codecs: tx-macro: Update tx default values
ASoC: codecs: Change bulk clock voting to optional voting in digital
codecs
.../devicetree/bindings/sound/qcom,lpass-rx-macro.yaml | 4 +++-
.../devicetree/bindings/sound/qcom,lpass-tx-macro.yaml | 4 +++-
.../devicetree/bindings/sound/qcom,lpass-va-macro.yaml | 4 +++-
.../devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml | 4 +++-
sound/soc/codecs/lpass-rx-macro.c | 3 ++-
sound/soc/codecs/lpass-tx-macro.c | 11 +++++++----
sound/soc/codecs/lpass-va-macro.c | 3 ++-
sound/soc/codecs/lpass-wsa-macro.c | 1 +
8 files changed, 24 insertions(+), 10 deletions(-)
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Enable tx path soundwire mic0 and mic1 clock.
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
---
sound/soc/codecs/lpass-tx-macro.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
index 5dcae73..e980b2e 100644
--- a/sound/soc/codecs/lpass-tx-macro.c
+++ b/sound/soc/codecs/lpass-tx-macro.c
@@ -1674,6 +1674,8 @@ static int tx_macro_component_probe(struct snd_soc_component *comp)
snd_soc_component_update_bits(comp, CDC_TX0_TX_PATH_SEC7, 0x3F,
0x0A);
+ snd_soc_component_update_bits(comp, CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0xFF, 0x00);
+ snd_soc_component_update_bits(comp, CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0xFF, 0x00);
return 0;
}
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Update compatible names in va, wsa, rx and tx macro codes for lpass sc7280
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
---
Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml | 4 +++-
Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml | 4 +++-
Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml | 4 +++-
Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml | 4 +++-
4 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml
index 443d556..bc762b3 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml
@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
- const: qcom,sm8250-lpass-rx-macro
+ enum:
+ - qcom,sc7280-lpass-rx-macro
+ - qcom,sm8250-lpass-rx-macro
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml
index 6b5ca02..74f5386 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml
@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
- const: qcom,sm8250-lpass-tx-macro
+ enum:
+ - qcom,sc7280-lpass-tx-macro
+ - qcom,sm8250-lpass-tx-macro
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml
index 679b49c..99f2c36 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml
@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
- const: qcom,sm8250-lpass-va-macro
+ enum:
+ - qcom,sc7280-lpass-va-macro
+ - qcom,sm8250-lpass-va-macro
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml
index 435b019..13cdb8a 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml
@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
- const: qcom,sm8250-lpass-wsa-macro
+ enum:
+ - qcom,sc7280-lpass-wsa-macro
+ - qcom,sm8250-lpass-wsa-macro
reg:
maxItems: 1
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Update mic control register default values to hardware reset values
Fixes: c39667ddcfc5 (ASoC: codecs: lpass-tx-macro: add support for lpass tx macro)
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
---
sound/soc/codecs/lpass-tx-macro.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
index e980b2e..66c39fb 100644
--- a/sound/soc/codecs/lpass-tx-macro.c
+++ b/sound/soc/codecs/lpass-tx-macro.c
@@ -279,7 +279,7 @@ static const struct reg_default tx_defaults[] = {
{ CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
{ CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
{ CDC_TX_TOP_CSR_ANC_CFG, 0x00},
- { CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
+ { CDC_TX_TOP_CSR_SWR_CTRL, 0x60},
{ CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
{ CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
{ CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
@@ -290,8 +290,8 @@ static const struct reg_default tx_defaults[] = {
{ CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
{ CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
{ CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
- { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
- { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
+ { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x0E},
+ { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x0E},
{ CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
{ CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
{ CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Change bulk clock frequency voting to optional bulk voting in va, rx and tx macros
to accommodate both ADSP and ADSP bypass based lpass architectures.
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
---
sound/soc/codecs/lpass-rx-macro.c | 2 +-
sound/soc/codecs/lpass-tx-macro.c | 2 +-
sound/soc/codecs/lpass-va-macro.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
index c2b9333..2bed5cf 100644
--- a/sound/soc/codecs/lpass-rx-macro.c
+++ b/sound/soc/codecs/lpass-rx-macro.c
@@ -3531,7 +3531,7 @@ static int rx_macro_probe(struct platform_device *pdev)
rx->clks[3].id = "npl";
rx->clks[4].id = "fsgen";
- ret = devm_clk_bulk_get(dev, RX_NUM_CLKS_MAX, rx->clks);
+ ret = devm_clk_bulk_get_optional(dev, RX_NUM_CLKS_MAX, rx->clks);
if (ret) {
dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
return ret;
diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
index 66c39fb..c288471 100644
--- a/sound/soc/codecs/lpass-tx-macro.c
+++ b/sound/soc/codecs/lpass-tx-macro.c
@@ -1794,7 +1794,7 @@ static int tx_macro_probe(struct platform_device *pdev)
tx->clks[3].id = "npl";
tx->clks[4].id = "fsgen";
- ret = devm_clk_bulk_get(dev, TX_NUM_CLKS_MAX, tx->clks);
+ ret = devm_clk_bulk_get_optional(dev, TX_NUM_CLKS_MAX, tx->clks);
if (ret) {
dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
return ret;
diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
index 70f09b4..11147e3 100644
--- a/sound/soc/codecs/lpass-va-macro.c
+++ b/sound/soc/codecs/lpass-va-macro.c
@@ -1408,7 +1408,7 @@ static int va_macro_probe(struct platform_device *pdev)
va->clks[1].id = "dcodec";
va->clks[2].id = "mclk";
- ret = devm_clk_bulk_get(dev, VA_NUM_CLKS_MAX, va->clks);
+ ret = devm_clk_bulk_get_optional(dev, VA_NUM_CLKS_MAX, va->clks);
if (ret) {
dev_err(dev, "Error getting VA Clocks (%d)\n", ret);
return ret;
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
> Update mic control register default values to hardware reset values
>
> Fixes: c39667ddcfc5 (ASoC: codecs: lpass-tx-macro: add support for lpass tx macro)
>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> ---
> sound/soc/codecs/lpass-tx-macro.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
> index e980b2e..66c39fb 100644
> --- a/sound/soc/codecs/lpass-tx-macro.c
> +++ b/sound/soc/codecs/lpass-tx-macro.c
> @@ -279,7 +279,7 @@ static const struct reg_default tx_defaults[] = {
> { CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
> { CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
> { CDC_TX_TOP_CSR_ANC_CFG, 0x00},
> - { CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
> + { CDC_TX_TOP_CSR_SWR_CTRL, 0x60},
This does not make sense as this register only has one bit to control.
Why do we even need to change this, can you please explain what happens
if we do not change this?
> { CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
> { CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
> { CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
> @@ -290,8 +290,8 @@ static const struct reg_default tx_defaults[] = {
> { CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
> { CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
> { CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
> - { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
> - { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
> + { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x0E},
> + { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x0E},
These two registers should have default value of 0x06 as this has only
one clk selection field with bits 2:1.
-srini
> { CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
> { CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
> { CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
>
On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
> Change bulk clock frequency voting to optional bulk voting in va, rx and tx macros
> to accommodate both ADSP and ADSP bypass based lpass architectures.
>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> ---
Reviwed-by: Srinivas Kandagatla <[email protected]>
> sound/soc/codecs/lpass-rx-macro.c | 2 +-
> sound/soc/codecs/lpass-tx-macro.c | 2 +-
> sound/soc/codecs/lpass-va-macro.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
> index c2b9333..2bed5cf 100644
> --- a/sound/soc/codecs/lpass-rx-macro.c
> +++ b/sound/soc/codecs/lpass-rx-macro.c
> @@ -3531,7 +3531,7 @@ static int rx_macro_probe(struct platform_device *pdev)
> rx->clks[3].id = "npl";
> rx->clks[4].id = "fsgen";
>
> - ret = devm_clk_bulk_get(dev, RX_NUM_CLKS_MAX, rx->clks);
> + ret = devm_clk_bulk_get_optional(dev, RX_NUM_CLKS_MAX, rx->clks);
> if (ret) {
> dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
> return ret;
> diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
> index 66c39fb..c288471 100644
> --- a/sound/soc/codecs/lpass-tx-macro.c
> +++ b/sound/soc/codecs/lpass-tx-macro.c
> @@ -1794,7 +1794,7 @@ static int tx_macro_probe(struct platform_device *pdev)
> tx->clks[3].id = "npl";
> tx->clks[4].id = "fsgen";
>
> - ret = devm_clk_bulk_get(dev, TX_NUM_CLKS_MAX, tx->clks);
> + ret = devm_clk_bulk_get_optional(dev, TX_NUM_CLKS_MAX, tx->clks);
> if (ret) {
> dev_err(dev, "Error getting RX Clocks (%d)\n", ret);
> return ret;
> diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
> index 70f09b4..11147e3 100644
> --- a/sound/soc/codecs/lpass-va-macro.c
> +++ b/sound/soc/codecs/lpass-va-macro.c
> @@ -1408,7 +1408,7 @@ static int va_macro_probe(struct platform_device *pdev)
> va->clks[1].id = "dcodec";
> va->clks[2].id = "mclk";
>
> - ret = devm_clk_bulk_get(dev, VA_NUM_CLKS_MAX, va->clks);
> + ret = devm_clk_bulk_get_optional(dev, VA_NUM_CLKS_MAX, va->clks);
> if (ret) {
> dev_err(dev, "Error getting VA Clocks (%d)\n", ret);
> return ret;
>
On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
> Enable tx path soundwire mic0 and mic1 clock.
>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> ---
> sound/soc/codecs/lpass-tx-macro.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
> index 5dcae73..e980b2e 100644
> --- a/sound/soc/codecs/lpass-tx-macro.c
> +++ b/sound/soc/codecs/lpass-tx-macro.c
> @@ -1674,6 +1674,8 @@ static int tx_macro_component_probe(struct snd_soc_component *comp)
>
> snd_soc_component_update_bits(comp, CDC_TX0_TX_PATH_SEC7, 0x3F,
> 0x0A);
> + snd_soc_component_update_bits(comp, CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0xFF, 0x00);
> + snd_soc_component_update_bits(comp, CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0xFF, 0x00);
This needs a comment for more clarity to readers.
--srini
>
> return 0;
> }
>
On 9/27/2021 5:51 PM, Srinivas Kandagatla wrote:
>
>
Thanks Srini for You time!!!
> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>> Enable tx path soundwire mic0 and mic1 clock.
>>
>> Signed-off-by: Venkata Prasad Potturu <[email protected]>
>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>> ---
>> sound/soc/codecs/lpass-tx-macro.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>> b/sound/soc/codecs/lpass-tx-macro.c
>> index 5dcae73..e980b2e 100644
>> --- a/sound/soc/codecs/lpass-tx-macro.c
>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>> @@ -1674,6 +1674,8 @@ static int tx_macro_component_probe(struct
>> snd_soc_component *comp)
>> snd_soc_component_update_bits(comp, CDC_TX0_TX_PATH_SEC7, 0x3F,
>> 0x0A);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0xFF, 0x00);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0xFF, 0x00);
>
> This needs a comment for more clarity to readers.
>
> --srini
>> return 0;
>> }
>>
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
On 9/27/2021 5:51 PM, Srinivas Kandagatla wrote:
>
>
Thanks for your time Srini!!!
> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>> Enable tx path soundwire mic0 and mic1 clock.
>>
>> Signed-off-by: Venkata Prasad Potturu <[email protected]>
>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>> ---
>> sound/soc/codecs/lpass-tx-macro.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>> b/sound/soc/codecs/lpass-tx-macro.c
>> index 5dcae73..e980b2e 100644
>> --- a/sound/soc/codecs/lpass-tx-macro.c
>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>> @@ -1674,6 +1674,8 @@ static int tx_macro_component_probe(struct
>> snd_soc_component *comp)
>> snd_soc_component_update_bits(comp, CDC_TX0_TX_PATH_SEC7, 0x3F,
>> 0x0A);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0xFF, 0x00);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0xFF, 0x00);
>
> This needs a comment for more clarity to readers.
Okay! Will add comment and resend it.
>
> --srini
>> return 0;
>> }
>>
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
On Wed, 22 Sep 2021 18:01:15 +0530, Srinivasa Rao Mandadapu wrote:
> Update compatible names in va, wsa, rx and tx macro codes for lpass sc7280
>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> ---
> Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml | 4 +++-
> Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml | 4 +++-
> Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml | 4 +++-
> Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml | 4 +++-
> 4 files changed, 12 insertions(+), 4 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On 27/09/2021 17:42, Srinivasa Rao Mandadapu wrote:
>
> On 9/27/2021 4:12 PM, Srinivas Kandagatla wrote:
> Thanks for your time Srini!!
>>
>> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>>> Update mic control register default values to hardware reset values
>>>
>>> Fixes: c39667ddcfc5 (ASoC: codecs: lpass-tx-macro: add support for
>>> lpass tx macro)
>>>
>>> Signed-off-by: Venkata Prasad Potturu <[email protected]>
>>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>>> ---
>>> sound/soc/codecs/lpass-tx-macro.c | 6 +++---
>>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>>> b/sound/soc/codecs/lpass-tx-macro.c
>>> index e980b2e..66c39fb 100644
>>> --- a/sound/soc/codecs/lpass-tx-macro.c
>>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>>> @@ -279,7 +279,7 @@ static const struct reg_default tx_defaults[] = {
>>> { CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
>>> { CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
>>> { CDC_TX_TOP_CSR_ANC_CFG, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
>>> + { CDC_TX_TOP_CSR_SWR_CTRL, 0x60},
>>
>> This does not make sense as this register only has one bit to control.
>> Why do we even need to change this, can you please explain what
>> happens if we do not change this?
>
> This register change is not making any impact. But when verified , reset
> state of this register is 0x60. so is the reason for change.
>
> Will revert it and post again.
>
>>
>>> { CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
>>> { CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
>>> { CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
>>> @@ -290,8 +290,8 @@ static const struct reg_default tx_defaults[] = {
>>> { CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
>>> { CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
>>> { CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
>>> - { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
>>> + { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x0E},
>>> + { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x0E},
>>
>> These two registers should have default value of 0x06 as this has only
>> one clk selection field with bits 2:1.
>
> In Kodiak document reset state 0x0E and clk selection field is with bits 3:1
>
> *LPASS_TX_TX_TOP_CSR_SWR_MIC1_CTL*|0x32200D4
> Offset: 0x54 Reset State: 0x0000000E
In that case you should probably consider using regmap_register_patch()
for corrections to the default registers in sm8250 case.
--srini
>
>>
>> -srini
>>
>>
>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
>>> { CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
>>>
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
> is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
>
On 9/28/2021 2:01 PM, Srinivas Kandagatla wrote:
>
>
> On 27/09/2021 17:42, Srinivasa Rao Mandadapu wrote:
>>
>> On 9/27/2021 4:12 PM, Srinivas Kandagatla wrote:
>> Thanks for your time Srini!!
>>>
>>> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>>>> Update mic control register default values to hardware reset values
>>>>
>>>> Fixes: c39667ddcfc5 (ASoC: codecs: lpass-tx-macro: add support for
>>>> lpass tx macro)
>>>>
>>>> Signed-off-by: Venkata Prasad Potturu <[email protected]>
>>>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>>>> ---
>>>> sound/soc/codecs/lpass-tx-macro.c | 6 +++---
>>>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>>>> b/sound/soc/codecs/lpass-tx-macro.c
>>>> index e980b2e..66c39fb 100644
>>>> --- a/sound/soc/codecs/lpass-tx-macro.c
>>>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>>>> @@ -279,7 +279,7 @@ static const struct reg_default tx_defaults[] = {
>>>> { CDC_TX_CLK_RST_CTRL_SWR_CONTROL, 0x00},
>>>> { CDC_TX_TOP_CSR_TOP_CFG0, 0x00},
>>>> { CDC_TX_TOP_CSR_ANC_CFG, 0x00},
>>>> - { CDC_TX_TOP_CSR_SWR_CTRL, 0x00},
>>>> + { CDC_TX_TOP_CSR_SWR_CTRL, 0x60},
>>>
>>> This does not make sense as this register only has one bit to control.
>>> Why do we even need to change this, can you please explain what
>>> happens if we do not change this?
>>
>> This register change is not making any impact. But when verified ,
>> reset state of this register is 0x60. so is the reason for change.
>>
>> Will revert it and post again.
>>
>>>
>>>> { CDC_TX_TOP_CSR_FREQ_MCLK, 0x00},
>>>> { CDC_TX_TOP_CSR_DEBUG_BUS, 0x00},
>>>> { CDC_TX_TOP_CSR_DEBUG_EN, 0x00},
>>>> @@ -290,8 +290,8 @@ static const struct reg_default tx_defaults[] = {
>>>> { CDC_TX_TOP_CSR_SWR_DMIC1_CTL, 0x00},
>>>> { CDC_TX_TOP_CSR_SWR_DMIC2_CTL, 0x00},
>>>> { CDC_TX_TOP_CSR_SWR_DMIC3_CTL, 0x00},
>>>> - { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x00},
>>>> - { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x00},
>>>> + { CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0x0E},
>>>> + { CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0x0E},
>>>
>>> These two registers should have default value of 0x06 as this has
>>> only one clk selection field with bits 2:1.
>>
>> In Kodiak document reset state 0x0E and clk selection field is with
>> bits 3:1
>>
>> *LPASS_TX_TX_TOP_CSR_SWR_MIC1_CTL*|0x32200D4
>> Offset: 0x54 Reset State: 0x0000000E
>
> In that case you should probably consider using
> regmap_register_patch() for corrections to the default registers in
> sm8250 case.
As regmap_register_patch() not working in this use case, updating
defaults in probe for sc7280 specific differences.
>
> --srini
>
>>
>>>
>>> -srini
>>>
>>>
>>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0x00},
>>>> { CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0x00},
>>>> { CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0x00},
>>>>
>> --
>> Qualcomm India Private Limited, on behalf of Qualcomm Innovation
>> Center, Inc.,
>> is a member of Code Aurora Forum, a Linux Foundation Collaborative
>> Project.
>>
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
On 9/27/2021 5:51 PM, Srinivas Kandagatla wrote:
>
>
> On 22/09/2021 13:31, Srinivasa Rao Mandadapu wrote:
>> Enable tx path soundwire mic0 and mic1 clock.
>>
>> Signed-off-by: Venkata Prasad Potturu <[email protected]>
>> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
>> ---
>> sound/soc/codecs/lpass-tx-macro.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/sound/soc/codecs/lpass-tx-macro.c
>> b/sound/soc/codecs/lpass-tx-macro.c
>> index 5dcae73..e980b2e 100644
>> --- a/sound/soc/codecs/lpass-tx-macro.c
>> +++ b/sound/soc/codecs/lpass-tx-macro.c
>> @@ -1674,6 +1674,8 @@ static int tx_macro_component_probe(struct
>> snd_soc_component *comp)
>> snd_soc_component_update_bits(comp, CDC_TX0_TX_PATH_SEC7, 0x3F,
>> 0x0A);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC0_CTL, 0xFF, 0x00);
>> + snd_soc_component_update_bits(comp,
>> CDC_TX_TOP_CSR_SWR_AMIC1_CTL, 0xFF, 0x00);
>
> This needs a comment for more clarity to readers.
Okay. will add comment.
>
> --srini
>> return 0;
>> }
>>
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
On Fri, Oct 08, 2021 at 07:37:12PM +0530, Srinivasa Rao Mandadapu wrote:
> On 9/28/2021 2:01 PM, Srinivas Kandagatla wrote:
> > In that case you should probably consider using regmap_register_patch()
> > for corrections to the default registers in sm8250 case.
> As regmap_register_patch() not working in this use case, updating defaults
> in probe for sc7280 specific differences.
In what way is regmap_register_patch() not working?