2021-12-02 22:38:09

by Thara Gopinath

[permalink] [raw]
Subject: [PATCH 0/3] Extend LMh driver to suppot Qualcomm sm8150 SoC.

Add support for sm8150 in the Qualcomm Limits Management Hardware(LMh)
driver. Also add required device tree entries and dt-binding.

Thara Gopinath (3):
thermal: qcom: lmh: Add support for sm8150
arm64: dts: qcom: sm8150: Add support for LMh node
dt-bindings: thermal: Add sm8150 compatible string for LMh

.../devicetree/bindings/thermal/qcom-lmh.yaml | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++
drivers/thermal/qcom/lmh.c | 61 ++++++++++---------
3 files changed, 57 insertions(+), 29 deletions(-)

--
2.25.1



2021-12-02 22:38:15

by Thara Gopinath

[permalink] [raw]
Subject: [PATCH 1/3] thermal: qcom: lmh: Add support for sm8150

Add compatible to support LMh for sm8150 SoC.
sm8150 does not require explicit enabling for various LMh subsystems.
Move this piece of code under condition that it is executed only
for sdm845 SoC.

Signed-off-by: Thara Gopinath <[email protected]>
---
drivers/thermal/qcom/lmh.c | 61 ++++++++++++++++++++------------------
1 file changed, 32 insertions(+), 29 deletions(-)

diff --git a/drivers/thermal/qcom/lmh.c b/drivers/thermal/qcom/lmh.c
index eafa7526eb8b..e390c3fd0272 100644
--- a/drivers/thermal/qcom/lmh.c
+++ b/drivers/thermal/qcom/lmh.c
@@ -138,35 +138,37 @@ static int lmh_probe(struct platform_device *pdev)
return -EINVAL;
}

- if (!qcom_scm_lmh_dcvsh_available())
- return -EINVAL;
-
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
- if (ret)
- dev_err(dev, "Error %d enabling current subfunction\n", ret);
-
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
- if (ret)
- dev_err(dev, "Error %d enabling reliability subfunction\n", ret);
-
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
- if (ret)
- dev_err(dev, "Error %d enabling BCL subfunction\n", ret);
-
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
- if (ret) {
- dev_err(dev, "Error %d enabling thermal subfunction\n", ret);
- return ret;
- }
-
- ret = qcom_scm_lmh_profile_change(0x1);
- if (ret) {
- dev_err(dev, "Error %d changing profile\n", ret);
- return ret;
+ if (of_device_is_compatible(np, "qcom,sdm845-lmh")) {
+ if (!qcom_scm_lmh_dcvsh_available())
+ return -EINVAL;
+
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1,
+ LMH_NODE_DCVS, node_id, 0);
+ if (ret)
+ dev_err(dev, "Error %d enabling current subfunction\n", ret);
+
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1,
+ LMH_NODE_DCVS, node_id, 0);
+ if (ret)
+ dev_err(dev, "Error %d enabling reliability subfunction\n", ret);
+
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1,
+ LMH_NODE_DCVS, node_id, 0);
+ if (ret)
+ dev_err(dev, "Error %d enabling BCL subfunction\n", ret);
+
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1,
+ LMH_NODE_DCVS, node_id, 0);
+ if (ret) {
+ dev_err(dev, "Error %d enabling thermal subfunction\n", ret);
+ return ret;
+ }
+
+ ret = qcom_scm_lmh_profile_change(0x1);
+ if (ret) {
+ dev_err(dev, "Error %d changing profile\n", ret);
+ return ret;
+ }
}

/* Set default thermal trips */
@@ -214,6 +216,7 @@ static int lmh_probe(struct platform_device *pdev)

static const struct of_device_id lmh_table[] = {
{ .compatible = "qcom,sdm845-lmh", },
+ { .compatible = "qcom,sm8150-lmh", },
{}
};
MODULE_DEVICE_TABLE(of, lmh_table);
--
2.25.1


2021-12-02 22:38:20

by Thara Gopinath

[permalink] [raw]
Subject: [PATCH 2/3] arm64: dts: qcom: sm8150: Add support for LMh node

Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC.

Signed-off-by: Thara Gopinath <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 81b4ff2cc4cd..e755d7ab78dd 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3650,6 +3650,30 @@ cpufreq_hw: cpufreq@18323000 {
#freq-domain-cells = <1>;
};

+ lmh_cluster1: lmh@18350800 {
+ compatible = "qcom,sm8150-lmh";
+ reg = <0 0x18350800 0 0x400>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ cpus = <&CPU4>;
+ qcom,lmh-temp-arm-millicelsius = <60000>;
+ qcom,lmh-temp-low-millicelsius = <84500>;
+ qcom,lmh-temp-high-millicelsius = <85000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ lmh_cluster0: lmh@18358800 {
+ compatible = "qcom,sm8150-lmh";
+ reg = <0 0x18358800 0 0x400>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ cpus = <&CPU0>;
+ qcom,lmh-temp-arm-millicelsius = <60000>;
+ qcom,lmh-temp-low-millicelsius = <84500>;
+ qcom,lmh-temp-high-millicelsius = <85000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
wifi: wifi@18800000 {
compatible = "qcom,wcn3990-wifi";
reg = <0 0x18800000 0 0x800000>;
--
2.25.1


2021-12-02 22:38:23

by Thara Gopinath

[permalink] [raw]
Subject: [PATCH 3/3] dt-bindings: thermal: Add sm8150 compatible string for LMh

Extend the LMh dt binding document to include compatible string
supporting sm8150 SoC.

Signed-off-by: Thara Gopinath <[email protected]>
---
Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
index 289e9a845600..a9b7388ca9ac 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
@@ -19,6 +19,7 @@ properties:
compatible:
enum:
- qcom,sdm845-lmh
+ - qcom,sm8150-lmh

reg:
items:
--
2.25.1


2021-12-04 13:34:51

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH 1/3] thermal: qcom: lmh: Add support for sm8150

Hi,

On 02.12.2021 23:38, Thara Gopinath wrote:
> Add compatible to support LMh for sm8150 SoC.
> sm8150 does not require explicit enabling for various LMh subsystems.
> Move this piece of code under condition that it is executed only
> for sdm845 SoC.
>
> Signed-off-by: Thara Gopinath <[email protected]>
> ---
> drivers/thermal/qcom/lmh.c | 61 ++++++++++++++++++++------------------
> 1 file changed, 32 insertions(+), 29 deletions(-)

[...]


> - return ret;
> + if (of_device_is_compatible(np, "qcom,sdm845-lmh")) {
> + if (!qcom_scm_lmh_dcvsh_available())
> + return -EINVAL;

I don't believe this is the correct approach, as different SoCs may

require different sequences of these writes (for example SDM660/MSM8998

seems to only enable the thermal algorithm), and there will (hopefully) be interest

in adding LMH support for more platforms, so perhaps separating this somehow

could keep this a bit cleaner and easier to work with for the next person..



Konrad


2021-12-06 14:22:28

by Thara Gopinath

[permalink] [raw]
Subject: Re: [PATCH 1/3] thermal: qcom: lmh: Add support for sm8150

Hi Konrad,

Thanks for the review.

On 12/4/21 8:34 AM, Konrad Dybcio wrote:
> Hi,
>
> On 02.12.2021 23:38, Thara Gopinath wrote:
>> Add compatible to support LMh for sm8150 SoC.
>> sm8150 does not require explicit enabling for various LMh subsystems.
>> Move this piece of code under condition that it is executed only
>> for sdm845 SoC.
>>
>> Signed-off-by: Thara Gopinath <[email protected]>
>> ---
>> drivers/thermal/qcom/lmh.c | 61 ++++++++++++++++++++------------------
>> 1 file changed, 32 insertions(+), 29 deletions(-)
>
> [...]
>
>
>> - return ret;
>> + if (of_device_is_compatible(np, "qcom,sdm845-lmh")) {
>> + if (!qcom_scm_lmh_dcvsh_available())
>> + return -EINVAL;
>
> I don't believe this is the correct approach, as different SoCs may
>
> require different sequences of these writes (for example SDM660/MSM8998
>
> seems to only enable the thermal algorithm), and there will (hopefully) be interest
>
> in adding LMH support for more platforms, so perhaps separating this somehow
>
> could keep this a bit cleaner and easier to work with for the next person..

I have not looked at SDM660/MSM8998. Are you telling me that these SoCs
don't enable the current and BCL portion of LMh. Maybe they have an
earlier version of Lmh which does not support all the features. The
right approach in this case will be to add a match table with flags for
init based on SoC. I can send v2, adding a match table with a flag to
specify whether to do the init sequence or not. Since I am not adding
the support for any other SoC at the moment, I cannot put in flags
separating out thermal , current and BCL init.

>
>
>
> Konrad
>

--
Warm Regards
Thara (She/Her/Hers)

2021-12-13 20:28:47

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH 3/3] dt-bindings: thermal: Add sm8150 compatible string for LMh

On Thu, 02 Dec 2021 17:38:02 -0500, Thara Gopinath wrote:
> Extend the LMh dt binding document to include compatible string
> supporting sm8150 SoC.
>
> Signed-off-by: Thara Gopinath <[email protected]>
> ---
> Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 +
> 1 file changed, 1 insertion(+)
>

Acked-by: Rob Herring <[email protected]>