2022-02-08 15:22:11

by Chester Lin

Subject: [RFC PATCH 1/3] dt-bindings: clock: Add s32g2 clock binding

Add clock binding for S32G based on SCMI Clock Management Protocol (0x14)

Signed-off-by: Chester Lin <[email protected]>
---
include/dt-bindings/clock/s32g2-clock.h | 28 +++++++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 include/dt-bindings/clock/s32g2-clock.h

diff --git a/include/dt-bindings/clock/s32g2-clock.h b/include/dt-bindings/clock/s32g2-clock.h
new file mode 100644
index 000000000000..6d8606293865
--- /dev/null
+++ b/include/dt-bindings/clock/s32g2-clock.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Copyright 2020-2022 NXP
+ */
+#ifndef __DT_BINDINGS_SCMI_CLOCK_S32G2_H
+#define __DT_BINDINGS_SCMI_CLOCK_S32G2_H
+
+#define S32G2_SCMI_CLK_BASE_ID 0U
+#define S32G2_SCMI_CLK(N) ((N) + S32G2_SCMI_CLK_BASE_ID)
+
+/* GMAC0 - SGMII */
+#define S32G2_SCMI_CLK_GMAC0_RX_SGMII S32G2_SCMI_CLK(16)
+#define S32G2_SCMI_CLK_GMAC0_TX_SGMII S32G2_SCMI_CLK(17)
+/* GMAC0 - RGMII */
+#define S32G2_SCMI_CLK_GMAC0_RX_RGMII S32G2_SCMI_CLK(19)
+#define S32G2_SCMI_CLK_GMAC0_TX_RGMII S32G2_SCMI_CLK(20)
+/* GMAC0 - RMII */
+#define S32G2_SCMI_CLK_GMAC0_RX_RMII S32G2_SCMI_CLK(22)
+#define S32G2_SCMI_CLK_GMAC0_TX_RMII S32G2_SCMI_CLK(23)
+/* GMAC0 - MII */
+#define S32G2_SCMI_CLK_GMAC0_RX_MII S32G2_SCMI_CLK(25)
+#define S32G2_SCMI_CLK_GMAC0_TX_MII S32G2_SCMI_CLK(26)
+#define S32G2_SCMI_CLK_GMAC0_AXI S32G2_SCMI_CLK(28)
+/* uSDHC */
+#define S32G2_SCMI_CLK_USDHC_AHB S32G2_SCMI_CLK(35)
+#define S32G2_SCMI_CLK_USDHC_MODULE S32G2_SCMI_CLK(36)
+#define S32G2_SCMI_CLK_USDHC_CORE S32G2_SCMI_CLK(37)
+#endif
--
2.33.1

2022-02-12 00:11:24

by Rob Herring (Arm)

Subject: Re: [RFC PATCH 1/3] dt-bindings: clock: Add s32g2 clock binding

On Mon, Feb 07, 2022 at 09:24:42PM +0800, Chester Lin wrote:
> Add clock binding for S32G based on SCMI Clock Management Protocol (0x14)
>
> Signed-off-by: Chester Lin <[email protected]>
> ---
> include/dt-bindings/clock/s32g2-clock.h | 28 +++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 include/dt-bindings/clock/s32g2-clock.h
>
> diff --git a/include/dt-bindings/clock/s32g2-clock.h b/include/dt-bindings/clock/s32g2-clock.h
> new file mode 100644
> index 000000000000..6d8606293865
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g2-clock.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */

Dual license please.

> +/*
> + * Copyright 2020-2022 NXP
> + */
> +#ifndef __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +#define __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +
> +#define S32G2_SCMI_CLK_BASE_ID 0U
> +#define S32G2_SCMI_CLK(N) ((N) + S32G2_SCMI_CLK_BASE_ID)
> +
> +/* GMAC0 - SGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_SGMII S32G2_SCMI_CLK(16)
> +#define S32G2_SCMI_CLK_GMAC0_TX_SGMII S32G2_SCMI_CLK(17)
> +/* GMAC0 - RGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RGMII S32G2_SCMI_CLK(19)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RGMII S32G2_SCMI_CLK(20)
> +/* GMAC0 - RMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RMII S32G2_SCMI_CLK(22)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RMII S32G2_SCMI_CLK(23)
> +/* GMAC0 - MII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_MII S32G2_SCMI_CLK(25)
> +#define S32G2_SCMI_CLK_GMAC0_TX_MII S32G2_SCMI_CLK(26)
> +#define S32G2_SCMI_CLK_GMAC0_AXI S32G2_SCMI_CLK(28)
> +/* uSDHC */
> +#define S32G2_SCMI_CLK_USDHC_AHB S32G2_SCMI_CLK(35)
> +#define S32G2_SCMI_CLK_USDHC_MODULE S32G2_SCMI_CLK(36)
> +#define S32G2_SCMI_CLK_USDHC_CORE S32G2_SCMI_CLK(37)
> +#endif
> --
> 2.33.1
>
>