2022-07-07 19:07:00

by Horatiu Vultur

[permalink] [raw]
Subject: [PATCH 0/2] pinctrl: ocelot: Add fixes for ocelot driver

The patch series fixes 2 issues with pincfg.
- first issue is that on lan966x uses different offsets than sparx5
so it can't use directly the ocelot_confops
- second issue is pincfg stop working when regmap support was addded.

Horatiu Vultur (2):
pinctrl: ocelot: Fix pincfg for lan966x
pinctrl: ocelot: Fix pincfg

drivers/pinctrl/pinctrl-ocelot.c | 222 +++++++++++++++++++------------
1 file changed, 138 insertions(+), 84 deletions(-)

--
2.33.0


2022-07-07 19:56:35

by Horatiu Vultur

[permalink] [raw]
Subject: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

The blamed commit changed to use regmaps instead of __iomem. But it
didn't update the register offsets to be at word offset, so it uses byte
offset.

Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
Signed-off-by: Horatiu Vultur <[email protected]>
---
drivers/pinctrl/pinctrl-ocelot.c | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index 6212abe2b66f..e84f2f82901f 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -303,6 +303,13 @@ static const char *const ocelot_function_names[] = {
[FUNC_RCVRD_CLK] = "rcvrd_clk",
};

+const struct regmap_config regmap_pincfg = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .name = "pincfg",
+};
+
struct ocelot_pmx_func {
const char **groups;
unsigned int ngroups;
@@ -1334,7 +1341,8 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
if (info->pincfg) {
u32 regcfg;

- ret = regmap_read(info->pincfg, pin, &regcfg);
+ ret = regmap_read(info->pincfg, pin * regmap_pincfg.reg_stride,
+ &regcfg);
if (ret)
return ret;

@@ -1368,14 +1376,16 @@ static int ocelot_pincfg_clrsetbits(struct ocelot_pinctrl *info, u32 regaddr,
u32 val;
int ret;

- ret = regmap_read(info->pincfg, regaddr, &val);
+ ret = regmap_read(info->pincfg, regaddr * regmap_pincfg.reg_stride,
+ &val);
if (ret)
return ret;

val &= ~clrbits;
val |= setbits;

- ret = regmap_write(info->pincfg, regaddr, val);
+ ret = regmap_write(info->pincfg, regaddr * regmap_pincfg.reg_stride,
+ val);

return ret;
}
@@ -1940,21 +1950,13 @@ static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
{
void __iomem *base;

- const struct regmap_config regmap_config = {
- .reg_bits = 32,
- .val_bits = 32,
- .reg_stride = 4,
- .max_register = 32,
- .name = "pincfg",
- };
-
- base = devm_platform_ioremap_resource(pdev, 1);
+ base = devm_platform_ioremap_resource(pdev, 1);
if (IS_ERR(base)) {
dev_dbg(&pdev->dev, "Failed to ioremap config registers (no extended pinconf)\n");
return NULL;
}

- return devm_regmap_init_mmio(&pdev->dev, base, &regmap_config);
+ return devm_regmap_init_mmio(&pdev->dev, base, &regmap_pincfg);
}

static int ocelot_pinctrl_probe(struct platform_device *pdev)
--
2.33.0

2022-07-08 00:41:23

by Colin Foster

[permalink] [raw]
Subject: Re: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

Hi Horatiu,

On Thu, Jul 07, 2022 at 08:53:42PM +0200, Horatiu Vultur wrote:
> The blamed commit changed to use regmaps instead of __iomem. But it
> didn't update the register offsets to be at word offset, so it uses byte
> offset.
>
> Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
> Signed-off-by: Horatiu Vultur <[email protected]>

Sorry about this one. It sounded familiar though:
https://patchwork.ozlabs.org/project/linux-gpio/patch/[email protected]/

The only takeaway from that was the use of regmap_get_reg_stride, which
was done in
commit baf927a833ca ("microchip-sgpio: Fix support for regmap")

And I see it is only for pincfg - which I don't have any hardware to
test that. Apologies again!

> ---
> drivers/pinctrl/pinctrl-ocelot.c | 28 +++++++++++++++-------------
> 1 file changed, 15 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
> index 6212abe2b66f..e84f2f82901f 100644
> --- a/drivers/pinctrl/pinctrl-ocelot.c
> +++ b/drivers/pinctrl/pinctrl-ocelot.c
> @@ -303,6 +303,13 @@ static const char *const ocelot_function_names[] = {
> [FUNC_RCVRD_CLK] = "rcvrd_clk",
> };
>
> +const struct regmap_config regmap_pincfg = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> + .name = "pincfg",
> +};
> +
> struct ocelot_pmx_func {
> const char **groups;
> unsigned int ngroups;
> @@ -1334,7 +1341,8 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
> if (info->pincfg) {
> u32 regcfg;
>
> - ret = regmap_read(info->pincfg, pin, &regcfg);
> + ret = regmap_read(info->pincfg, pin * regmap_pincfg.reg_stride,
> + &regcfg);
> if (ret)
> return ret;
>
> @@ -1368,14 +1376,16 @@ static int ocelot_pincfg_clrsetbits(struct ocelot_pinctrl *info, u32 regaddr,
> u32 val;
> int ret;
>
> - ret = regmap_read(info->pincfg, regaddr, &val);
> + ret = regmap_read(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> + &val);
> if (ret)
> return ret;
>
> val &= ~clrbits;
> val |= setbits;
>
> - ret = regmap_write(info->pincfg, regaddr, val);
> + ret = regmap_write(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> + val);
>
> return ret;
> }
> @@ -1940,21 +1950,13 @@ static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
> {
> void __iomem *base;
>
> - const struct regmap_config regmap_config = {
> - .reg_bits = 32,
> - .val_bits = 32,
> - .reg_stride = 4,
> - .max_register = 32,
> - .name = "pincfg",
> - };
> -
> - base = devm_platform_ioremap_resource(pdev, 1);
> + base = devm_platform_ioremap_resource(pdev, 1);
> if (IS_ERR(base)) {
> dev_dbg(&pdev->dev, "Failed to ioremap config registers (no extended pinconf)\n");
> return NULL;
> }
>
> - return devm_regmap_init_mmio(&pdev->dev, base, &regmap_config);
> + return devm_regmap_init_mmio(&pdev->dev, base, &regmap_pincfg);
> }
>
> static int ocelot_pinctrl_probe(struct platform_device *pdev)
> --
> 2.33.0
>

2022-07-08 02:34:32

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

Hi Horatiu,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on linus/master v5.19-rc5 next-20220707]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Horatiu-Vultur/pinctrl-ocelot-Add-fixes-for-ocelot-driver/20220708-025029
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
config: i386-randconfig-s001 (https://download.01.org/0day-ci/archive/20220708/[email protected]/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
# https://github.com/intel-lab-lkp/linux/commit/162d70439a9da8a7142091d2fe2690f92756e34b
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Horatiu-Vultur/pinctrl-ocelot-Add-fixes-for-ocelot-driver/20220708-025029
git checkout 162d70439a9da8a7142091d2fe2690f92756e34b
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash drivers/pinctrl/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <[email protected]>


sparse warnings: (new ones prefixed by >>)
>> drivers/pinctrl/pinctrl-ocelot.c:306:28: sparse: sparse: symbol 'regmap_pincfg' was not declared. Should it be static?

--
0-DAY CI Kernel Test Service
https://01.org/lkp

2022-07-08 06:44:17

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

Hi Horatiu,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on linus/master v5.19-rc5 next-20220707]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Horatiu-Vultur/pinctrl-ocelot-Add-fixes-for-ocelot-driver/20220708-025029
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
config: i386-randconfig-m021 (https://download.01.org/0day-ci/archive/20220708/[email protected]/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <[email protected]>

smatch warnings:
drivers/pinctrl/pinctrl-ocelot.c:1954 ocelot_pinctrl_create_pincfg() warn: inconsistent indenting

vim +1954 drivers/pinctrl/pinctrl-ocelot.c

ce8dc0943357a5 Alexandre Belloni 2018-01-06 1949
076d9e71bcf8a8 Colin Foster 2021-11-19 1950 static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
076d9e71bcf8a8 Colin Foster 2021-11-19 1951 {
076d9e71bcf8a8 Colin Foster 2021-11-19 1952 void __iomem *base;
076d9e71bcf8a8 Colin Foster 2021-11-19 1953
94ef32970d4076 Michael Walle 2022-02-16 @1954 base = devm_platform_ioremap_resource(pdev, 1);
076d9e71bcf8a8 Colin Foster 2021-11-19 1955 if (IS_ERR(base)) {
076d9e71bcf8a8 Colin Foster 2021-11-19 1956 dev_dbg(&pdev->dev, "Failed to ioremap config registers (no extended pinconf)\n");
076d9e71bcf8a8 Colin Foster 2021-11-19 1957 return NULL;
076d9e71bcf8a8 Colin Foster 2021-11-19 1958 }
076d9e71bcf8a8 Colin Foster 2021-11-19 1959
162d70439a9da8 Horatiu Vultur 2022-07-07 1960 return devm_regmap_init_mmio(&pdev->dev, base, &regmap_pincfg);
076d9e71bcf8a8 Colin Foster 2021-11-19 1961 }
076d9e71bcf8a8 Colin Foster 2021-11-19 1962

--
0-DAY CI Kernel Test Service
https://01.org/lkp

2022-07-08 19:54:26

by Horatiu Vultur

[permalink] [raw]
Subject: Re: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

The 07/07/2022 17:31, Colin Foster wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Hi Horatiu,

Hi Colin,

>
> On Thu, Jul 07, 2022 at 08:53:42PM +0200, Horatiu Vultur wrote:
> > The blamed commit changed to use regmaps instead of __iomem. But it
> > didn't update the register offsets to be at word offset, so it uses byte
> > offset.
> >
> > Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
> > Signed-off-by: Horatiu Vultur <[email protected]>
>
> Sorry about this one. It sounded familiar though:
> https://patchwork.ozlabs.org/project/linux-gpio/patch/[email protected]/
>
> The only takeaway from that was the use of regmap_get_reg_stride, which
> was done in
> commit baf927a833ca ("microchip-sgpio: Fix support for regmap")

That is correct. I will update this to use regmap_get_reg_stride.

>
> And I see it is only for pincfg - which I don't have any hardware to
> test that. Apologies again!

No worries.

>
> > ---
> > drivers/pinctrl/pinctrl-ocelot.c | 28 +++++++++++++++-------------
> > 1 file changed, 15 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
> > index 6212abe2b66f..e84f2f82901f 100644
> > --- a/drivers/pinctrl/pinctrl-ocelot.c
> > +++ b/drivers/pinctrl/pinctrl-ocelot.c
> > @@ -303,6 +303,13 @@ static const char *const ocelot_function_names[] = {
> > [FUNC_RCVRD_CLK] = "rcvrd_clk",
> > };
> >
> > +const struct regmap_config regmap_pincfg = {
> > + .reg_bits = 32,
> > + .val_bits = 32,
> > + .reg_stride = 4,
> > + .name = "pincfg",
> > +};
> > +
> > struct ocelot_pmx_func {
> > const char **groups;
> > unsigned int ngroups;
> > @@ -1334,7 +1341,8 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
> > if (info->pincfg) {
> > u32 regcfg;
> >
> > - ret = regmap_read(info->pincfg, pin, &regcfg);
> > + ret = regmap_read(info->pincfg, pin * regmap_pincfg.reg_stride,
> > + &regcfg);
> > if (ret)
> > return ret;
> >
> > @@ -1368,14 +1376,16 @@ static int ocelot_pincfg_clrsetbits(struct ocelot_pinctrl *info, u32 regaddr,
> > u32 val;
> > int ret;
> >
> > - ret = regmap_read(info->pincfg, regaddr, &val);
> > + ret = regmap_read(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> > + &val);
> > if (ret)
> > return ret;
> >
> > val &= ~clrbits;
> > val |= setbits;
> >
> > - ret = regmap_write(info->pincfg, regaddr, val);
> > + ret = regmap_write(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> > + val);
> >
> > return ret;
> > }
> > @@ -1940,21 +1950,13 @@ static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
> > {
> > void __iomem *base;
> >
> > - const struct regmap_config regmap_config = {
> > - .reg_bits = 32,
> > - .val_bits = 32,
> > - .reg_stride = 4,
> > - .max_register = 32,
> > - .name = "pincfg",
> > - };
> > -
> > - base = devm_platform_ioremap_resource(pdev, 1);
> > + base = devm_platform_ioremap_resource(pdev, 1);
> > if (IS_ERR(base)) {
> > dev_dbg(&pdev->dev, "Failed to ioremap config registers (no extended pinconf)\n");
> > return NULL;
> > }
> >
> > - return devm_regmap_init_mmio(&pdev->dev, base, &regmap_config);
> > + return devm_regmap_init_mmio(&pdev->dev, base, &regmap_pincfg);
> > }
> >
> > static int ocelot_pinctrl_probe(struct platform_device *pdev)
> > --
> > 2.33.0
> >

--
/Horatiu