2023-04-11 15:52:55

by William Breathitt Gray

[permalink] [raw]
Subject: [RESEND PATCH 4.14 v3 1/5] iio: counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: <[email protected]> # 4.14.x
Signed-off-by: William Breathitt Gray <[email protected]>
---
drivers/iio/counter/104-quad-8.c | 10 +---------
1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c
index 181585ae6..bdb07694e 100644
--- a/drivers/iio/counter/104-quad-8.c
+++ b/drivers/iio/counter/104-quad-8.c
@@ -64,9 +64,6 @@ static int quad8_read_raw(struct iio_dev *indio_dev,
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel;
- unsigned int flags;
- unsigned int borrow;
- unsigned int carry;
int i;

switch (mask) {
@@ -76,12 +73,7 @@ static int quad8_read_raw(struct iio_dev *indio_dev,
return IIO_VAL_INT;
}

- flags = inb(base_offset + 1);
- borrow = flags & BIT(0);
- carry = !!(flags & BIT(1));
-
- /* Borrow XOR Carry effectively doubles count range */
- *val = (borrow ^ carry) << 24;
+ *val = 0;

/* Reset Byte Pointer; transfer Counter to Output Latch */
outb(0x11, base_offset + 1);

base-commit: f03c8bbaf6d9cbebee390e8353c5df75293aff7c
--
2.39.2


2023-04-11 15:53:16

by William Breathitt Gray

[permalink] [raw]
Subject: [RESEND PATCH 4.19 v3 2/5] iio: counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: <[email protected]> # 4.19.x
Signed-off-by: William Breathitt Gray <[email protected]>
---
drivers/iio/counter/104-quad-8.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c
index 92be8d0f77..92e68cada8 100644
--- a/drivers/iio/counter/104-quad-8.c
+++ b/drivers/iio/counter/104-quad-8.c
@@ -61,10 +61,6 @@ struct quad8_iio {

#define QUAD8_REG_CHAN_OP 0x11
#define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
-/* Borrow Toggle flip-flop */
-#define QUAD8_FLAG_BT BIT(0)
-/* Carry Toggle flip-flop */
-#define QUAD8_FLAG_CT BIT(1)
/* Error flag */
#define QUAD8_FLAG_E BIT(4)
/* Up/Down flag */
@@ -97,9 +93,6 @@ static int quad8_read_raw(struct iio_dev *indio_dev,
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel;
- unsigned int flags;
- unsigned int borrow;
- unsigned int carry;
int i;

switch (mask) {
@@ -110,12 +103,7 @@ static int quad8_read_raw(struct iio_dev *indio_dev,
return IIO_VAL_INT;
}

- flags = inb(base_offset + 1);
- borrow = flags & QUAD8_FLAG_BT;
- carry = !!(flags & QUAD8_FLAG_CT);
-
- /* Borrow XOR Carry effectively doubles count range */
- *val = (borrow ^ carry) << 24;
+ *val = 0;

/* Reset Byte Pointer; transfer Counter to Output Latch */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,

base-commit: 5c0966408dee90137adf2e96f949e50a2ba7e401
--
2.39.2

2023-04-11 15:53:36

by William Breathitt Gray

[permalink] [raw]
Subject: [RESEND PATCH 5.10 v3 4/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: <[email protected]> # 5.10.x
Signed-off-by: William Breathitt Gray <[email protected]>
---
drivers/counter/104-quad-8.c | 18 +++---------------
1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index 21bb2bb767..1b4fdee9d9 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c
@@ -62,10 +62,6 @@ struct quad8_iio {
#define QUAD8_REG_CHAN_OP 0x11
#define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
#define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
-/* Borrow Toggle flip-flop */
-#define QUAD8_FLAG_BT BIT(0)
-/* Carry Toggle flip-flop */
-#define QUAD8_FLAG_CT BIT(1)
/* Error flag */
#define QUAD8_FLAG_E BIT(4)
/* Up/Down flag */
@@ -643,17 +639,9 @@ static int quad8_count_read(struct counter_device *counter,
{
struct quad8_iio *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
- unsigned int flags;
- unsigned int borrow;
- unsigned int carry;
int i;

- flags = inb(base_offset + 1);
- borrow = flags & QUAD8_FLAG_BT;
- carry = !!(flags & QUAD8_FLAG_CT);
-
- /* Borrow XOR Carry effectively doubles count range */
- *val = (unsigned long)(borrow ^ carry) << 24;
+ *val = 0;

mutex_lock(&priv->lock);

@@ -1198,8 +1186,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,

mutex_unlock(&priv->lock);

- /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
- return sprintf(buf, "33554431\n");
+ /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
+ return sprintf(buf, "16777215\n");
}

static ssize_t quad8_count_ceiling_write(struct counter_device *counter,

base-commit: 387078f9030cf336cd9fef521540db75b61615e0
--
2.39.2

2023-04-11 15:54:02

by William Breathitt Gray

[permalink] [raw]
Subject: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: <[email protected]> # 5.15.x
Signed-off-by: William Breathitt Gray <[email protected]>
---
drivers/counter/104-quad-8.c | 18 +++---------------
1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index 0caa60537b..643aae0c9f 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c
@@ -61,10 +61,6 @@ struct quad8 {
#define QUAD8_REG_CHAN_OP 0x11
#define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
#define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
-/* Borrow Toggle flip-flop */
-#define QUAD8_FLAG_BT BIT(0)
-/* Carry Toggle flip-flop */
-#define QUAD8_FLAG_CT BIT(1)
/* Error flag */
#define QUAD8_FLAG_E BIT(4)
/* Up/Down flag */
@@ -121,17 +117,9 @@ static int quad8_count_read(struct counter_device *counter,
{
struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
- unsigned int flags;
- unsigned int borrow;
- unsigned int carry;
int i;

- flags = inb(base_offset + 1);
- borrow = flags & QUAD8_FLAG_BT;
- carry = !!(flags & QUAD8_FLAG_CT);
-
- /* Borrow XOR Carry effectively doubles count range */
- *val = (unsigned long)(borrow ^ carry) << 24;
+ *val = 0;

mutex_lock(&priv->lock);

@@ -699,8 +687,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,

mutex_unlock(&priv->lock);

- /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
- return sprintf(buf, "33554431\n");
+ /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
+ return sprintf(buf, "16777215\n");
}

static ssize_t quad8_count_ceiling_write(struct counter_device *counter,

base-commit: d86dfc4d95cd218246b10ca7adf22c8626547599
--
2.39.2

2023-04-11 15:55:02

by William Breathitt Gray

[permalink] [raw]
Subject: [RESEND PATCH 5.4 v3 3/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: <[email protected]> # 5.4.x
Signed-off-by: William Breathitt Gray <[email protected]>
---
drivers/counter/104-quad-8.c | 20 +++-----------------
1 file changed, 3 insertions(+), 17 deletions(-)

diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index f261a57af1..48de69f58e 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c
@@ -57,10 +57,6 @@ struct quad8_iio {

#define QUAD8_REG_CHAN_OP 0x11
#define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
-/* Borrow Toggle flip-flop */
-#define QUAD8_FLAG_BT BIT(0)
-/* Carry Toggle flip-flop */
-#define QUAD8_FLAG_CT BIT(1)
/* Error flag */
#define QUAD8_FLAG_E BIT(4)
/* Up/Down flag */
@@ -639,19 +635,9 @@ static int quad8_count_read(struct counter_device *counter,
{
struct quad8_iio *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
- unsigned int flags;
- unsigned int borrow;
- unsigned int carry;
- unsigned long position;
+ unsigned long position = 0;
int i;

- flags = inb(base_offset + 1);
- borrow = flags & QUAD8_FLAG_BT;
- carry = !!(flags & QUAD8_FLAG_CT);
-
- /* Borrow XOR Carry effectively doubles count range */
- position = (unsigned long)(borrow ^ carry) << 24;
-
mutex_lock(&priv->lock);

/* Reset Byte Pointer; transfer Counter to Output Latch */
@@ -1204,8 +1190,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,

mutex_unlock(&priv->lock);

- /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
- return sprintf(buf, "33554431\n");
+ /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
+ return sprintf(buf, "16777215\n");
}

static ssize_t quad8_count_ceiling_write(struct counter_device *counter,

base-commit: 32bea3bac5ca484c6f7e302c8c96fc686f62e7b4
--
2.39.2

2023-04-17 14:00:20

by William Breathitt Gray

[permalink] [raw]
Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
>
> The Counter (CNTR) register is 24 bits wide, but we can have an
> effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> flag and Carry flag. The flags can be read from the FLAG register, but a
> race condition exists: the Borrow flag and Carry flag are instantaneous
> and could change by the time the count value is read from the CNTR
> register.
>
> Since the race condition could result in an incorrect 25-bit count
> value, remove support for 25-bit count values from this driver.
>
> Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
> Cc: <[email protected]> # 5.15.x
> Signed-off-by: William Breathitt Gray <[email protected]>
> ---
> drivers/counter/104-quad-8.c | 18 +++---------------
> 1 file changed, 3 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
> index 0caa60537b..643aae0c9f 100644
> --- a/drivers/counter/104-quad-8.c
> +++ b/drivers/counter/104-quad-8.c
> @@ -61,10 +61,6 @@ struct quad8 {
> #define QUAD8_REG_CHAN_OP 0x11
> #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
> #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
> -/* Borrow Toggle flip-flop */
> -#define QUAD8_FLAG_BT BIT(0)
> -/* Carry Toggle flip-flop */
> -#define QUAD8_FLAG_CT BIT(1)
> /* Error flag */
> #define QUAD8_FLAG_E BIT(4)
> /* Up/Down flag */
> @@ -121,17 +117,9 @@ static int quad8_count_read(struct counter_device *counter,
> {
> struct quad8 *const priv = counter->priv;
> const int base_offset = priv->base + 2 * count->id;
> - unsigned int flags;
> - unsigned int borrow;
> - unsigned int carry;
> int i;
>
> - flags = inb(base_offset + 1);
> - borrow = flags & QUAD8_FLAG_BT;
> - carry = !!(flags & QUAD8_FLAG_CT);
> -
> - /* Borrow XOR Carry effectively doubles count range */
> - *val = (unsigned long)(borrow ^ carry) << 24;
> + *val = 0;
>
> mutex_lock(&priv->lock);
>
> @@ -699,8 +687,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
>
> mutex_unlock(&priv->lock);
>
> - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
> - return sprintf(buf, "33554431\n");
> + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
> + return sprintf(buf, "16777215\n");
> }
>
> static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
>
> base-commit: d86dfc4d95cd218246b10ca7adf22c8626547599
> --
> 2.39.2

Greg,

This patch will no longer apply to 5.15.x when the "counter: Internalize
sysfs interface code" patch in the stable-queue tree is merged [0].
However, I believe the 6.1 backport [1] will apply instead at that
point. What is the best way to handle this situation? Should I resend
the 6.1 backport with the stable list Cc tag adjusted for 5.15.x, or are
you able to apply the 6.1 backport patch directly to the 5.15.x tree?

Thanks,

William Breathitt Gray

[0] https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git/tree/queue-5.15/counter-internalize-sysfs-interface-code.patch
[1] https://lore.kernel.org/all/[email protected]/


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2023-04-18 09:46:37

by Greg Kroah-Hartman

[permalink] [raw]
Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

On Mon, Apr 17, 2023 at 09:40:52AM -0400, William Breathitt Gray wrote:
> On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> >
> > The Counter (CNTR) register is 24 bits wide, but we can have an
> > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > flag and Carry flag. The flags can be read from the FLAG register, but a
> > race condition exists: the Borrow flag and Carry flag are instantaneous
> > and could change by the time the count value is read from the CNTR
> > register.
> >
> > Since the race condition could result in an incorrect 25-bit count
> > value, remove support for 25-bit count values from this driver.
> >
> > Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
> > Cc: <[email protected]> # 5.15.x
> > Signed-off-by: William Breathitt Gray <[email protected]>
> > ---
> > drivers/counter/104-quad-8.c | 18 +++---------------
> > 1 file changed, 3 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
> > index 0caa60537b..643aae0c9f 100644
> > --- a/drivers/counter/104-quad-8.c
> > +++ b/drivers/counter/104-quad-8.c
> > @@ -61,10 +61,6 @@ struct quad8 {
> > #define QUAD8_REG_CHAN_OP 0x11
> > #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
> > #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
> > -/* Borrow Toggle flip-flop */
> > -#define QUAD8_FLAG_BT BIT(0)
> > -/* Carry Toggle flip-flop */
> > -#define QUAD8_FLAG_CT BIT(1)
> > /* Error flag */
> > #define QUAD8_FLAG_E BIT(4)
> > /* Up/Down flag */
> > @@ -121,17 +117,9 @@ static int quad8_count_read(struct counter_device *counter,
> > {
> > struct quad8 *const priv = counter->priv;
> > const int base_offset = priv->base + 2 * count->id;
> > - unsigned int flags;
> > - unsigned int borrow;
> > - unsigned int carry;
> > int i;
> >
> > - flags = inb(base_offset + 1);
> > - borrow = flags & QUAD8_FLAG_BT;
> > - carry = !!(flags & QUAD8_FLAG_CT);
> > -
> > - /* Borrow XOR Carry effectively doubles count range */
> > - *val = (unsigned long)(borrow ^ carry) << 24;
> > + *val = 0;
> >
> > mutex_lock(&priv->lock);
> >
> > @@ -699,8 +687,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
> >
> > mutex_unlock(&priv->lock);
> >
> > - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
> > - return sprintf(buf, "33554431\n");
> > + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
> > + return sprintf(buf, "16777215\n");
> > }
> >
> > static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
> >
> > base-commit: d86dfc4d95cd218246b10ca7adf22c8626547599
> > --
> > 2.39.2
>
> Greg,
>
> This patch will no longer apply to 5.15.x when the "counter: Internalize
> sysfs interface code" patch in the stable-queue tree is merged [0].
> However, I believe the 6.1 backport [1] will apply instead at that
> point. What is the best way to handle this situation? Should I resend
> the 6.1 backport with the stable list Cc tag adjusted for 5.15.x, or are
> you able to apply the 6.1 backport patch directly to the 5.15.x tree?

The 6.1.y backport didn't apply either :(

Can you resend all of these rebased against the next round of stable
releases when they are released later this week?

thanks,

greg k-h

2023-04-18 10:14:41

by William Breathitt Gray

[permalink] [raw]
Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

On Tue, Apr 18, 2023 at 11:41:29AM +0200, Greg Kroah-Hartman wrote:
> On Mon, Apr 17, 2023 at 09:40:52AM -0400, William Breathitt Gray wrote:
> > On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> > >
> > > The Counter (CNTR) register is 24 bits wide, but we can have an
> > > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > > flag and Carry flag. The flags can be read from the FLAG register, but a
> > > race condition exists: the Borrow flag and Carry flag are instantaneous
> > > and could change by the time the count value is read from the CNTR
> > > register.
> > >
> > > Since the race condition could result in an incorrect 25-bit count
> > > value, remove support for 25-bit count values from this driver.
> > >
> > > Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
> > > Cc: <[email protected]> # 5.15.x
> > > Signed-off-by: William Breathitt Gray <[email protected]>
> > > ---
> > > drivers/counter/104-quad-8.c | 18 +++---------------
> > > 1 file changed, 3 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
> > > index 0caa60537b..643aae0c9f 100644
> > > --- a/drivers/counter/104-quad-8.c
> > > +++ b/drivers/counter/104-quad-8.c
> > > @@ -61,10 +61,6 @@ struct quad8 {
> > > #define QUAD8_REG_CHAN_OP 0x11
> > > #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16
> > > #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17
> > > -/* Borrow Toggle flip-flop */
> > > -#define QUAD8_FLAG_BT BIT(0)
> > > -/* Carry Toggle flip-flop */
> > > -#define QUAD8_FLAG_CT BIT(1)
> > > /* Error flag */
> > > #define QUAD8_FLAG_E BIT(4)
> > > /* Up/Down flag */
> > > @@ -121,17 +117,9 @@ static int quad8_count_read(struct counter_device *counter,
> > > {
> > > struct quad8 *const priv = counter->priv;
> > > const int base_offset = priv->base + 2 * count->id;
> > > - unsigned int flags;
> > > - unsigned int borrow;
> > > - unsigned int carry;
> > > int i;
> > >
> > > - flags = inb(base_offset + 1);
> > > - borrow = flags & QUAD8_FLAG_BT;
> > > - carry = !!(flags & QUAD8_FLAG_CT);
> > > -
> > > - /* Borrow XOR Carry effectively doubles count range */
> > > - *val = (unsigned long)(borrow ^ carry) << 24;
> > > + *val = 0;
> > >
> > > mutex_lock(&priv->lock);
> > >
> > > @@ -699,8 +687,8 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
> > >
> > > mutex_unlock(&priv->lock);
> > >
> > > - /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
> > > - return sprintf(buf, "33554431\n");
> > > + /* By default 0xFFFFFF (24 bits unsigned) is maximum count */
> > > + return sprintf(buf, "16777215\n");
> > > }
> > >
> > > static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
> > >
> > > base-commit: d86dfc4d95cd218246b10ca7adf22c8626547599
> > > --
> > > 2.39.2
> >
> > Greg,
> >
> > This patch will no longer apply to 5.15.x when the "counter: Internalize
> > sysfs interface code" patch in the stable-queue tree is merged [0].
> > However, I believe the 6.1 backport [1] will apply instead at that
> > point. What is the best way to handle this situation? Should I resend
> > the 6.1 backport with the stable list Cc tag adjusted for 5.15.x, or are
> > you able to apply the 6.1 backport patch directly to the 5.15.x tree?
>
> The 6.1.y backport didn't apply either :(
>
> Can you resend all of these rebased against the next round of stable
> releases when they are released later this week?
>
> thanks,
>
> greg k-h

Sure, I'll rebase and resend these after the next round of stable
releases is available.

William Breathitt Gray


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2023-05-02 08:21:24

by Pavel Machek

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Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

Hi!

> On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> >
> > The Counter (CNTR) register is 24 bits wide, but we can have an
> > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > flag and Carry flag. The flags can be read from the FLAG register, but a
> > race condition exists: the Borrow flag and Carry flag are instantaneous
> > and could change by the time the count value is read from the CNTR
> > register.

> > Since the race condition could result in an incorrect 25-bit count
> > value, remove support for 25-bit count values from this driver.

I believe usual solution is to read the carry, read the counter, and
read the carry again. If old_carry = new_carry, we are pretty sure we
did not hit the race, and can use 25 bit value.

Best regards,
Pavel
--
People of Russia, stop Putin before his war on Ukraine escalates.


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2023-05-03 00:21:47

by William Breathitt Gray

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Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race condition between FLAG and CNTR reads

On Tue, May 02, 2023 at 10:19:07AM +0200, Pavel Machek wrote:
> Hi!
>
> > On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> > >
> > > The Counter (CNTR) register is 24 bits wide, but we can have an
> > > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > > flag and Carry flag. The flags can be read from the FLAG register, but a
> > > race condition exists: the Borrow flag and Carry flag are instantaneous
> > > and could change by the time the count value is read from the CNTR
> > > register.
>
> > > Since the race condition could result in an incorrect 25-bit count
> > > value, remove support for 25-bit count values from this driver.
>
> I believe usual solution is to read the carry, read the counter, and
> read the carry again. If old_carry = new_carry, we are pretty sure we
> did not hit the race, and can use 25 bit value.
>
> Best regards,
> Pavel
> --
> People of Russia, stop Putin before his war on Ukraine escalates.

That solution might work if the counter only increases, but if the
counter is straddling the zero threshold then the Carry bit will toggle
as the count overflows, underflows, and overflows again. For example:

* START
* Carry=0,Count=MAX
* > Counting up...
* Carry=1,Count=0
* DRIVER READS Carry=1
* > Counting down...
* Carry=1,Count=MAX
* > Counting up...
* Carry=0,Count=0
* > Counting up...
* Carry=0,Count=42
* DRIVER READS Count=42
* > Counting down...
* Carry=1,Count=MAX
* DRIVER READS Carry=1
* old_carry = new_carry
* FINAL COUNT: Carry=1,Count=42
* This was never a state the counter actually reported

Ultimately, the issue is that we have no way to get both Carry and Count
atomically from the device. As long as there's a race condition there,
we can't prevent possibly misinterpreting the Carry and Count values, so
we unfortunately cannot ensure that our 25-bit Count value is an actual
state the counter reported.

William Breathitt Gray


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