Continuation of:
https://lore.kernel.org/lkml/[email protected]/
I rolled back the versioning, as this has been remade from scratch.
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (5):
dt-bindings: display: panel: nt36523: Allow 'port' instead of 'ports'
dt-bindings: display: panel: nt36523: Add Lenovo J606F panel
drm/panel: nt36523: Add DCS backlight support
drm/panel: nt36523: Get orientation from OF
drm/panel: nt36523: Add Lenovo J606F panel
.../bindings/display/panel/novatek,nt36523.yaml | 31 +-
drivers/gpu/drm/panel/panel-novatek-nt36523.c | 573 ++++++++++++++++++++-
2 files changed, 594 insertions(+), 10 deletions(-)
---
base-commit: 7d8214bba44c1aa6a75921a09a691945d26a8d43
change-id: 20230412-topic-lenovopanel-0d3a057e3c23
Best regards,
--
Konrad Dybcio <[email protected]>
This chip supports controlling the backlight via DCS commands, on at
least some panels. Add support for doing so.
Note this may only concern the NT36523*W* variant. Nobody knows, really,
there's no docs.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/gpu/drm/panel/panel-novatek-nt36523.c | 67 +++++++++++++++++++++++++--
1 file changed, 64 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
index d30dbbfb67b1..3c81ec014eef 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
@@ -5,6 +5,7 @@
* Copyright (c) 2022, 2023 Jianhua Lu <[email protected]>
*/
+#include <linux/backlight.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
@@ -53,6 +54,7 @@ struct panel_desc {
int (*init_sequence)(struct panel_info *pinfo);
bool is_dual_dsi;
+ bool has_dcs_backlight;
};
static inline struct panel_info *to_panel_info(struct drm_panel *panel)
@@ -679,6 +681,58 @@ static const struct drm_panel_funcs nt36523_panel_funcs = {
.get_modes = nt36523_get_modes,
};
+static int nt36523_bl_update_status(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness = backlight_get_brightness(bl);
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+ if (ret < 0)
+ return ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return 0;
+}
+
+static int nt36523_bl_get_brightness(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness);
+ if (ret < 0)
+ return ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return brightness;
+}
+
+static const struct backlight_ops nt36523_bl_ops = {
+ .update_status = nt36523_bl_update_status,
+ .get_brightness = nt36523_bl_get_brightness,
+};
+
+static struct backlight_device *nt36523_create_backlight(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ const struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = 512,
+ .max_brightness = 4095,
+ };
+
+ return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
+ &nt36523_bl_ops, &props);
+}
+
static int nt36523_probe(struct mipi_dsi_device *dsi)
{
struct device *dev = &dsi->dev;
@@ -730,9 +784,16 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
mipi_dsi_set_drvdata(dsi, pinfo);
drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
- ret = drm_panel_of_backlight(&pinfo->panel);
- if (ret)
- return dev_err_probe(dev, ret, "failed to get backlight\n");
+ if (pinfo->desc->has_dcs_backlight) {
+ pinfo->panel.backlight = nt36523_create_backlight(dsi);
+ if (IS_ERR(pinfo->panel.backlight))
+ return dev_err_probe(dev, PTR_ERR(pinfo->panel.backlight),
+ "Failed to create backlight\n");
+ } else {
+ ret = drm_panel_of_backlight(&pinfo->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get backlight\n");
+ }
drm_panel_add(&pinfo->panel);
--
2.40.0
Some bright vendors mount their display panels upside down. Add the
required pieces to allow for accounting for that.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/gpu/drm/panel/panel-novatek-nt36523.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
index 3c81ec014eef..db4b4af13ec1 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
@@ -31,6 +31,7 @@ struct panel_info {
struct drm_panel panel;
struct mipi_dsi_device *dsi[2];
const struct panel_desc *desc;
+ enum drm_panel_orientation orientation;
struct gpio_desc *reset_gpio;
struct backlight_device *backlight;
@@ -674,11 +675,19 @@ static int nt36523_get_modes(struct drm_panel *panel,
return pinfo->desc->num_modes;
}
+static enum drm_panel_orientation nt36523_get_orientation(struct drm_panel *panel)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+
+ return pinfo->orientation;
+}
+
static const struct drm_panel_funcs nt36523_panel_funcs = {
.disable = nt36523_disable,
.prepare = nt36523_prepare,
.unprepare = nt36523_unprepare,
.get_modes = nt36523_get_modes,
+ .get_orientation = nt36523_get_orientation,
};
static int nt36523_bl_update_status(struct backlight_device *bl)
@@ -784,6 +793,12 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
mipi_dsi_set_drvdata(dsi, pinfo);
drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
+ ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation);
+ if (ret < 0) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
if (pinfo->desc->has_dcs_backlight) {
pinfo->panel.backlight = nt36523_create_backlight(dsi);
if (IS_ERR(pinfo->panel.backlight))
--
2.40.0
Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
video mode display. Add support for these panels.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/gpu/drm/panel/panel-novatek-nt36523.c | 491 ++++++++++++++++++++++++++
1 file changed, 491 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
index db4b4af13ec1..4bf9f8db26ba 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
@@ -13,6 +13,8 @@
#include <linux/of_graph.h>
#include <linux/regulator/consumer.h>
+#include <video/mipi_display.h>
+
#include <drm/drm_connector.h>
#include <drm/drm_crtc.h>
#include <drm/drm_mipi_dsi.h>
@@ -481,6 +483,456 @@ static int elish_csot_init_sequence(struct panel_info *pinfo)
return 0;
}
+static int j606f_boe_init_sequence(struct panel_info *pinfo)
+{
+ struct mipi_dsi_device *dsi = pinfo->dsi[0];
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0xd9);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x5a);
+ mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x63);
+ mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0x95, 0xeb);
+ mipi_dsi_dcs_write_seq(dsi, 0x96, 0xeb);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x6d, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0x75, 0xa2);
+ mipi_dsi_dcs_write_seq(dsi, 0x77, 0xb3);
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
+ 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
+ mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
+ 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
+ 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
+ mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
+ 0xfd, 0x03, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
+ 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
+ mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
+ 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
+ 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
+ mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
+ 0xfd, 0x03, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
+ 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
+ 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
+ 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
+ 0xfd, 0x03, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
+ 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
+ mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
+ 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
+ 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
+ 0xf5, 0x03, 0xf7);
+ mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
+ 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
+ mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
+ 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
+ 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
+ 0xf5, 0x03, 0xf7);
+ mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
+ 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
+ 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
+ mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
+ 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
+ 0xf5, 0x03, 0xf7);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x23);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x77);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0x03, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x1d);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x1d);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x07, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, 0x09, 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, 0x0a, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, 0x0b, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x0d);
+ mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0d);
+ mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, 0x10, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x1d);
+ mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x1d);
+ mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x0f);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, 0x21, 0x0e);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x0d);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x0d);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32);
+ mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
+
+ ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x9a);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set pixel format: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0x3b, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x42);
+ mipi_dsi_dcs_write_seq(dsi, 0x3f, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x43, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x47, 0x66);
+ mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x9a);
+ mipi_dsi_dcs_write_seq(dsi, 0x4b, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0x4c, 0x91);
+ mipi_dsi_dcs_write_seq(dsi, 0x4d, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x4e, 0x43);
+
+ ret = mipi_dsi_dcs_set_display_brightness(dsi, 18);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display brightness: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0x52, 0x34);
+ mipi_dsi_dcs_write_seq(dsi, 0x55, 0x82, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0x5a, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x5b, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x82);
+ mipi_dsi_dcs_write_seq(dsi, 0x7e, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x7f, 0x3c);
+ mipi_dsi_dcs_write_seq(dsi, 0x82, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x97, 0xc0);
+ mipi_dsi_dcs_write_seq(dsi, 0xb6,
+ 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05,
+ 0x05, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, 0x94, 0x5f);
+ mipi_dsi_dcs_write_seq(dsi, 0xd7, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, 0xda, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0xde, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xdc, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe0, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe2, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe4, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe6, 0xc4);
+ mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x88);
+ mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x88);
+ mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x90);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0x3f, 0xe0);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_VSYNC_TIMING, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_GET_SCANLINE, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0xba);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0xf1, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x6a, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0x70, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_START, 0xf3);
+ mipi_dsi_dcs_write_seq(dsi, 0xa3, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xa4, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xa5, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, 0xd6, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0xa1);
+ mipi_dsi_dcs_write_seq(dsi, 0x0a, 0xf2);
+ mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28);
+ mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50);
+ mipi_dsi_dcs_write_seq(dsi, 0x13, 0x51);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x65);
+ mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x17, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7b);
+ mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x1c, 0xbb);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7b);
+ mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x1e, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
+
+ ret = mipi_dsi_dcs_set_pixel_format(dsi, 0xc3);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set pixel format: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x78);
+ mipi_dsi_dcs_write_seq(dsi, 0x35, 0x16);
+ mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xc9, 0x82);
+ mipi_dsi_dcs_write_seq(dsi, 0xca, 0x4e);
+ mipi_dsi_dcs_write_seq(dsi, 0xcb, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_CONTINUE, 0x4c);
+ mipi_dsi_dcs_write_seq(dsi, 0xaa, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x27);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06);
+ mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, 0x59, 0x53);
+ mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x14);
+ mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x1d);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x64, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0x65, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x78, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x30);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2f);
+ mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08);
+ mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xf8);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0xe0);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x14, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x16, 0xc0);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0xf0);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+
+ ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x08);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set pixel format: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+
+ ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x5d);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set pixel format: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x5d);
+ mipi_dsi_dcs_write_seq(dsi, 0x4b, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44);
+ mipi_dsi_dcs_write_seq(dsi, 0x92, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xdc, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22);
+ mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe0, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x20, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x27, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x33, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x34, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x48, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x49, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x61, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, 0x62, 0x60);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31);
+ mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7f);
+ mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x0c);
+ mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7f);
+ mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x05);
+ mipi_dsi_dcs_write_seq(dsi, 0x32, 0x8d);
+
+ ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x75);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set pixel format: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x02);
+
+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set tear on: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x03, 0x5f, 0x1a, 0x04, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
+ usleep_range(10000, 11000);
+ mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
+
+ ret = mipi_dsi_dcs_set_display_brightness(dsi, 0);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display brightness: %d\n", ret);
+ return ret;
+ }
+
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x68, 0x05, 0x01);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
+ return ret;
+ }
+ msleep(100);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set display on: %d\n", ret);
+ return ret;
+ }
+ msleep(30);
+
+ return 0;
+}
+
static const struct drm_display_mode elish_boe_modes[] = {
{
/* There is only one 120 Hz timing, but it doesn't work perfectly, 104 Hz preferred */
@@ -511,6 +963,22 @@ static const struct drm_display_mode elish_csot_modes[] = {
},
};
+static const struct drm_display_mode j606f_boe_modes[] = {
+ {
+ .clock = (1200 + 58 + 2 + 60) * (2000 + 26 + 2 + 93) * 60 / 1000,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 58,
+ .hsync_end = 1200 + 58 + 2,
+ .htotal = 1200 + 58 + 2 + 60,
+ .vdisplay = 2000,
+ .vsync_start = 2000 + 26,
+ .vsync_end = 2000 + 26 + 2,
+ .vtotal = 2000 + 26 + 2 + 93,
+ .width_mm = 143,
+ .height_mm = 235,
+ },
+};
+
static const struct panel_desc elish_boe_desc = {
.modes = elish_boe_modes,
.num_modes = ARRAY_SIZE(elish_boe_modes),
@@ -547,6 +1015,25 @@ static const struct panel_desc elish_csot_desc = {
.is_dual_dsi = true,
};
+static const struct panel_desc j606f_boe_desc = {
+ .modes = j606f_boe_modes,
+ .num_modes = ARRAY_SIZE(j606f_boe_modes),
+ .dsi_info = {
+ .type = "J606F BOE",
+ .channel = 0,
+ .node = NULL,
+ },
+ .width_mm = 143,
+ .height_mm = 235,
+ .bpc = 8,
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
+ .init_sequence = j606f_boe_init_sequence,
+ .has_dcs_backlight = true,
+};
+
static void nt36523_reset(struct panel_info *pinfo)
{
gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
@@ -826,6 +1313,10 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
}
static const struct of_device_id nt36523_of_match[] = {
+ {
+ .compatible = "lenovo,j606f-boe-nt36523w",
+ .data = &j606f_boe_desc,
+ },
{
.compatible = "xiaomi,elish-boe-nt36523",
.data = &elish_boe_desc,
--
2.40.0
Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
video mode display. Document it and allow rotation while at it (Lenovo
mounted it upside down!).
Signed-off-by: Konrad Dybcio <[email protected]>
---
.../bindings/display/panel/novatek,nt36523.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml
index 38f4f986aef1..fda74d5bd89e 100644
--- a/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml
+++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml
@@ -19,11 +19,16 @@ allOf:
properties:
compatible:
- items:
- - enum:
- - xiaomi,elish-boe-nt36523
- - xiaomi,elish-csot-nt36523
- - const: novatek,nt36523
+ oneOf:
+ - items:
+ - enum:
+ - xiaomi,elish-boe-nt36523
+ - xiaomi,elish-csot-nt36523
+ - const: novatek,nt36523
+ - items:
+ - enum:
+ - lenovo,j606f-boe-nt36523w
+ - const: novatek,nt36523w
reset-gpios:
maxItems: 1
@@ -33,6 +38,7 @@ properties:
description: regulator that supplies the I/O voltage
reg: true
+ rotation: true
backlight: true
oneOf:
--
2.40.0
On Wed, Apr 12, 2023 at 09:46:01PM +0200, Konrad Dybcio wrote:
> Some bright vendors mount their display panels upside down. Add the
> required pieces to allow for accounting for that.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Reviewed-by: Jianhua Lu <[email protected]>
> ---
> drivers/gpu/drm/panel/panel-novatek-nt36523.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> index 3c81ec014eef..db4b4af13ec1 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> @@ -31,6 +31,7 @@ struct panel_info {
> struct drm_panel panel;
> struct mipi_dsi_device *dsi[2];
> const struct panel_desc *desc;
> + enum drm_panel_orientation orientation;
>
> struct gpio_desc *reset_gpio;
> struct backlight_device *backlight;
> @@ -674,11 +675,19 @@ static int nt36523_get_modes(struct drm_panel *panel,
> return pinfo->desc->num_modes;
> }
>
> +static enum drm_panel_orientation nt36523_get_orientation(struct drm_panel *panel)
> +{
> + struct panel_info *pinfo = to_panel_info(panel);
> +
> + return pinfo->orientation;
> +}
> +
> static const struct drm_panel_funcs nt36523_panel_funcs = {
> .disable = nt36523_disable,
> .prepare = nt36523_prepare,
> .unprepare = nt36523_unprepare,
> .get_modes = nt36523_get_modes,
> + .get_orientation = nt36523_get_orientation,
> };
>
> static int nt36523_bl_update_status(struct backlight_device *bl)
> @@ -784,6 +793,12 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
> mipi_dsi_set_drvdata(dsi, pinfo);
> drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
>
> + ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation);
> + if (ret < 0) {
> + dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
> + return ret;
> + }
> +
> if (pinfo->desc->has_dcs_backlight) {
> pinfo->panel.backlight = nt36523_create_backlight(dsi);
> if (IS_ERR(pinfo->panel.backlight))
>
> --
> 2.40.0
>
On Wed, Apr 12, 2023 at 09:46:00PM +0200, Konrad Dybcio wrote:
> This chip supports controlling the backlight via DCS commands, on at
> least some panels. Add support for doing so.
>
> Note this may only concern the NT36523*W* variant. Nobody knows, really,
> there's no docs.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> drivers/gpu/drm/panel/panel-novatek-nt36523.c | 67 +++++++++++++++++++++++++--
> 1 file changed, 64 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> index d30dbbfb67b1..3c81ec014eef 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> @@ -5,6 +5,7 @@
> * Copyright (c) 2022, 2023 Jianhua Lu <[email protected]>
> */
>
> +
[..]
> +static struct backlight_device *nt36523_create_backlight(struct mipi_dsi_device *dsi)
> +{
> + struct device *dev = &dsi->dev;
> + const struct backlight_properties props = {
> + .type = BACKLIGHT_RAW,
> + .brightness = 512,
> + .max_brightness = 4095,
Please set the missing scale property of backlight. Daniel said: "Unknown is never correct for
new drivers."
See https://lore.kernel.org/lkml/Y6SIWoVFX%[email protected]/
Otherwise,
Reviewed-by: Jianhua Lu <[email protected]>
> + };
> +
> + return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
> + &nt36523_bl_ops, &props);
> +}
> +
> static int nt36523_probe(struct mipi_dsi_device *dsi)
> {
> struct device *dev = &dsi->dev;
> @@ -730,9 +784,16 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
> mipi_dsi_set_drvdata(dsi, pinfo);
> drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
>
> - ret = drm_panel_of_backlight(&pinfo->panel);
> - if (ret)
> - return dev_err_probe(dev, ret, "failed to get backlight\n");
> + if (pinfo->desc->has_dcs_backlight) {
> + pinfo->panel.backlight = nt36523_create_backlight(dsi);
> + if (IS_ERR(pinfo->panel.backlight))
> + return dev_err_probe(dev, PTR_ERR(pinfo->panel.backlight),
> + "Failed to create backlight\n");
> + } else {
> + ret = drm_panel_of_backlight(&pinfo->panel);
> + if (ret)
> + return dev_err_probe(dev, ret, "Failed to get backlight\n");
> + }
>
> drm_panel_add(&pinfo->panel);
>
>
> --
> 2.40.0
>
On Wed, Apr 12, 2023 at 09:46:02PM +0200, Konrad Dybcio wrote:
> Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
> video mode display. Add support for these panels.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> drivers/gpu/drm/panel/panel-novatek-nt36523.c | 491 ++++++++++++++++++++++++++
> 1 file changed, 491 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> index db4b4af13ec1..4bf9f8db26ba 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c
> @@ -13,6 +13,8 @@
> #include <linux/of_graph.h>
> #include <linux/regulator/consumer.h>
>
[..]
> +static const struct panel_desc j606f_boe_desc = {
> + .modes = j606f_boe_modes,
> + .num_modes = ARRAY_SIZE(j606f_boe_modes),
> + .dsi_info = {
> + .type = "J606F BOE",
> + .channel = 0,
> + .node = NULL,
> + },
The dsi_info just be used to register slave dsi, for single dsi case, can drop
it.
Otherwise looks great, thanks!
Reviewed-by: Jianhua Lu <[email protected]>
> + .width_mm = 143,
> + .height_mm = 235,
> + .bpc = 8,
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
> + .init_sequence = j606f_boe_init_sequence,
> + .has_dcs_backlight = true,
> +};
> +
> static void nt36523_reset(struct panel_info *pinfo)
> {
> gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
> @@ -826,6 +1313,10 @@ static int nt36523_probe(struct mipi_dsi_device *dsi)
> }
>
> static const struct of_device_id nt36523_of_match[] = {
> + {
> + .compatible = "lenovo,j606f-boe-nt36523w",
> + .data = &j606f_boe_desc,
> + },
> {
> .compatible = "xiaomi,elish-boe-nt36523",
> .data = &elish_boe_desc,
>
> --
> 2.40.0
>
On Wed, Apr 12, 2023 at 9:46 PM Konrad Dybcio <[email protected]> wrote:
> Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
> video mode display. Document it and allow rotation while at it (Lenovo
> mounted it upside down!).
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Looks good to me!
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On Wed, Apr 12, 2023 at 9:46 PM Konrad Dybcio <[email protected]> wrote:
> This chip supports controlling the backlight via DCS commands, on at
> least some panels. Add support for doing so.
>
> Note this may only concern the NT36523*W* variant. Nobody knows, really,
> there's no docs.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On Wed, Apr 12, 2023 at 9:46 PM Konrad Dybcio <[email protected]> wrote:
> Some bright vendors mount their display panels upside down. Add the
> required pieces to allow for accounting for that.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
I added Novatek contact email to responders.
Hi Novatek, can we have a public datasheet for NT36523?
We are developing a Linux driver for NT36523-based displays
and we need documentation. Thanks.
On Wed, Apr 12, 2023 at 9:46 PM Konrad Dybcio <[email protected]> wrote:
> Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
> video mode display. Add support for these panels.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Thanks for the best effort to use documented commands and best guesses
for defines.
The rest we can detail if we ever run into a datasheet.
Novatek doesn't have a single email address in the kernel
log so no idea who I could mail about this, I think I even tried
their webpage at one point, no answer. But I put their contact
mail on the To-line let's see if someone answers!
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij