2023-07-04 14:17:35

by Clément Léger

Subject: [RFC V2 PATCH 2/9] riscv: avoid missing prototypes warning

Declare handle_misaligned_store/load() functions in entry-common.h and
include that file in traps_misaligned.c file to avoid warnings.

Signed-off-by: Clément Léger <[email protected]>
---
arch/riscv/include/asm/entry-common.h | 3 +++
arch/riscv/kernel/traps.c | 2 --
arch/riscv/kernel/traps_misaligned.c | 1 +
3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
index 6e4dee49d84b..58e9e2976e1b 100644
--- a/arch/riscv/include/asm/entry-common.h
+++ b/arch/riscv/include/asm/entry-common.h
@@ -8,4 +8,7 @@
void handle_page_fault(struct pt_regs *regs);
void handle_break(struct pt_regs *regs);

+int handle_misaligned_load(struct pt_regs *regs);
+int handle_misaligned_store(struct pt_regs *regs);
+
#endif /* _ASM_RISCV_ENTRY_COMMON_H */
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 8c258b78c925..7fcaf2fd27a1 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -155,8 +155,6 @@ DO_ERROR_INFO(do_trap_load_misaligned,
DO_ERROR_INFO(do_trap_store_misaligned,
SIGBUS, BUS_ADRALN, "Oops - store (or AMO) address misaligned");
#else
-int handle_misaligned_load(struct pt_regs *regs);
-int handle_misaligned_store(struct pt_regs *regs);

asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)
{
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index e7bfb33089c1..0cccac4822a8 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -12,6 +12,7 @@
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/csr.h>
+#include <asm/entry-common.h>

#define INSN_MATCH_LB 0x3
#define INSN_MASK_LB 0x707f
--
2.40.1

2023-07-08 20:08:34

by Stafford Horne

Subject: Re: [RFC V2 PATCH 2/9] riscv: avoid missing prototypes warning

On Tue, Jul 04, 2023 at 04:09:17PM +0200, Cl?ment L?ger wrote:
> Declare handle_misaligned_store/load() functions in entry-common.h and
> include that file in traps_misaligned.c file to avoid warnings.
>
> Signed-off-by: Cl?ment L?ger <[email protected]>
> ---
> arch/riscv/include/asm/entry-common.h | 3 +++
> arch/riscv/kernel/traps.c | 2 --
> arch/riscv/kernel/traps_misaligned.c | 1 +
> 3 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
> index 6e4dee49d84b..58e9e2976e1b 100644
> --- a/arch/riscv/include/asm/entry-common.h
> +++ b/arch/riscv/include/asm/entry-common.h
> @@ -8,4 +8,7 @@
> void handle_page_fault(struct pt_regs *regs);
> void handle_break(struct pt_regs *regs);
>
> +int handle_misaligned_load(struct pt_regs *regs);
> +int handle_misaligned_store(struct pt_regs *regs);
> +

Would this work when CONFIG_RISCV_M_MODE is disabled?

The handle_misaligned_load/store functions are only defined if
CONFIG_RISCV_M_MODE is enabled. I would expect warnings if CONFIG_RISCV_M_MODE
is siabled.

-Stafford

> #endif /* _ASM_RISCV_ENTRY_COMMON_H */
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index 8c258b78c925..7fcaf2fd27a1 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -155,8 +155,6 @@ DO_ERROR_INFO(do_trap_load_misaligned,
> DO_ERROR_INFO(do_trap_store_misaligned,
> SIGBUS, BUS_ADRALN, "Oops - store (or AMO) address misaligned");
> #else
> -int handle_misaligned_load(struct pt_regs *regs);
> -int handle_misaligned_store(struct pt_regs *regs);
>
> asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)
> {
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index e7bfb33089c1..0cccac4822a8 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -12,6 +12,7 @@
> #include <asm/processor.h>
> #include <asm/ptrace.h>
> #include <asm/csr.h>
> +#include <asm/entry-common.h>
>
> #define INSN_MATCH_LB 0x3
> #define INSN_MASK_LB 0x707f
> --
> 2.40.1
>