2023-07-30 10:40:50

by Nam Cao

Subject: [PATCH 1/3] riscv: kprobes: simulate c.j instruction

kprobes currently rejects c.j instruction. Implement it.

Signed-off-by: Nam Cao <[email protected]>
---
arch/riscv/kernel/probes/decode-insn.c | 3 ++-
arch/riscv/kernel/probes/simulate-insn.c | 24 ++++++++++++++++++++++++
arch/riscv/kernel/probes/simulate-insn.h | 1 +
3 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c
index 64f6183b4717..39adb07a342d 100644
--- a/arch/riscv/kernel/probes/decode-insn.c
+++ b/arch/riscv/kernel/probes/decode-insn.c
@@ -29,13 +29,14 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
* TODO: the REJECTED ones below need to be implemented
*/
#ifdef CONFIG_RISCV_ISA_C
- RISCV_INSN_REJECTED(c_j, insn);
RISCV_INSN_REJECTED(c_jr, insn);
RISCV_INSN_REJECTED(c_jal, insn);
RISCV_INSN_REJECTED(c_jalr, insn);
RISCV_INSN_REJECTED(c_beqz, insn);
RISCV_INSN_REJECTED(c_bnez, insn);
RISCV_INSN_REJECTED(c_ebreak, insn);
+
+ RISCV_INSN_SET_SIMULATE(c_j, insn);
#endif

RISCV_INSN_SET_SIMULATE(jal, insn);
diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
index 7441ac8a6843..3ba45c612cd8 100644
--- a/arch/riscv/kernel/probes/simulate-insn.c
+++ b/arch/riscv/kernel/probes/simulate-insn.c
@@ -188,3 +188,27 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r

return true;
}
+
+bool __kprobes simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs)
+{
+ /*
+ * 15 13 12 2 1 0
+ * | funct3 | offset[11|4|9:8|10|6|7|3:1|5] | opcode |
+ * 3 11 2
+ */
+
+ s32 offset;
+
+ offset = ((opcode >> 3) & 0x7) << 1;
+ offset |= ((opcode >> 11) & 0x1) << 4;
+ offset |= ((opcode >> 2) & 0x1) << 5;
+ offset |= ((opcode >> 7) & 0x1) << 6;
+ offset |= ((opcode >> 6) & 0x1) << 7;
+ offset |= ((opcode >> 9) & 0x3) << 8;
+ offset |= ((opcode >> 8) & 0x1) << 10;
+ offset |= ((opcode >> 12) & 0x1) << 11;
+
+ instruction_pointer_set(regs, addr + sign_extend32(offset, 11));
+
+ return true;
+}
diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h
index 61e35db31001..4bd6c266e7d3 100644
--- a/arch/riscv/kernel/probes/simulate-insn.h
+++ b/arch/riscv/kernel/probes/simulate-insn.h
@@ -24,5 +24,6 @@ bool simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs);
bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs);
bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs);
bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs);
+bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs);

#endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
--
2.34.1

2023-08-09 01:40:58

by Charlie Jenkins

Subject: Re: [PATCH 1/3] riscv: kprobes: simulate c.j instruction

On Sun, Jul 30, 2023 at 10:27:07AM +0200, Nam Cao wrote:
> kprobes currently rejects c.j instruction. Implement it.
>
> Signed-off-by: Nam Cao <[email protected]>
> ---
> arch/riscv/kernel/probes/decode-insn.c | 3 ++-
> arch/riscv/kernel/probes/simulate-insn.c | 24 ++++++++++++++++++++++++
> arch/riscv/kernel/probes/simulate-insn.h | 1 +
> 3 files changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c
> index 64f6183b4717..39adb07a342d 100644
> --- a/arch/riscv/kernel/probes/decode-insn.c
> +++ b/arch/riscv/kernel/probes/decode-insn.c
> @@ -29,13 +29,14 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
> * TODO: the REJECTED ones below need to be implemented
> */
> #ifdef CONFIG_RISCV_ISA_C
> - RISCV_INSN_REJECTED(c_j, insn);
> RISCV_INSN_REJECTED(c_jr, insn);
> RISCV_INSN_REJECTED(c_jal, insn);
> RISCV_INSN_REJECTED(c_jalr, insn);
> RISCV_INSN_REJECTED(c_beqz, insn);
> RISCV_INSN_REJECTED(c_bnez, insn);
> RISCV_INSN_REJECTED(c_ebreak, insn);
> +
> + RISCV_INSN_SET_SIMULATE(c_j, insn);
> #endif
>
> RISCV_INSN_SET_SIMULATE(jal, insn);
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> index 7441ac8a6843..3ba45c612cd8 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -188,3 +188,27 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r
>
> return true;
> }
> +
> +bool __kprobes simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs)
> +{
> + /*
> + * 15 13 12 2 1 0
> + * | funct3 | offset[11|4|9:8|10|6|7|3:1|5] | opcode |
> + * 3 11 2
> + */
> +
> + s32 offset;
> +
> + offset = ((opcode >> 3) & 0x7) << 1;
> + offset |= ((opcode >> 11) & 0x1) << 4;
> + offset |= ((opcode >> 2) & 0x1) << 5;
> + offset |= ((opcode >> 7) & 0x1) << 6;
> + offset |= ((opcode >> 6) & 0x1) << 7;
> + offset |= ((opcode >> 9) & 0x3) << 8;
> + offset |= ((opcode >> 8) & 0x1) << 10;
> + offset |= ((opcode >> 12) & 0x1) << 11;
> +
> + instruction_pointer_set(regs, addr + sign_extend32(offset, 11));
Can you use riscv_insn_insert_jtype_imm() from insn.h since it is
already created? It will also sign extend for you. Don't worry about
creating a similar function for the branches, I am in the process of
refactoring the insn.h file.
> +
> + return true;
> +}
> diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h
> index 61e35db31001..4bd6c266e7d3 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.h
> +++ b/arch/riscv/kernel/probes/simulate-insn.h
> @@ -24,5 +24,6 @@ bool simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs);
> bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs);
> bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs);
> bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs);
> +bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs);
>
> #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Thanks,
Charlie

2023-08-09 01:54:01

by Charlie Jenkins

Subject: Re: [PATCH 1/3] riscv: kprobes: simulate c.j instruction

On Tue, Aug 08, 2023 at 05:11:48PM -0700, Charlie Jenkins wrote:
> On Sun, Jul 30, 2023 at 10:27:07AM +0200, Nam Cao wrote:
> > kprobes currently rejects c.j instruction. Implement it.
> >
> > Signed-off-by: Nam Cao <[email protected]>
> > ---
> > arch/riscv/kernel/probes/decode-insn.c | 3 ++-
> > arch/riscv/kernel/probes/simulate-insn.c | 24 ++++++++++++++++++++++++
> > arch/riscv/kernel/probes/simulate-insn.h | 1 +
> > 3 files changed, 27 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c
> > index 64f6183b4717..39adb07a342d 100644
> > --- a/arch/riscv/kernel/probes/decode-insn.c
> > +++ b/arch/riscv/kernel/probes/decode-insn.c
> > @@ -29,13 +29,14 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
> > * TODO: the REJECTED ones below need to be implemented
> > */
> > #ifdef CONFIG_RISCV_ISA_C
> > - RISCV_INSN_REJECTED(c_j, insn);
> > RISCV_INSN_REJECTED(c_jr, insn);
> > RISCV_INSN_REJECTED(c_jal, insn);
> > RISCV_INSN_REJECTED(c_jalr, insn);
> > RISCV_INSN_REJECTED(c_beqz, insn);
> > RISCV_INSN_REJECTED(c_bnez, insn);
> > RISCV_INSN_REJECTED(c_ebreak, insn);
> > +
> > + RISCV_INSN_SET_SIMULATE(c_j, insn);
> > #endif
> >
> > RISCV_INSN_SET_SIMULATE(jal, insn);
> > diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> > index 7441ac8a6843..3ba45c612cd8 100644
> > --- a/arch/riscv/kernel/probes/simulate-insn.c
> > +++ b/arch/riscv/kernel/probes/simulate-insn.c
> > @@ -188,3 +188,27 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r
> >
> > return true;
> > }
> > +
> > +bool __kprobes simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs)
> > +{
> > + /*
> > + * 15 13 12 2 1 0
> > + * | funct3 | offset[11|4|9:8|10|6|7|3:1|5] | opcode |
> > + * 3 11 2
> > + */
> > +
> > + s32 offset;
> > +
> > + offset = ((opcode >> 3) & 0x7) << 1;
> > + offset |= ((opcode >> 11) & 0x1) << 4;
> > + offset |= ((opcode >> 2) & 0x1) << 5;
> > + offset |= ((opcode >> 7) & 0x1) << 6;
> > + offset |= ((opcode >> 6) & 0x1) << 7;
> > + offset |= ((opcode >> 9) & 0x3) << 8;
> > + offset |= ((opcode >> 8) & 0x1) << 10;
> > + offset |= ((opcode >> 12) & 0x1) << 11;
> > +
> > + instruction_pointer_set(regs, addr + sign_extend32(offset, 11));
> Can you use riscv_insn_insert_jtype_imm() from insn.h since it is
> already created? It will also sign extend for you. Don't worry about
> creating a similar function for the branches, I am in the process of
> refactoring the insn.h file.
> > +
> > + return true;
> > +}
> > diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h
> > index 61e35db31001..4bd6c266e7d3 100644
> > --- a/arch/riscv/kernel/probes/simulate-insn.h
> > +++ b/arch/riscv/kernel/probes/simulate-insn.h
> > @@ -24,5 +24,6 @@ bool simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs);
> > bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs);
> > bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs);
> > bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs);
> > +bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs);
> >
> > #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
> > --
> > 2.34.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > [email protected]
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
> Thanks,
> Charlie
Oh sorry, I forgot this was compressed. You can ignore the last message.
The changes look good. You can add:

Reviewed-by: Charlie Jenkins <[email protected]>