This series adds the MPM wakeirq mappings for some SoCs and fixes my
"big oops" within the 8998 driver.
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (5):
pinctrl: qcom: msm8998: Fix MPM mappings
pinctrl: qcom: msm8996: Add MPM pin mappings
pinctrl: qcom: sm6115: Add MPM pin mappings
pinctrl: qcom: sm6125: Add MPM pin mappings
pinctrl: qcom: sdm660: Add MPM pin mappings
drivers/pinctrl/qcom/pinctrl-msm8996.c | 15 +++++++++++++++
drivers/pinctrl/qcom/pinctrl-msm8998.c | 19 ++++++++++---------
drivers/pinctrl/qcom/pinctrl-sdm660.c | 14 ++++++++++++++
drivers/pinctrl/qcom/pinctrl-sm6115.c | 12 ++++++++++++
drivers/pinctrl/qcom/pinctrl-sm6125.c | 14 ++++++++++++++
5 files changed, 65 insertions(+), 9 deletions(-)
---
base-commit: 21ef7b1e17d039053edaeaf41142423810572741
change-id: 20230809-topic-mpm_mappings-31ff2856244a
Best regards,
--
Konrad Dybcio <[email protected]>
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/pinctrl/qcom/pinctrl-sm6115.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
index 2a06025f4885..4e91c75ad952 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6115.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
@@ -867,6 +867,16 @@ static const struct msm_pingroup sm6115_groups[] = {
[120] = SDC_QDSD_PINGROUP(sdc2_data, SOUTH, 0x73000, 9, 0),
};
+static const struct msm_gpio_wakeirq_map sm6115_mpm_map[] = {
+ { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 }, { 13, 18 },
+ { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 }, { 25, 71 }, { 27, 73 },
+ { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 }, { 34, 56 }, { 35, 57 }, { 36, 58 },
+ { 39, 28 }, { 46, 29 }, { 62, 60 }, { 63, 61 }, { 64, 62 }, { 65, 30 }, { 66, 31 },
+ { 67, 32 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 }, { 79, 36 }, { 80, 21 },
+ { 81, 38 }, { 83, 9 }, { 84, 39 }, { 85, 40 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
+ { 89, 45 }, { 91, 74 }, { 93, 46 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
+};
+
static const struct msm_pinctrl_soc_data sm6115_tlmm = {
.pins = sm6115_pins,
.npins = ARRAY_SIZE(sm6115_pins),
@@ -877,6 +887,8 @@ static const struct msm_pinctrl_soc_data sm6115_tlmm = {
.ngpios = 114,
.tiles = sm6115_tiles,
.ntiles = ARRAY_SIZE(sm6115_tiles),
+ .wakeirq_map = sm6115_mpm_map,
+ .nwakeirq_map = ARRAY_SIZE(sm6115_mpm_map),
};
static int sm6115_tlmm_probe(struct platform_device *pdev)
--
2.41.0
On Wed, Aug 09, 2023 at 09:38:56PM +0200, Konrad Dybcio wrote:
> Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
> through MPM-connected pins.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> drivers/pinctrl/qcom/pinctrl-sm6115.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
> index 2a06025f4885..4e91c75ad952 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sm6115.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
> @@ -867,6 +867,16 @@ static const struct msm_pingroup sm6115_groups[] = {
> [120] = SDC_QDSD_PINGROUP(sdc2_data, SOUTH, 0x73000, 9, 0),
> };
>
> +static const struct msm_gpio_wakeirq_map sm6115_mpm_map[] = {
> + { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 }, { 13, 18 },
> + { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 }, { 25, 71 }, { 27, 73 },
> + { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 }, { 34, 56 }, { 35, 57 }, { 36, 58 },
> + { 39, 28 }, { 46, 29 }, { 62, 60 }, { 63, 61 }, { 64, 62 }, { 65, 30 }, { 66, 31 },
> + { 67, 32 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 }, { 79, 36 }, { 80, 21 },
> + { 81, 38 }, { 83, 9 }, { 84, 39 }, { 85, 40 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
> + { 89, 45 }, { 91, 74 }, { 93, 46 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
> +};
Did you omit the mappings for GPIO 99-112 here on purpose?
The order here looks fine BTW. Maybe downstream changed the order and
you got confused? :)
Thanks,
Stephan
On 10.08.2023 09:19, Stephan Gerhold wrote:
> On Wed, Aug 09, 2023 at 09:38:56PM +0200, Konrad Dybcio wrote:
>> Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
>> through MPM-connected pins.
>>
>> Signed-off-by: Konrad Dybcio <[email protected]>
>> ---
>> drivers/pinctrl/qcom/pinctrl-sm6115.c | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
>> index 2a06025f4885..4e91c75ad952 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-sm6115.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
>> @@ -867,6 +867,16 @@ static const struct msm_pingroup sm6115_groups[] = {
>> [120] = SDC_QDSD_PINGROUP(sdc2_data, SOUTH, 0x73000, 9, 0),
>> };
>>
>> +static const struct msm_gpio_wakeirq_map sm6115_mpm_map[] = {
>> + { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 }, { 13, 18 },
>> + { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 }, { 25, 71 }, { 27, 73 },
>> + { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 }, { 34, 56 }, { 35, 57 }, { 36, 58 },
>> + { 39, 28 }, { 46, 29 }, { 62, 60 }, { 63, 61 }, { 64, 62 }, { 65, 30 }, { 66, 31 },
>> + { 67, 32 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 }, { 79, 36 }, { 80, 21 },
>> + { 81, 38 }, { 83, 9 }, { 84, 39 }, { 85, 40 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
>> + { 89, 45 }, { 91, 74 }, { 93, 46 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
>> +};
>
> Did you omit the mappings for GPIO 99-112 here on purpose?
My downstream didn't have that. I'll take a look.
>
> The order here looks fine BTW. Maybe downstream changed the order and
> you got confused? :)
Yes it changed between iterations, more than one time I think..
Still thinking about that 8998 thing..
Konrad