This v2 patch series updates the I2C DesignWare driver to handle invalid
SMBus block data response length value that causes the bus is hang and
can not be recovered.
v2:
+ Create new commit to correct length byte validation logic [Quan]
+ Get right data length from IC_DATA_CMD register [Jarkko]
Quan Nguyen (1):
i2c: designware: Correct length byte validation logic
Tam Nguyen (1):
i2c: designware: Handle invalid SMBus block data response length value
drivers/i2c/busses/i2c-designware-master.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
--
2.25.1
In the I2C_FUNC_SMBUS_BLOCK_DATA case, the invalid length byte value
(outside of 1-32) of the SMBus block data response from the Slave device
is not correctly handled by the I2C Designware driver.
In case IC_EMPTYFIFO_HOLD_MASTER_EN==1, which cannot be detected
from the registers, the Master can be disabled only if the STOP bit
is set. Without STOP bit set, the Master remains active, holding the bus
until receiving a block data response length. This hangs the bus and
is unrecoverable.
Avoid this by issuing another dump read to reach the stop condition when
an invalid length byte is received.
Cc: [email protected]
Signed-off-by: Tam Nguyen <[email protected]>
---
drivers/i2c/busses/i2c-designware-master.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index e96276d1b002..c51fc1f4b97e 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -528,8 +528,19 @@ i2c_dw_read(struct dw_i2c_dev *dev)
regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
tmp &= DW_IC_DATA_CMD_DAT;
/* Ensure length byte is a valid value */
- if (flags & I2C_M_RECV_LEN &&
- tmp <= I2C_SMBUS_BLOCK_MAX && tmp > 0) {
+ if (flags & I2C_M_RECV_LEN) {
+ /*
+ * if IC_EMPTYFIFO_HOLD_MASTER_EN is set, which cannot be
+ * detected from the registers, the controller can be
+ * disabled if the STOP bit is set. But it is only set
+ * after receiving block data response length in
+ * I2C_FUNC_SMBUS_BLOCK_DATA case. That needs to read
+ * another byte with STOP bit set when the block data
+ * response length is invalid to complete the transaction.
+ */
+ if (!tmp || tmp > I2C_SMBUS_BLOCK_MAX)
+ tmp = 1;
+
len = i2c_dw_recv_len(dev, tmp);
}
*buf++ = tmp;
--
2.25.1
On 7/26/23 11:00, Tam Nguyen wrote:
> In the I2C_FUNC_SMBUS_BLOCK_DATA case, the invalid length byte value
> (outside of 1-32) of the SMBus block data response from the Slave device
> is not correctly handled by the I2C Designware driver.
>
> In case IC_EMPTYFIFO_HOLD_MASTER_EN==1, which cannot be detected
> from the registers, the Master can be disabled only if the STOP bit
> is set. Without STOP bit set, the Master remains active, holding the bus
> until receiving a block data response length. This hangs the bus and
> is unrecoverable.
>
> Avoid this by issuing another dump read to reach the stop condition when
> an invalid length byte is received.
>
> Cc: [email protected]
> Signed-off-by: Tam Nguyen <[email protected]>
> ---
> drivers/i2c/busses/i2c-designware-master.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
Acked-by: Jarkko Nikula <[email protected]>
Hi
On Wed, 26 Jul 2023 14:59:59 +0700, Tam Nguyen wrote:
> This v2 patch series updates the I2C DesignWare driver to handle invalid
> SMBus block data response length value that causes the bus is hang and
> can not be recovered.
>
> v2:
> + Create new commit to correct length byte validation logic [Quan]
> + Get right data length from IC_DATA_CMD register [Jarkko]
>
> [...]
Applied to i2c/andi-for-current on
https://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux.git
Please note that this patch may still undergo further evaluation
and the final decision will be made in collaboration with
Wolfram.
Thank you,
Andi
Patches applied
===============
[1/2] i2c: designware: Correct length byte validation logic
commit: 29a1ae0bd13f45da520a7106abfe347f9375f64e
[2/2] i2c: designware: Handle invalid SMBus block data response length value
commit: dcd14feb235bed87a9cba63538bcf6a7a7e97b78
On Wed, Jul 26, 2023 at 03:00:01PM +0700, Tam Nguyen wrote:
> In the I2C_FUNC_SMBUS_BLOCK_DATA case, the invalid length byte value
> (outside of 1-32) of the SMBus block data response from the Slave device
> is not correctly handled by the I2C Designware driver.
>
> In case IC_EMPTYFIFO_HOLD_MASTER_EN==1, which cannot be detected
> from the registers, the Master can be disabled only if the STOP bit
> is set. Without STOP bit set, the Master remains active, holding the bus
> until receiving a block data response length. This hangs the bus and
> is unrecoverable.
>
> Avoid this by issuing another dump read to reach the stop condition when
> an invalid length byte is received.
>
> Cc: [email protected]
> Signed-off-by: Tam Nguyen <[email protected]>
Applied to for-current, thanks!