Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
there's only one nommu platform in the mainline. However, there are
many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
the hardcoding value, and introduce DRAM_BASE which will be set by
users during configuring. DRAM_BASE is 0x8000_0000 by default.
Signed-off-by: Jisheng Zhang <[email protected]>
---
arch/riscv/Kconfig | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 7895c77545f1..afd51dbdc253 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -247,10 +247,16 @@ config MMU
Select if you want MMU-based virtualised addressing space
support by paged memory management. If unsure, say 'Y'.
+if !MMU
+config DRAM_BASE
+ hex '(S)DRAM Base Address'
+ default 0x80000000
+endif
+
config PAGE_OFFSET
hex
default 0xC0000000 if 32BIT && MMU
- default 0x80000000 if !MMU
+ default DRAM_BASE if !MMU
default 0xff60000000000000 if 64BIT
config KASAN_SHADOW_OFFSET
--
2.43.0
On 3/25/24 9:40 AM, Jisheng Zhang wrote:
> Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
> there's only one nommu platform in the mainline. However, there are
> many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
> the hardcoding value, and introduce DRAM_BASE which will be set by
> users during configuring. DRAM_BASE is 0x8000_0000 by default.
>
> Signed-off-by: Jisheng Zhang <[email protected]>
> ---
> arch/riscv/Kconfig | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 7895c77545f1..afd51dbdc253 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -247,10 +247,16 @@ config MMU
> Select if you want MMU-based virtualised addressing space
> support by paged memory management. If unsure, say 'Y'.
>
> +if !MMU
> +config DRAM_BASE
> + hex '(S)DRAM Base Address'
> + default 0x80000000
> +endif
> +
> config PAGE_OFFSET
> hex
> default 0xC0000000 if 32BIT && MMU
> - default 0x80000000 if !MMU
> + default DRAM_BASE if !MMU
> default 0xff60000000000000 if 64BIT
>
> config KASAN_SHADOW_OFFSET
>
Thanks for this patch. I did something similar in my local nommu
linux-6.8 tree in order to run it on the S7 hart of JH7110. I have
another suggestion for you. Perhaps we should also make TASK_SIZE
configurable, and let it default to `0xffffffff if 32BIT && !MMU`
and `DRAM_BASE + DRAM_SIZE if 64BIT && !MMU`. Currently TASK_SIZE
is effectively `0xffffffff if !MMU`, which doesn't work if I run
rv64 linux-nommu with DDR that spans across 4G boundary.
I see there's another patchset that tries to define TASK_SIZE_MAX
for __access_ok(). Looks like that only affects the MMU case, and
NOMMU is not touched. My aforementioned change won't conflict with
it should it get merged.
Bo
On Mon, Mar 25, 2024 at 03:46:01PM -0700, Bo Gan wrote:
> On 3/25/24 9:40 AM, Jisheng Zhang wrote:
> > Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
> > there's only one nommu platform in the mainline. However, there are
> > many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
> > the hardcoding value, and introduce DRAM_BASE which will be set by
> > users during configuring. DRAM_BASE is 0x8000_0000 by default.
> >
> > Signed-off-by: Jisheng Zhang <[email protected]>
> > ---
> > arch/riscv/Kconfig | 8 +++++++-
> > 1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 7895c77545f1..afd51dbdc253 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -247,10 +247,16 @@ config MMU
> > Select if you want MMU-based virtualised addressing space
> > support by paged memory management. If unsure, say 'Y'.
> > +if !MMU
> > +config DRAM_BASE
> > + hex '(S)DRAM Base Address'
> > + default 0x80000000
> > +endif
> > +
> > config PAGE_OFFSET
> > hex
> > default 0xC0000000 if 32BIT && MMU
> > - default 0x80000000 if !MMU
> > + default DRAM_BASE if !MMU
> > default 0xff60000000000000 if 64BIT
> > config KASAN_SHADOW_OFFSET
> >
>
> Thanks for this patch. I did something similar in my local nommu
> linux-6.8 tree in order to run it on the S7 hart of JH7110. I have
> another suggestion for you. Perhaps we should also make TASK_SIZE
> configurable, and let it default to `0xffffffff if 32BIT && !MMU`
> and `DRAM_BASE + DRAM_SIZE if 64BIT && !MMU`. Currently TASK_SIZE
> is effectively `0xffffffff if !MMU`, which doesn't work if I run
> rv64 linux-nommu with DDR that spans across 4G boundary.
I must admit that there's such nommu linux with 4GB DDR case in
theory, but it doesn't exist in real world: who will make such
strange platform ;) But anyway this improvement can be made when
the patchset talking about TASK_SIZE_MAX is settled down.
>
> I see there's another patchset that tries to define TASK_SIZE_MAX
> for __access_ok(). Looks like that only affects the MMU case, and
> NOMMU is not touched. My aforementioned change won't conflict with
> it should it get merged.
>
> Bo
On 2024-03-25 8:28 PM, Jisheng Zhang wrote:
> On Mon, Mar 25, 2024 at 03:46:01PM -0700, Bo Gan wrote:
>> On 3/25/24 9:40 AM, Jisheng Zhang wrote:
>>> Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
>>> there's only one nommu platform in the mainline. However, there are
>>> many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
>>> the hardcoding value, and introduce DRAM_BASE which will be set by
>>> users during configuring. DRAM_BASE is 0x8000_0000 by default.
>>>
>>> Signed-off-by: Jisheng Zhang <[email protected]>
>>> ---
>>> arch/riscv/Kconfig | 8 +++++++-
>>> 1 file changed, 7 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>>> index 7895c77545f1..afd51dbdc253 100644
>>> --- a/arch/riscv/Kconfig
>>> +++ b/arch/riscv/Kconfig
>>> @@ -247,10 +247,16 @@ config MMU
>>> Select if you want MMU-based virtualised addressing space
>>> support by paged memory management. If unsure, say 'Y'.
>>> +if !MMU
>>> +config DRAM_BASE
>>> + hex '(S)DRAM Base Address'
>>> + default 0x80000000
>>> +endif
>>> +
>>> config PAGE_OFFSET
>>> hex
Another option would be to change this to:
hex "DRAM Base Address" if !MMU
so the prompt is only visible for NOMMU, but we don't need a new symbol.
>>> default 0xC0000000 if 32BIT && MMU
>>> - default 0x80000000 if !MMU
>>> + default DRAM_BASE if !MMU
>>> default 0xff60000000000000 if 64BIT
>>> config KASAN_SHADOW_OFFSET
>>>
>>
>> Thanks for this patch. I did something similar in my local nommu
>> linux-6.8 tree in order to run it on the S7 hart of JH7110. I have
>> another suggestion for you. Perhaps we should also make TASK_SIZE
>> configurable, and let it default to `0xffffffff if 32BIT && !MMU`
>> and `DRAM_BASE + DRAM_SIZE if 64BIT && !MMU`. Currently TASK_SIZE
>> is effectively `0xffffffff if !MMU`, which doesn't work if I run
>> rv64 linux-nommu with DDR that spans across 4G boundary.
>
> I must admit that there's such nommu linux with 4GB DDR case in
> theory, but it doesn't exist in real world: who will make such
> strange platform ;) But anyway this improvement can be made when
> the patchset talking about TASK_SIZE_MAX is settled down.
This case is quite easy to hit with QEMU :) In fact I sent a patch making this
exact change:
https://lore.kernel.org/linux-riscv/[email protected]/
It's not really related to TASK_SIZE_MAX. access_ok() is a no-op on NOMMU,
because you can't prevent userspace from poking the kernel anyway.
Regards,
Samuel