2024-05-10 09:12:46

by Peng Fan (OSS)

Subject: [PATCH v2 03/17] clk: imx: composite-7ulp: Check the PCC present bit

From: Ye Li <[email protected]>

When some module is disabled by fuse, its PCC PR bit is default 0 and
PCC is not operational. Any write to this PCC will cause SError.

Fixes: b40ba8065347 ("clk: imx: Update the compsite driver to support imx8ulp")
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-composite-7ulp.c | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
index e208ddc51133..e70a03e7299c 100644
--- a/drivers/clk/imx/clk-composite-7ulp.c
+++ b/drivers/clk/imx/clk-composite-7ulp.c
@@ -14,6 +14,7 @@
#include "../clk-fractional-divider.h"
#include "clk.h"

+#define PCG_PR_MASK BIT(31)
#define PCG_PCS_SHIFT 24
#define PCG_PCS_MASK 0x7
#define PCG_CGC_SHIFT 30
@@ -78,6 +79,10 @@ static struct clk_hw *imx_ulp_clk_hw_composite(const char *name,
struct clk_hw *hw;
u32 val;

+ val = readl(reg);
+ if (!(val & PCG_PR_MASK))
+ return ERR_PTR(-ENODEV);
+
if (mux_present) {
mux = kzalloc(sizeof(*mux), GFP_KERNEL);
if (!mux)

--
2.37.1

2024-05-13 06:54:57

by Sascha Hauer

Subject: Re: [PATCH v2 03/17] clk: imx: composite-7ulp: Check the PCC present bit

On Fri, May 10, 2024 at 05:18:58PM +0800, Peng Fan (OSS) wrote:
> From: Ye Li <[email protected]>
>
> When some module is disabled by fuse, its PCC PR bit is default 0 and
> PCC is not operational. Any write to this PCC will cause SError.
>
> Fixes: b40ba8065347 ("clk: imx: Update the compsite driver to support imx8ulp")
> Reviewed-by: Peng Fan <[email protected]>
> Signed-off-by: Ye Li <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> drivers/clk/imx/clk-composite-7ulp.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
> index e208ddc51133..e70a03e7299c 100644
> --- a/drivers/clk/imx/clk-composite-7ulp.c
> +++ b/drivers/clk/imx/clk-composite-7ulp.c
> @@ -14,6 +14,7 @@
> #include "../clk-fractional-divider.h"
> #include "clk.h"
>
> +#define PCG_PR_MASK BIT(31)
> #define PCG_PCS_SHIFT 24
> #define PCG_PCS_MASK 0x7
> #define PCG_CGC_SHIFT 30
> @@ -78,6 +79,10 @@ static struct clk_hw *imx_ulp_clk_hw_composite(const char *name,
> struct clk_hw *hw;
> u32 val;
>
> + val = readl(reg);
> + if (!(val & PCG_PR_MASK))
> + return ERR_PTR(-ENODEV);

It looks like this will trigger an error message in imx_check_clk_hws()

Sascha

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