In i386 architecture, there are five timers as candidates in the
selection of "cur_timer." I feel among the five only two types can be
used as Kernel base timer, HPET and PIT. Kernel base timer is the
timer trigger timer_interrupt() periodically. Namely, the timer
installed on IRQ 0 in i386 architecture.
Is the above understanding correct? Particularly I want to confirm
which timers can be used as Kernel base timer.
Thanks.
Feng,Dong
On Sunday 10 September 2006 12:34, Dong Feng wrote:
> In i386 architecture, there are five timers as candidates in the selection
> of "cur_timer." I feel among the five only two types can be used as Kernel
> base timer, HPET and PIT. Kernel base timer is the timer trigger
> timer_interrupt() periodically. Namely, the timer installed on IRQ 0 in
> i386 architecture.
>
> Is the above understanding correct? Particularly I want to confirm which
> timers can be used as Kernel base timer.
Only HPET and PIT can be interrupt 0 in the PC architecture
(HPET only if the legacy option is available), but there is no reason
the main timer handler cannot be driven from another interval timer (e.g.
x86-64 offers the APIC timer as a option for this)
-Andi
Thank you very much.
2006/9/10, Andi Kleen <[email protected]>:
> On Sunday 10 September 2006 12:34, Dong Feng wrote:
> > In i386 architecture, there are five timers as candidates in the selection
> > of "cur_timer." I feel among the five only two types can be used as Kernel
> > base timer, HPET and PIT. Kernel base timer is the timer trigger
> > timer_interrupt() periodically. Namely, the timer installed on IRQ 0 in
> > i386 architecture.
> >
> > Is the above understanding correct? Particularly I want to confirm which
> > timers can be used as Kernel base timer.
>
> Only HPET and PIT can be interrupt 0 in the PC architecture
> (HPET only if the legacy option is available), but there is no reason
> the main timer handler cannot be driven from another interval timer (e.g.
> x86-64 offers the APIC timer as a option for this)
>
> -Andi
>