Bindings patch sent but not yet integrated:
https://lore.kernel.org/linux-spi/[email protected]/
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
Update all the device trees that have instances of the SPI IP with
different FIFO depths.
For the SoCs where all the SPI instances have the same FIFO depth (like
gs101 and exynos850), the FIFO depth is inferred from the compatible.
Similar SoCs shall do the same.
v2:
- use "fifo-depth" property (instead of "samsung,spi-fifosize")
- update commit messages
- reorder patches. Last is using common sense for determining the FIFO
depth. The nodes are not enabled in any device tree, thus upstream
will be fine even if comon sense fails. I guess we can update the
device tree later on if needed. Or we can just drop the last patch.
v1:
https://lore.kernel.org/linux-spi/[email protected]/
Tudor Ambarus (7):
ARM: dts: samsung: exynos3250: specify the SPI FIFO depth
ARM: dts: samsung: exynos4: specify the SPI FIFO depth
ARM: dts: samsung: exynos5250: specify the SPI FIFO depth
ARM: dts: samsung: exynos5420: specify the SPI FIFO depth
ARM: dts: samsung: exynos5433: specify the SPI FIFO depth
ARM: dts: samsung: exynosautov9: specify the SPI FIFO depth
ARM: dts: samsung: s5pv210: specify the SPI FIFO depth
arch/arm/boot/dts/samsung/exynos3250.dtsi | 2 ++
arch/arm/boot/dts/samsung/exynos4.dtsi | 3 +++
arch/arm/boot/dts/samsung/exynos5250.dtsi | 3 +++
arch/arm/boot/dts/samsung/exynos5420.dtsi | 3 +++
arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 ++
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++
arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++++++++
7 files changed, 30 insertions(+)
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
exynos3250.dtsi defines the following aliases:
spi0 = &spi_0;
spi1 = &spi_1;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos4210-spi" compatible:
.fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F },
Thus spi0 was considered having a 256 byte FIFO depth, and spi1 a 64
byte FIFO depth. Update device tree with these FIFO depths. No
functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm/boot/dts/samsung/exynos3250.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/samsung/exynos3250.dtsi b/arch/arm/boot/dts/samsung/exynos3250.dtsi
index 3f1015edab43..b6c3826a9424 100644
--- a/arch/arm/boot/dts/samsung/exynos3250.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos3250.dtsi
@@ -826,6 +826,7 @@ spi_0: spi@13920000 {
samsung,spi-src-clk = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -842,6 +843,7 @@ spi_1: spi@13930000 {
samsung,spi-src-clk = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
exynos5420.dtsi defines the following aliases:
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos4210-spi" compatible:
.fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F },
Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2
having 64 byte FIFO depth each. Update device tree with these FIFO depths.
No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm/boot/dts/samsung/exynos5420.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/samsung/exynos5420.dtsi b/arch/arm/boot/dts/samsung/exynos5420.dtsi
index 25ed90374679..196c6d04675a 100644
--- a/arch/arm/boot/dts/samsung/exynos5420.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos5420.dtsi
@@ -658,6 +658,7 @@ spi_0: spi@12d20000 {
pinctrl-0 = <&spi0_bus>;
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
clock-names = "spi", "spi_busclk0";
+ fifo-depth = <256>;
status = "disabled";
};
@@ -674,6 +675,7 @@ spi_1: spi@12d30000 {
pinctrl-0 = <&spi1_bus>;
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
clock-names = "spi", "spi_busclk0";
+ fifo-depth = <64>;
status = "disabled";
};
@@ -690,6 +692,7 @@ spi_2: spi@12d40000 {
pinctrl-0 = <&spi2_bus>;
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
clock-names = "spi", "spi_busclk0";
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
exynos5250.dtsi defines the following aliases:
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos4210-spi" compatible:
.fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F },
Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2
having 64 byte FIFO depth each. Update device tree with these FIFO depths.
No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm/boot/dts/samsung/exynos5250.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi
index 99c84bebf25a..b9e7c4938818 100644
--- a/arch/arm/boot/dts/samsung/exynos5250.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos5250.dtsi
@@ -511,6 +511,7 @@ spi_0: spi@12d20000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
+ fifo-depth = <256>;
};
spi_1: spi@12d30000 {
@@ -526,6 +527,7 @@ spi_1: spi@12d30000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
+ fifo-depth = <64>;
};
spi_2: spi@12d40000 {
@@ -541,6 +543,7 @@ spi_2: spi@12d40000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
+ fifo-depth = <64>;
};
mmc_0: mmc@12200000 {
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depthj Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
The FIFO depth were determined based on the SPI aliases that are defined
in exynos5433-tm2-common.dtsi:
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
spi3 = &spi_3;
spi4 = &spi_4;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos5433-spi" compatible:
.fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff},
Thus spi{0, 4} were considered having 256 byte FIFO depths, and
spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these
FIFO depths. No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 7fbbec04bff0..0b9053b9b2b5 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1468,6 +1468,7 @@ spi_0: spi@14d20000 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
num-cs = <1>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -1487,6 +1488,7 @@ spi_1: spi@14d30000 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
num-cs = <1>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1506,6 +1508,7 @@ spi_2: spi@14d40000 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
num-cs = <1>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1525,6 +1528,7 @@ spi_3: spi@14d50000 {
pinctrl-names = "default";
pinctrl-0 = <&spi3_bus>;
num-cs = <1>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1544,6 +1548,7 @@ spi_4: spi@14d00000 {
pinctrl-names = "default";
pinctrl-0 = <&spi4_bus>;
num-cs = <1>;
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
There are no SPI aliases defined, thus the FIFO depth was determined by
matching the FIFO depth of the I2C node of the same USI parent.
No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index c871a2f49fda..0248329da49a 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -435,6 +435,7 @@ spi_0: spi@10300000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -526,6 +527,7 @@ spi_1: spi@10320000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -617,6 +619,7 @@ spi_2: spi@10340000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -708,6 +711,7 @@ spi_3: spi@10360000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -799,6 +803,7 @@ spi_4: spi@10380000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -890,6 +895,7 @@ spi_5: spi@103a0000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -981,6 +987,7 @@ spi_6: spi@10900000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -1072,6 +1079,7 @@ spi_7: spi@10920000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1163,6 +1171,7 @@ spi_8: spi@10940000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1254,6 +1263,7 @@ spi_9: spi@10960000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1345,6 +1355,7 @@ spi_10: spi@10980000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -1434,6 +1445,7 @@ spi_11: spi@109a0000 {
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
The SPI nodes defined in s5pv210.dtsi are not enabled in any board file.
No SPI aliases are defined, thus choose the FIFO depth using common
sense: index 0 of the array for spi0, and index 1 for spi1.
No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi
index ed560c9a3aa1..3eba870db73f 100644
--- a/arch/arm/boot/dts/samsung/s5pv210.dtsi
+++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi
@@ -161,6 +161,7 @@ spi0: spi@e1300000 {
pinctrl-0 = <&spi0_bus>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -177,6 +178,7 @@ spi1: spi@e1400000 {
pinctrl-0 = <&spi1_bus>;
#address-cells = <1>;
#size-cells = <0>;
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
Up to now the SPI alias was used as an index into an array defined in
the SPI driver to determine the SPI FIFO depth. Drop the dependency on
the SPI alias and specify the SPI FIFO depth directly into the SPI node.
exynos4.dtsi defines the following SPI aliases:
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
"samsung,exynos4210-spi" compatible:
.fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F },
Thus spi0 was considered having a 256 byte FIFO depth, and spi1 and spi2
having 64 byte FIFO depth each. Update device tree with these FIFO depths.
No functional change expected.
Signed-off-by: Tudor Ambarus <[email protected]>
---
arch/arm/boot/dts/samsung/exynos4.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi
index 7f981b5c0d64..ed47d0ce04e1 100644
--- a/arch/arm/boot/dts/samsung/exynos4.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4.dtsi
@@ -621,6 +621,7 @@ spi_0: spi@13920000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
+ fifo-depth = <256>;
status = "disabled";
};
@@ -636,6 +637,7 @@ spi_1: spi@13930000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
+ fifo-depth = <64>;
status = "disabled";
};
@@ -651,6 +653,7 @@ spi_2: spi@13940000 {
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
+ fifo-depth = <64>;
status = "disabled";
};
--
2.44.0.rc0.258.g7320e95886-goog
On 16/02/2024 15:04, Tudor Ambarus wrote:
> Bindings patch sent but not yet integrated:
> https://lore.kernel.org/linux-spi/[email protected]/
I still wait for bindings to be applied. This means it might be too late
to apply it for this cycle. Just letting you know, that I did not forget
about this patchset.
Best regards,
Krzysztof
On 2/22/24 08:49, Krzysztof Kozlowski wrote:
> On 16/02/2024 15:04, Tudor Ambarus wrote:
>> Bindings patch sent but not yet integrated:
>> https://lore.kernel.org/linux-spi/[email protected]/
>
> I still wait for bindings to be applied. This means it might be too late
> to apply it for this cycle. Just letting you know, that I did not forget
> about this patchset.
>
Thanks, Krzysztof, no worries. I'll reply here once Mark queues the
bindings.
Cheers,
ta
On 16/02/2024 15:04, Tudor Ambarus wrote:
> Up to now the SPI alias was used as an index into an array defined in
> the SPI driver to determine the SPI FIFO depthj Drop the dependency on
> the SPI alias and specify the SPI FIFO depth directly into the SPI node.
>
> The FIFO depth were determined based on the SPI aliases that are defined
> in exynos5433-tm2-common.dtsi:
> spi0 = &spi_0;
> spi1 = &spi_1;
> spi2 = &spi_2;
> spi3 = &spi_3;
> spi4 = &spi_4;
> spi-s3c64xx.c driver defines the following fifo_lvl_mask for the
> "samsung,exynos5433-spi" compatible:
> .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff},
> Thus spi{0, 4} were considered having 256 byte FIFO depths, and
> spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these
> FIFO depths. No functional change expected.
>
> Signed-off-by: Tudor Ambarus <[email protected]>
> ---
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++
This and next one has wrong subject prefix. I fixed it.
Best regards,
Krzysztof
On Fri, 16 Feb 2024 14:04:42 +0000, Tudor Ambarus wrote:
> Bindings patch sent but not yet integrated:
> https://lore.kernel.org/linux-spi/[email protected]/
>
> Up to now the SPI alias was used as an index into an array defined in
> the SPI driver to determine the SPI FIFO depth. Drop the dependency on
> the SPI alias and specify the SPI FIFO depth directly into the SPI node.
>
> [...]
Applied, thanks!
[1/7] ARM: dts: samsung: exynos3250: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/43dc9f88ff4db5c932cfb35cfe4bfeff25ed60e2
[2/7] ARM: dts: samsung: exynos4: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/f743fedc881b38a62ee47d752e59ab1ddb247052
[3/7] ARM: dts: samsung: exynos5250: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/a0f87a269f660cb41c2b38041183e3e31c69818d
[4/7] ARM: dts: samsung: exynos5420: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/cc8e49917ca8a3a939d303a7103b9d30ed7d0873
[5/7] ARM: dts: samsung: exynos5433: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/65993c76e64a2fa71ffd05ce260f553d1b3e904f
[6/7] ARM: dts: samsung: exynosautov9: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/b115751fddaf31a0367c19bf080dddcb928a109a
[7/7] ARM: dts: samsung: s5pv210: specify the SPI FIFO depth
https://git.kernel.org/krzk/linux/c/d2c81a9b6acc9ad6fa1a97bf21939adad1882dfa
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On 3/25/24 11:13, Krzysztof Kozlowski wrote:
>> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++
> This and next one has wrong subject prefix. I fixed it.
ah, s/arm/arm64. Thank you!