2024-01-30 19:51:49

by Andrew Davis

[permalink] [raw]
Subject: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible

Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.

[0] https://www.ti.com/lit/pdf/spruid7

Signed-off-by: Andrew Davis <[email protected]>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c2..d8679a2ad4b10 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -73,6 +73,7 @@ properties:
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
- ti,am654-dss-oldi-io-ctrl
+ - ti,am654-serdes-ctrl

- const: syscon

--
2.39.2



2024-01-30 19:52:01

by Andrew Davis

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Subject: [PATCH 2/2] arm64: dts: ti: k3-am65: Add full compatible to SerDes control nodes

This matches the binding for this register region which fixes a couple
DTS check warnings.

While here trim the leading 0s from the "reg" definition.

Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index fcea544656360..62a68740dac6e 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -483,13 +483,13 @@ scm_conf: scm-conf@100000 {
ranges = <0x0 0x0 0x00100000 0x1c000>;

serdes0_clk: clock@4080 {
- compatible = "syscon";
- reg = <0x00004080 0x4>;
+ compatible = "ti,am654-serdes-ctrl", "syscon";
+ reg = <0x4080 0x4>;
};

serdes1_clk: clock@4090 {
- compatible = "syscon";
- reg = <0x00004090 0x4>;
+ compatible = "ti,am654-serdes-ctrl", "syscon";
+ reg = <0x4090 0x4>;
};

serdes_mux: mux-controller {
--
2.39.2


2024-01-31 08:23:33

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible

On 30/01/2024 20:51, Andrew Davis wrote:
> Add TI SERDES control registers compatible. This is a region found in the
> TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
> SERDES clock and lane select mux.
>
> [0] https://www.ti.com/lit/pdf/spruid7
>
> Signed-off-by: Andrew Davis <[email protected]>

Acked-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof


2024-02-05 14:08:51

by Vignesh Raghavendra

[permalink] [raw]
Subject: Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible



On 31/01/24 01:21, Andrew Davis wrote:
> Add TI SERDES control registers compatible. This is a region found in the
> TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
> SERDES clock and lane select mux.
>
> [0] https://www.ti.com/lit/pdf/spruid7
>
> Signed-off-by: Andrew Davis <[email protected]>
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 084b5c2a2a3c2..d8679a2ad4b10 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -73,6 +73,7 @@ properties:
> - rockchip,rv1126-qos
> - starfive,jh7100-sysmain
> - ti,am654-dss-oldi-io-ctrl
> + - ti,am654-serdes-ctrl
>
> - const: syscon
>

This needs to go via mfd tree (or at least need an ACK). Please cc
appropriate maintainer (Lee Jones <[email protected]>). So, I recommended
to split 2/2 out into separate series and post once this patch is merged.

--
Regards
Vignesh

2024-02-05 17:44:34

by Andrew Davis

[permalink] [raw]
Subject: Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible

On 2/5/24 8:05 AM, Vignesh Raghavendra wrote:
>
>
> On 31/01/24 01:21, Andrew Davis wrote:
>> Add TI SERDES control registers compatible. This is a region found in the
>> TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
>> SERDES clock and lane select mux.
>>
>> [0] https://www.ti.com/lit/pdf/spruid7
>>
>> Signed-off-by: Andrew Davis <[email protected]>
>> ---
>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> index 084b5c2a2a3c2..d8679a2ad4b10 100644
>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> @@ -73,6 +73,7 @@ properties:
>> - rockchip,rv1126-qos
>> - starfive,jh7100-sysmain
>> - ti,am654-dss-oldi-io-ctrl
>> + - ti,am654-serdes-ctrl
>>
>> - const: syscon
>>
>
> This needs to go via mfd tree (or at least need an ACK). Please cc
> appropriate maintainer (Lee Jones <[email protected]>). So, I recommended
> to split 2/2 out into separate series and post once this patch is merged.
>

Sure, will send this patch standalone, then post the dts changes later.

Andrew