2021-09-30 17:02:31

by Ilya Lipnitskiy

[permalink] [raw]
Subject: [PATCH] MIPS: Revert "add support for buggy MT7621S core detection"

This reverts commit 6decd1aad15f56b169217789630a0098b496de0e. CPULAUNCH
register is not set properly by some bootloaders, causing a regression
until a bootloader change is made, which is hard if not impossible on
some embedded devices. Revert the change until a more robust core
detection mechanism that works on MT7621S routers such as Netgear R6220
as well as platforms like Digi EX15 can be made.

Link: https://lore.kernel.org/lkml/[email protected]
Fixes: 6decd1aad15f ("MIPS: add support for buggy MT7621S core detection")
Signed-off-by: Ilya Lipnitskiy <[email protected]>
---
arch/mips/include/asm/mips-cps.h | 23 +----------------------
1 file changed, 1 insertion(+), 22 deletions(-)

diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h
index 35fb8ee6dd33..fd43d876892e 100644
--- a/arch/mips/include/asm/mips-cps.h
+++ b/arch/mips/include/asm/mips-cps.h
@@ -10,8 +10,6 @@
#include <linux/io.h>
#include <linux/types.h>

-#include <asm/mips-boards/launch.h>
-
extern unsigned long __cps_access_bad_size(void)
__compiletime_error("Bad size for CPS accessor");

@@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
*/
static inline unsigned int mips_cps_numcores(unsigned int cluster)
{
- unsigned int ncores;
-
if (!mips_cm_present())
return 0;

/* Add one before masking to handle 0xff indicating no cores */
- ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
-
- if (IS_ENABLED(CONFIG_SOC_MT7621)) {
- struct cpulaunch *launch;
-
- /*
- * Ralink MT7621S SoC is single core, but the GCR_CONFIG method
- * always reports 2 cores. Check the second core's LAUNCH_FREADY
- * flag to detect if the second core is missing. This method
- * only works before the core has been started.
- */
- launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
- launch += 2; /* MT7621 has 2 VPEs per core */
- if (!(launch->flags & LAUNCH_FREADY))
- ncores = 1;
- }
-
- return ncores;
+ return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
}

/**
--
2.33.0


2021-09-30 17:16:41

by Sergio Paracuellos

[permalink] [raw]
Subject: Re: [PATCH] MIPS: Revert "add support for buggy MT7621S core detection"

On Thu, Sep 30, 2021 at 6:58 PM Ilya Lipnitskiy
<[email protected]> wrote:
>
> This reverts commit 6decd1aad15f56b169217789630a0098b496de0e. CPULAUNCH
> register is not set properly by some bootloaders, causing a regression
> until a bootloader change is made, which is hard if not impossible on
> some embedded devices. Revert the change until a more robust core
> detection mechanism that works on MT7621S routers such as Netgear R6220
> as well as platforms like Digi EX15 can be made.
>
> Link: https://lore.kernel.org/lkml/[email protected]
> Fixes: 6decd1aad15f ("MIPS: add support for buggy MT7621S core detection")
> Signed-off-by: Ilya Lipnitskiy <[email protected]>
> ---
> arch/mips/include/asm/mips-cps.h | 23 +----------------------
> 1 file changed, 1 insertion(+), 22 deletions(-)

Acked-by: Sergio Paracuellos <[email protected]>

Thanks,
Sergio Paracuellos
>
> diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h
> index 35fb8ee6dd33..fd43d876892e 100644
> --- a/arch/mips/include/asm/mips-cps.h
> +++ b/arch/mips/include/asm/mips-cps.h
> @@ -10,8 +10,6 @@
> #include <linux/io.h>
> #include <linux/types.h>
>
> -#include <asm/mips-boards/launch.h>
> -
> extern unsigned long __cps_access_bad_size(void)
> __compiletime_error("Bad size for CPS accessor");
>
> @@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
> */
> static inline unsigned int mips_cps_numcores(unsigned int cluster)
> {
> - unsigned int ncores;
> -
> if (!mips_cm_present())
> return 0;
>
> /* Add one before masking to handle 0xff indicating no cores */
> - ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> -
> - if (IS_ENABLED(CONFIG_SOC_MT7621)) {
> - struct cpulaunch *launch;
> -
> - /*
> - * Ralink MT7621S SoC is single core, but the GCR_CONFIG method
> - * always reports 2 cores. Check the second core's LAUNCH_FREADY
> - * flag to detect if the second core is missing. This method
> - * only works before the core has been started.
> - */
> - launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
> - launch += 2; /* MT7621 has 2 VPEs per core */
> - if (!(launch->flags & LAUNCH_FREADY))
> - ncores = 1;
> - }
> -
> - return ncores;
> + return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> }
>
> /**
> --
> 2.33.0
>

2021-09-30 22:59:48

by Greg Ungerer

[permalink] [raw]
Subject: Re: [PATCH] MIPS: Revert "add support for buggy MT7621S core detection"


On 1/10/21 2:57 am, Ilya Lipnitskiy wrote:
> This reverts commit 6decd1aad15f56b169217789630a0098b496de0e. CPULAUNCH
> register is not set properly by some bootloaders, causing a regression
> until a bootloader change is made, which is hard if not impossible on
> some embedded devices. Revert the change until a more robust core
> detection mechanism that works on MT7621S routers such as Netgear R6220
> as well as platforms like Digi EX15 can be made.
>
> Link: https://lore.kernel.org/lkml/[email protected]
> Fixes: 6decd1aad15f ("MIPS: add support for buggy MT7621S core detection")
> Signed-off-by: Ilya Lipnitskiy <[email protected]>

Acked-by: Greg Ungerer <[email protected]>

Thanks Ilya for taking care of this.

Regards
Greg


> ---
> arch/mips/include/asm/mips-cps.h | 23 +----------------------
> 1 file changed, 1 insertion(+), 22 deletions(-)
>
> diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h
> index 35fb8ee6dd33..fd43d876892e 100644
> --- a/arch/mips/include/asm/mips-cps.h
> +++ b/arch/mips/include/asm/mips-cps.h
> @@ -10,8 +10,6 @@
> #include <linux/io.h>
> #include <linux/types.h>
>
> -#include <asm/mips-boards/launch.h>
> -
> extern unsigned long __cps_access_bad_size(void)
> __compiletime_error("Bad size for CPS accessor");
>
> @@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
> */
> static inline unsigned int mips_cps_numcores(unsigned int cluster)
> {
> - unsigned int ncores;
> -
> if (!mips_cm_present())
> return 0;
>
> /* Add one before masking to handle 0xff indicating no cores */
> - ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> -
> - if (IS_ENABLED(CONFIG_SOC_MT7621)) {
> - struct cpulaunch *launch;
> -
> - /*
> - * Ralink MT7621S SoC is single core, but the GCR_CONFIG method
> - * always reports 2 cores. Check the second core's LAUNCH_FREADY
> - * flag to detect if the second core is missing. This method
> - * only works before the core has been started.
> - */
> - launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
> - launch += 2; /* MT7621 has 2 VPEs per core */
> - if (!(launch->flags & LAUNCH_FREADY))
> - ncores = 1;
> - }
> -
> - return ncores;
> + return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
> }
>
> /**
>

2021-10-02 08:45:03

by Thomas Bogendoerfer

[permalink] [raw]
Subject: Re: [PATCH] MIPS: Revert "add support for buggy MT7621S core detection"

On Thu, Sep 30, 2021 at 09:57:41AM -0700, Ilya Lipnitskiy wrote:
> This reverts commit 6decd1aad15f56b169217789630a0098b496de0e. CPULAUNCH
> register is not set properly by some bootloaders, causing a regression
> until a bootloader change is made, which is hard if not impossible on
> some embedded devices. Revert the change until a more robust core
> detection mechanism that works on MT7621S routers such as Netgear R6220
> as well as platforms like Digi EX15 can be made.
>
> Link: https://lore.kernel.org/lkml/[email protected]
> Fixes: 6decd1aad15f ("MIPS: add support for buggy MT7621S core detection")
> Signed-off-by: Ilya Lipnitskiy <[email protected]>
> ---
> arch/mips/include/asm/mips-cps.h | 23 +----------------------
> 1 file changed, 1 insertion(+), 22 deletions(-)

applied to mips-fixes.

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]