In the old code, the value calculated RPM_FROM_REG is misleading. The
left-hand side of the division is correct (as per the datasheet, page
11). The misleading part is the right-hand side: the datasheet says it
is should be "number of pulses * TACH count". The TACH count is the
value of the register which is a 11-bit left-justified value. This means
that the register value should be shifted by 5 if we want the actual
value. However, in the old code, the value is shifted by 4 with no way
to set the pulses per revolution. This essentially means, that the
default pulses per revolution is 2, because shifting the right-hand side
one less bit means that the final value is doubled by 2. In the end,
what happens is, that the old code works as if fan*_pulses had the
default value of 2 all the time. This is somewhat correct, but in my
opinion the intention isn't entirely clear, at first glance, shifting by
4 instead of 5 seems like a bug (after one checks the datasheet).
Pulses per revolution should be a configurable because otherwise there's
no way to correctly calculate the RPM of the fan. This patch adds the
option to set pulses per revolution.
The hwmon documentation for fan*_pulses says that it shouldn't be
present unless the chip has a register to save this value. This seems
non-sensical, because setting the pulses is essential to properly
calculate RPM. The value is saved inside the driver's data structure.
Signed-off-by: Václav Kubernát <[email protected]>
---
Documentation/hwmon/max31790.rst | 1 +
drivers/hwmon/max31790.c | 57 +++++++++++++++++++++-----------
2 files changed, 39 insertions(+), 19 deletions(-)
diff --git a/Documentation/hwmon/max31790.rst b/Documentation/hwmon/max31790.rst
index 8979c8a02cd1..8d86698b25de 100644
--- a/Documentation/hwmon/max31790.rst
+++ b/Documentation/hwmon/max31790.rst
@@ -36,6 +36,7 @@ Sysfs entries
================== === =============================================================
fan[1-12]_enable RW enable fan speed monitoring
+fan[1-12]_pulses RW pulses per fan revolution (default: 2)
fan[1-12]_input RO fan tachometer speed in RPM
fan[1-12]_fault RO fan experienced fault
fan[1-6]_target RW desired fan speed in RPM
diff --git a/drivers/hwmon/max31790.c b/drivers/hwmon/max31790.c
index eca5ec615734..74a81e5e3383 100644
--- a/drivers/hwmon/max31790.c
+++ b/drivers/hwmon/max31790.c
@@ -41,10 +41,12 @@
#define FAN_RPM_MAX 7864320
#define MAX_PWM 0XFF80
-#define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
- ((60 * (sr) * 8192) / ((reg) >> 4)) : \
- FAN_RPM_MAX)
-#define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
+#define RPM_FROM_REG(reg, sr, pulses) \
+ (((reg) >> 5) ? \
+ ((60 * (sr) * 8192) / ((reg) >> 5) / (pulses)) : \
+ FAN_RPM_MAX)
+#define RPM_TO_REG(rpm, sr, pulses) \
+ ((60 * (sr) * 8192) / ((rpm) * (pulses)))
#define NR_CHANNEL 6
@@ -81,6 +83,7 @@ struct max31790_data {
bool valid; /* zero until following fields are valid */
unsigned long last_updated; /* in jiffies */
bool full_speed[NR_CHANNEL];
+ u8 pulses[NR_CHANNEL];
/* register values */
u8 fan_config[NR_CHANNEL];
@@ -217,12 +220,16 @@ static int max31790_read_fan(struct device *dev, u32 attr, int channel,
switch (attr) {
case hwmon_fan_input:
sr = get_tach_period(data->fan_dynamics[channel]);
- rpm = RPM_FROM_REG(data->tach[channel], sr);
+ rpm = RPM_FROM_REG(data->tach[channel],
+ sr,
+ data->pulses[channel]);
*val = rpm;
return 0;
case hwmon_fan_target:
sr = get_tach_period(data->fan_dynamics[channel]);
- rpm = RPM_FROM_REG(data->target_count[channel], sr);
+ rpm = RPM_FROM_REG(data->target_count[channel],
+ sr,
+ data->pulses[channel]);
*val = rpm;
return 0;
case hwmon_fan_fault:
@@ -231,6 +238,9 @@ static int max31790_read_fan(struct device *dev, u32 attr, int channel,
case hwmon_fan_enable:
*val = !!(data->fan_config[channel] & MAX31790_FAN_CFG_TACH_INPUT_EN);
return 0;
+ case hwmon_fan_pulses:
+ *val = data->pulses[channel];
+ return 0;
default:
return -EOPNOTSUPP;
}
@@ -264,7 +274,7 @@ static int max31790_write_fan(struct device *dev, u32 attr, int channel,
break;
sr = get_tach_period(data->fan_dynamics[channel]);
- target_count = RPM_TO_REG(val, sr);
+ target_count = RPM_TO_REG(val, sr, data->pulses[channel]);
target_count = clamp_val(target_count, 0x1, 0x7FF);
data->target_count[channel] = target_count << 5;
@@ -285,6 +295,9 @@ static int max31790_write_fan(struct device *dev, u32 attr, int channel,
MAX31790_REG_FAN_CONFIG(channel),
data->fan_config[channel]);
break;
+ case hwmon_fan_pulses:
+ data->pulses[channel] = val;
+ break;
default:
err = -EOPNOTSUPP;
break;
@@ -317,6 +330,10 @@ static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
return 0644;
return 0;
+ case hwmon_fan_pulses:
+ if (channel < NR_CHANNEL)
+ return 0644;
+ return 0;
default:
return 0;
}
@@ -486,18 +503,18 @@ static umode_t max31790_is_visible(const void *data,
static const struct hwmon_channel_info *max31790_info[] = {
HWMON_CHANNEL_INFO(fan,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
- HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT),
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT,
+ HWMON_F_PULSES | HWMON_F_ENABLE | HWMON_F_INPUT | HWMON_F_FAULT),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
@@ -534,6 +551,8 @@ static int max31790_init_client(struct regmap *regmap,
data->full_speed[i] = false;
+ data->pulses[i] = 2;
+
rv = regmap_read(regmap,
MAX31790_REG_FAN_DYNAMICS(i),
&val);
--
2.30.1
> @@ -285,6 +295,9 @@ static int max31790_write_fan(struct device
> *dev, u32 attr, int channel,
> MAX31790_REG_FAN_CONFIG(channel),
> data->fan_config[channel]);
> break;
> + case hwmon_fan_pulses:
> + data->pulses[channel] = val;
> + break;
This needs input validation, otherwise it's possible to write 0 in there
and you get a division-by-zero in the kernel context:
[102109.999968] Division by zero in kernel.
[102110.003917] CPU: 1 PID: 27590 Comm: cat Not tainted 5.9.3-cla-cfb #42
[102110.010462] Hardware name: Marvell Armada 380/385 (Device Tree)
[102110.016497] [<c010f16c>] (unwind_backtrace) from [<c010ae40>]
(show_stack+0x10/0x14)
[102110.024355] [<c010ae40>] (show_stack) from [<c083ba30>]
(dump_stack+0x94/0xa8)
[102110.031689] [<c083ba30>] (dump_stack) from [<c083a3fc>]
(Ldiv0+0x8/0x2c)
[102110.038499] [<c083a3fc>] (Ldiv0) from [<c064c1ac>]
(max31790_read+0x174/0x204)
[102110.045836] [<c064c1ac>] (max31790_read) from [<c0646fdc>]
(hwmon_attr_show+0x44/0x138)
...
A similar error can also happen when setting the fan speed to 0 RPM.
That's, however, not an error caused by this patch series AFAIK. I *think*
that RPM_TO_REG should be changed to check if `rpm` is 0, and if so, set
the register directly to the maximal value of 0x7ff (in another patch).
With kind regards,
Jan
Thanks, I will include fixes in v2 of the patches.
By the way, I'd like to mention that Jan is my colleague.
Václav
pá 5. 3. 2021 v 13:08 odesílatel Jan Kundrát <[email protected]> napsal:
>
> > @@ -285,6 +295,9 @@ static int max31790_write_fan(struct device
> > *dev, u32 attr, int channel,
> > MAX31790_REG_FAN_CONFIG(channel),
> > data->fan_config[channel]);
> > break;
> > + case hwmon_fan_pulses:
> > + data->pulses[channel] = val;
> > + break;
>
> This needs input validation, otherwise it's possible to write 0 in there
> and you get a division-by-zero in the kernel context:
>
> [102109.999968] Division by zero in kernel.
> [102110.003917] CPU: 1 PID: 27590 Comm: cat Not tainted 5.9.3-cla-cfb #42
> [102110.010462] Hardware name: Marvell Armada 380/385 (Device Tree)
> [102110.016497] [<c010f16c>] (unwind_backtrace) from [<c010ae40>]
> (show_stack+0x10/0x14)
> [102110.024355] [<c010ae40>] (show_stack) from [<c083ba30>]
> (dump_stack+0x94/0xa8)
> [102110.031689] [<c083ba30>] (dump_stack) from [<c083a3fc>]
> (Ldiv0+0x8/0x2c)
> [102110.038499] [<c083a3fc>] (Ldiv0) from [<c064c1ac>]
> (max31790_read+0x174/0x204)
> [102110.045836] [<c064c1ac>] (max31790_read) from [<c0646fdc>]
> (hwmon_attr_show+0x44/0x138)
> ...
>
> A similar error can also happen when setting the fan speed to 0 RPM.
> That's, however, not an error caused by this patch series AFAIK. I *think*
> that RPM_TO_REG should be changed to check if `rpm` is 0, and if so, set
> the register directly to the maximal value of 0x7ff (in another patch).
>
> With kind regards,
> Jan