2017-10-18 17:45:15

by Maciej W. Rozycki

[permalink] [raw]
Subject: Re: [PATCH] MIPS: Fix exception entry when CONFIG_EVA enabled

On Wed, 11 Oct 2017, Matt Redfearn wrote:

> diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> index 5d3563c55e0c..2161357cc68f 100644
> --- a/arch/mips/include/asm/stackframe.h
> +++ b/arch/mips/include/asm/stackframe.h
> @@ -199,6 +199,10 @@
> sll k0, 3 /* extract cu0 bit */
> .set noreorder
> bltz k0, 8f
> + move k0, sp
> + .if \docfi
> + .cfi_register sp, k0
> + .endif

Using $k1 for the Status.CU0 check would let us get rid of the
`noreorder' block, making this code less fragile at no run-time cost,
i.e.:

mfc0 k1, CP0_STATUS
sll k1, 3
move k0, sp
bltz k1, 8f

(unfortunately I can't see a way to usefully fill the coprocessor move
delay slot automatically scheduled by GAS here between MFC0 and SLL for
processors that require it).

Maciej

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