2021-02-09 05:13:26

by Tiezhu Yang

Subject: [PATCH v2] MIPS: Make check condition for SDBBP consistent with EJTAG spec

According to MIPS EJTAG Specification [1], a Debug Breakpoint
exception occurs when an SDBBP instruction is executed, the
CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
occurred, just check bit DBp for SDBBP is more accurate.

[1] http://www.t-es-t.hu/download/mips/md00047f.pdf

Signed-off-by: Tiezhu Yang <[email protected]>
---

v2: add MIPS_DEBUG_DBP definition

arch/mips/include/asm/mipsregs.h | 4 ++++
arch/mips/kernel/genex.S | 4 ++--
2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a0e8ae5..9c8099a 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1085,6 +1085,10 @@
#define CVMVMCONF_RMMUSIZEM1_S 0
#define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S)

+/* Debug register field definitions */
+#define MIPS_DEBUG_DBP_SHIFT 1
+#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT)
+
/*
* Coprocessor 1 (FPU) register names
*/
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index bcce32a..743d759 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
MTC0 k0, CP0_DESAVE
mfc0 k0, CP0_DEBUG

- sll k0, k0, 30 # Check for SDBBP.
- bgez k0, ejtag_return
+ andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP.
+ beqz k0, ejtag_return

#ifdef CONFIG_SMP
1: PTR_LA k0, ejtag_debug_buffer_spinlock
--
2.1.0

2021-02-10 03:39:28

by Thomas Bogendoerfer

Subject: Re: [PATCH v2] MIPS: Make check condition for SDBBP consistent with EJTAG spec

On Tue, Feb 09, 2021 at 01:05:25PM +0800, Tiezhu Yang wrote:
> According to MIPS EJTAG Specification [1], a Debug Breakpoint
> exception occurs when an SDBBP instruction is executed, the
> CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
> occurred, just check bit DBp for SDBBP is more accurate.
>
> [1] http://www.t-es-t.hu/download/mips/md00047f.pdf
>
> Signed-off-by: Tiezhu Yang <[email protected]>
> ---
>
> v2: add MIPS_DEBUG_DBP definition
>
> arch/mips/include/asm/mipsregs.h | 4 ++++
> arch/mips/kernel/genex.S | 4 ++--
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
> index a0e8ae5..9c8099a 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -1085,6 +1085,10 @@
> #define CVMVMCONF_RMMUSIZEM1_S 0
> #define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S)
>
> +/* Debug register field definitions */
> +#define MIPS_DEBUG_DBP_SHIFT 1
> +#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT)
> +
> /*
> * Coprocessor 1 (FPU) register names
> */
> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> index bcce32a..743d759 100644
> --- a/arch/mips/kernel/genex.S
> +++ b/arch/mips/kernel/genex.S
> @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
> MTC0 k0, CP0_DESAVE
> mfc0 k0, CP0_DEBUG
>
> - sll k0, k0, 30 # Check for SDBBP.
> - bgez k0, ejtag_return
> + andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP.
> + beqz k0, ejtag_return

IMHO both implementations are doing the same thing.

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]

2021-02-10 03:43:28

by Tiezhu Yang

Subject: Re: [PATCH v2] MIPS: Make check condition for SDBBP consistent with EJTAG spec

On 02/09/2021 08:11 PM, Thomas Bogendoerfer wrote:
> On Tue, Feb 09, 2021 at 01:05:25PM +0800, Tiezhu Yang wrote:
>> According to MIPS EJTAG Specification [1], a Debug Breakpoint
>> exception occurs when an SDBBP instruction is executed, the
>> CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
>> occurred, just check bit DBp for SDBBP is more accurate.
>>
>> [1] http://www.t-es-t.hu/download/mips/md00047f.pdf
>>
>> Signed-off-by: Tiezhu Yang <[email protected]>
>> ---
>>
>> v2: add MIPS_DEBUG_DBP definition
>>
>> arch/mips/include/asm/mipsregs.h | 4 ++++
>> arch/mips/kernel/genex.S | 4 ++--
>> 2 files changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
>> index a0e8ae5..9c8099a 100644
>> --- a/arch/mips/include/asm/mipsregs.h
>> +++ b/arch/mips/include/asm/mipsregs.h
>> @@ -1085,6 +1085,10 @@
>> #define CVMVMCONF_RMMUSIZEM1_S 0
>> #define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S)
>>
>> +/* Debug register field definitions */
>> +#define MIPS_DEBUG_DBP_SHIFT 1
>> +#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT)
>> +
>> /*
>> * Coprocessor 1 (FPU) register names
>> */
>> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
>> index bcce32a..743d759 100644
>> --- a/arch/mips/kernel/genex.S
>> +++ b/arch/mips/kernel/genex.S
>> @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
>> MTC0 k0, CP0_DESAVE
>> mfc0 k0, CP0_DEBUG
>>
>> - sll k0, k0, 30 # Check for SDBBP.
>> - bgez k0, ejtag_return
>> + andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP.
>> + beqz k0, ejtag_return
> IMHO both implementations are doing the same thing.

When I read the original code, it looks a little confusing
at first glance, the initial aim of this patch is to make the code
more readable and easier to understand.

>
> Thomas.
>

2021-02-10 05:09:19

by Thomas Bogendoerfer

Subject: Re: [PATCH v2] MIPS: Make check condition for SDBBP consistent with EJTAG spec

On Tue, Feb 09, 2021 at 09:09:52PM +0800, Tiezhu Yang wrote:
> On 02/09/2021 08:11 PM, Thomas Bogendoerfer wrote:
> > On Tue, Feb 09, 2021 at 01:05:25PM +0800, Tiezhu Yang wrote:
> > > According to MIPS EJTAG Specification [1], a Debug Breakpoint
> > > exception occurs when an SDBBP instruction is executed, the
> > > CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
> > > occurred, just check bit DBp for SDBBP is more accurate.
> > >
> > > [1] http://www.t-es-t.hu/download/mips/md00047f.pdf
> > >
> > > Signed-off-by: Tiezhu Yang <[email protected]>
> > > ---
> > >
> > > v2: add MIPS_DEBUG_DBP definition
> > >
> > > arch/mips/include/asm/mipsregs.h | 4 ++++
> > > arch/mips/kernel/genex.S | 4 ++--
> > > 2 files changed, 6 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
> > > index a0e8ae5..9c8099a 100644
> > > --- a/arch/mips/include/asm/mipsregs.h
> > > +++ b/arch/mips/include/asm/mipsregs.h
> > > @@ -1085,6 +1085,10 @@
> > > #define CVMVMCONF_RMMUSIZEM1_S 0
> > > #define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S)
> > > +/* Debug register field definitions */
> > > +#define MIPS_DEBUG_DBP_SHIFT 1
> > > +#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT)
> > > +
> > > /*
> > > * Coprocessor 1 (FPU) register names
> > > */
> > > diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> > > index bcce32a..743d759 100644
> > > --- a/arch/mips/kernel/genex.S
> > > +++ b/arch/mips/kernel/genex.S
> > > @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
> > > MTC0 k0, CP0_DESAVE
> > > mfc0 k0, CP0_DEBUG
> > > - sll k0, k0, 30 # Check for SDBBP.
> > > - bgez k0, ejtag_return
> > > + andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP.
> > > + beqz k0, ejtag_return
> > IMHO both implementations are doing the same thing.
>
> When I read the original code, it looks a little confusing
> at first glance, the initial aim of this patch is to make the code
> more readable and easier to understand.

which your version is, but the description sounds like there is a semantic
change somewhere (at least to me). So with a little bit rewording I'm
fine with applying your patch.

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]

2021-02-16 14:10:12

by Maciej W. Rozycki

Subject: Re: [PATCH v2] MIPS: Make check condition for SDBBP consistent with EJTAG spec

On Tue, 9 Feb 2021, Thomas Bogendoerfer wrote:

> > > > diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> > > > index bcce32a..743d759 100644
> > > > --- a/arch/mips/kernel/genex.S
> > > > +++ b/arch/mips/kernel/genex.S
> > > > @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
> > > > MTC0 k0, CP0_DESAVE
> > > > mfc0 k0, CP0_DEBUG
> > > > - sll k0, k0, 30 # Check for SDBBP.
> > > > - bgez k0, ejtag_return
> > > > + andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP.
> > > > + beqz k0, ejtag_return
> > > IMHO both implementations are doing the same thing.
> >
> > When I read the original code, it looks a little confusing
> > at first glance, the initial aim of this patch is to make the code
> > more readable and easier to understand.
>
> which your version is, but the description sounds like there is a semantic
> change somewhere (at least to me). So with a little bit rewording I'm
> fine with applying your patch.

Why is it confusing? This is assembly and you're supposed to understand
this stuff when looking into it. Don't fix what ain't broke!

Maciej