2022-09-17 12:20:16

by Maciej W. Rozycki

Subject: [PATCH v5 1/5] PCI: Consistently report presence of PCIe link registers

Consistently with commit c8b303d0206b ("PCI: Remove PCIe Capability
version checks") only consider the PCI Express capability's Link Control
2, etc. registers present if the Link Control register is.

Before said commit with PCI Express capability versions higher than one
all link registers used to be considered present, however starting from
said commit Link Control, etc. original registers are only considered
present in devices with links, but Link Control 2, etc. registers
continue being considered always present even though likewise they are
only present in devices with links.

Fix the inconsistency then.

Signed-off-by: Maciej W. Rozycki <[email protected]>
---
New change in v5.
---
drivers/pci/access.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)

linux-pcie-cap-has-lnkctl2.diff
Index: linux-macro/drivers/pci/access.c
===================================================================
--- linux-macro.orig/drivers/pci/access.c
+++ linux-macro/drivers/pci/access.c
@@ -350,6 +350,11 @@ bool pcie_cap_has_lnkctl(const struct pc
type == PCI_EXP_TYPE_PCIE_BRIDGE;
}

+static inline bool pcie_cap_has_lnkctl2(const struct pci_dev *dev)
+{
+ return pcie_cap_has_lnkctl(dev) && pcie_cap_version(dev) > 1;
+}
+
static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
{
return pcie_downstream_port(dev) &&
@@ -390,10 +395,11 @@ static bool pcie_capability_reg_implemen
return pcie_cap_has_rtctl(dev);
case PCI_EXP_DEVCAP2:
case PCI_EXP_DEVCTL2:
+ return pcie_cap_version(dev) > 1;
case PCI_EXP_LNKCAP2:
case PCI_EXP_LNKCTL2:
case PCI_EXP_LNKSTA2:
- return pcie_cap_version(dev) > 1;
+ return pcie_cap_has_lnkctl2(dev);
default:
return false;
}

2022-11-07 21:59:48

by Bjorn Helgaas

Subject: Re: [PATCH v5 1/5] PCI: Consistently report presence of PCIe link registers

On Sat, Sep 17, 2022 at 01:03:09PM +0100, Maciej W. Rozycki wrote:
> Consistently with commit c8b303d0206b ("PCI: Remove PCIe Capability
> version checks") only consider the PCI Express capability's Link Control
> 2, etc. registers present if the Link Control register is.
>
> Before said commit with PCI Express capability versions higher than one
> all link registers used to be considered present, however starting from
> said commit Link Control, etc. original registers are only considered
> present in devices with links, but Link Control 2, etc. registers
> continue being considered always present even though likewise they are
> only present in devices with links.
>
> Fix the inconsistency then.
>
> Signed-off-by: Maciej W. Rozycki <[email protected]>

While we figure out the rest of this, I squashed the first two patches
and applied them to pci/enumeration for v6.2:

commit 503fa23614dc ("PCI: Access Link 2 registers only for devices with Links")
Author: Maciej W. Rozycki <[email protected]>
Date: Sat Sep 17 13:03:09 2022 +0100

PCI: Access Link 2 registers only for devices with Links

PCIe r2.0, sec 7.8 added Link Capabilities/Status/Control 2 registers to
the PCIe Capability with Capability Version 2.

Previously we assumed these registers were implemented for all PCIe
Capabilities of version 2 or greater, but in fact they are only
implemented for devices with Links.

Update pcie_capability_reg_implemented() to check whether the device has
a Link.

> ---
> New change in v5.
> ---
> drivers/pci/access.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> linux-pcie-cap-has-lnkctl2.diff
> Index: linux-macro/drivers/pci/access.c
> ===================================================================
> --- linux-macro.orig/drivers/pci/access.c
> +++ linux-macro/drivers/pci/access.c
> @@ -350,6 +350,11 @@ bool pcie_cap_has_lnkctl(const struct pc
> type == PCI_EXP_TYPE_PCIE_BRIDGE;
> }
>
> +static inline bool pcie_cap_has_lnkctl2(const struct pci_dev *dev)
> +{
> + return pcie_cap_has_lnkctl(dev) && pcie_cap_version(dev) > 1;
> +}
> +
> static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
> {
> return pcie_downstream_port(dev) &&
> @@ -390,10 +395,11 @@ static bool pcie_capability_reg_implemen
> return pcie_cap_has_rtctl(dev);
> case PCI_EXP_DEVCAP2:
> case PCI_EXP_DEVCTL2:
> + return pcie_cap_version(dev) > 1;
> case PCI_EXP_LNKCAP2:
> case PCI_EXP_LNKCTL2:
> case PCI_EXP_LNKSTA2:
> - return pcie_cap_version(dev) > 1;
> + return pcie_cap_has_lnkctl2(dev);
> default:
> return false;
> }