From: Frank Wunderlich <[email protected]>
Subject: [RFC PATCH 0/2] move/add display relevant nodes to mt7623n
based on series from David Woodhouse [1]
i moved more display-nodes out of mt7623.dtsi to new mt7623n.dtsi
and changed last part from my series [2] to add these nodes to this new dtsi
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=329209
[2] https://patchwork.kernel.org/patch/11700699/
Frank Wunderlich (1):
arm: dts: mt7623: move more display-related nodes to mt7623n.dtsi
Ryder Lee (1):
arm: dts: mt7623: add display subsystem related device nodes
arch/arm/boot/dts/mt7623.dtsi | 99 -------
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 +++++
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 +++++
arch/arm/boot/dts/mt7623n.dtsi | 270 ++++++++++++++++++
4 files changed, 414 insertions(+), 99 deletions(-)
--
2.25.1
From: Ryder Lee <[email protected]>
Add display subsystem related device nodes for MT7623.
Cc: Chun-Kuang Hu <[email protected]>
Signed-off-by: chunhui dai <[email protected]>
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Tested-by: Frank Wunderlich <[email protected]>
---
changed
v4->v5:
add nodes to new mt7623n.dtsi to avoid conflict with mt7623a
v3->v4:
drop display_components which is duplicate of existing mmsys
v2->v3:
drop bls to dpi routing
---
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 ++++++++
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 ++++++++
arch/arm/boot/dts/mt7623n.dtsi | 171 ++++++++++++++++++
3 files changed, 315 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 344f8c65c4aa..f41f221e56ca 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -21,6 +21,19 @@ chosen {
stdout-path = "serial2:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "d";
+ ddc-i2c-bus = <&hdmiddc0>;
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi0_out>;
+ };
+ };
+ };
+
cpus {
cpu@0 {
proc-supply = <&mt6323_vproc_reg>;
@@ -114,10 +127,18 @@ memory@80000000 {
};
};
+&bls {
+ status = "okay";
+};
+
&btif {
status = "okay";
};
+&cec {
+ status = "okay";
+};
+
&cir {
pinctrl-names = "default";
pinctrl-0 = <&cir_pins_a>;
@@ -128,6 +149,21 @@ &crypto {
status = "okay";
};
+&dpi0 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ dpi0_out: endpoint {
+ remote-endpoint = <&hdmi0_in>;
+ };
+ };
+ };
+};
+
ð {
status = "okay";
@@ -199,6 +235,42 @@ fixed-link {
};
};
+&hdmi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins_a>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ hdmi0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+};
+
+&hdmiddc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
+ status = "okay";
+};
+
+&hdmi_phy {
+ mediatek,ibias = <0xa>;
+ mediatek,ibias_up = <0x1c>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
index f8efcc364bc3..1b9b9a8145a7 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
@@ -24,6 +24,19 @@ chosen {
stdout-path = "serial2:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "d";
+ ddc-i2c-bus = <&hdmiddc0>;
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi0_out>;
+ };
+ };
+ };
+
cpus {
cpu@0 {
proc-supply = <&mt6323_vproc_reg>;
@@ -106,10 +119,18 @@ sound {
};
};
+&bls {
+ status = "okay";
+};
+
&btif {
status = "okay";
};
+&cec {
+ status = "okay";
+};
+
&cir {
pinctrl-names = "default";
pinctrl-0 = <&cir_pins_a>;
@@ -120,6 +141,21 @@ &crypto {
status = "okay";
};
+&dpi0 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ dpi0_out: endpoint {
+ remote-endpoint = <&hdmi0_in>;
+ };
+ };
+ };
+};
+
ð {
status = "okay";
@@ -203,6 +239,42 @@ fixed-link {
};
};
+&hdmi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins_a>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ hdmi0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+};
+
+&hdmiddc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_ddc_pins_a>;
+ status = "okay";
+};
+
+&hdmi_phy {
+ mediatek,ibias = <0xa>;
+ mediatek,ibias_up = <0x1c>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi
index a47e82468895..61545fc541c4 100644
--- a/arch/arm/boot/dts/mt7623n.dtsi
+++ b/arch/arm/boot/dts/mt7623n.dtsi
@@ -10,6 +10,10 @@
#include <dt-bindings/memory/mt2701-larb-port.h>
/ {
+ aliases {
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ };
g3dsys: syscon@13000000 {
compatible = "mediatek,mt7623-g3dsys",
"mediatek,mt2701-g3dsys",
@@ -131,4 +135,171 @@ smi_common: smi@1000c000 {
clock-names = "apb", "smi", "async";
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};
+
+ ovl: ovl@14007000 {
+ compatible = "mediatek,mt7623-disp-ovl",
+ "mediatek,mt2701-disp-ovl";
+ reg = <0 0x14007000 0 0x1000>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_OVL>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
+ mediatek,larb = <&larb0>;
+ };
+
+ rdma0: rdma@14008000 {
+ compatible = "mediatek,mt7623-disp-rdma",
+ "mediatek,mt2701-disp-rdma";
+ reg = <0 0x14008000 0 0x1000>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
+ mediatek,larb = <&larb0>;
+ };
+
+ wdma@14009000 {
+ compatible = "mediatek,mt7623-disp-wdma",
+ "mediatek,mt2701-disp-wdma";
+ reg = <0 0x14009000 0 0x1000>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_WDMA>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
+ mediatek,larb = <&larb0>;
+ };
+
+ bls: pwm@1400a000 {
+ compatible = "mediatek,mt7623-disp-pwm",
+ "mediatek,mt2701-disp-pwm";
+ reg = <0 0x1400a000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
+ <&mmsys CLK_MM_DISP_BLS>;
+ clock-names = "main", "mm";
+ status = "disabled";
+ };
+
+ color: color@1400b000 {
+ compatible = "mediatek,mt7623-disp-color",
+ "mediatek,mt2701-disp-color";
+ reg = <0 0x1400b000 0 0x1000>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR>;
+ };
+
+ dsi: dsi@1400c000 {
+ compatible = "mediatek,mt7623-dsi",
+ "mediatek,mt2701-dsi";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DSI_ENGINE>,
+ <&mmsys CLK_MM_DSI_DIG>,
+ <&mipi_tx0>;
+ clock-names = "engine", "digital", "hs";
+ phys = <&mipi_tx0>;
+ phy-names = "dphy";
+ status = "disabled";
+ };
+
+ mutex: mutex@1400e000 {
+ compatible = "mediatek,mt7623-disp-mutex",
+ "mediatek,mt2701-disp-mutex";
+ reg = <0 0x1400e000 0 0x1000>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_MUTEX_32K>;
+ };
+
+ rdma1: rdma@14012000 {
+ compatible = "mediatek,mt7623-disp-rdma",
+ "mediatek,mt2701-disp-rdma";
+ reg = <0 0x14012000 0 0x1000>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+ iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
+ mediatek,larb = <&larb0>;
+ };
+
+ dpi0: dpi@14014000 {
+ compatible = "mediatek,mt7623-dpi",
+ "mediatek,mt2701-dpi";
+ reg = <0 0x14014000 0 0x1000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&mmsys CLK_MM_DPI1_DIGL>,
+ <&mmsys CLK_MM_DPI1_ENGINE>,
+ <&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ status = "disabled";
+ };
+
+ hdmi0: hdmi@14015000 {
+ compatible = "mediatek,mt7623-hdmi",
+ "mediatek,mt8173-hdmi";
+ reg = <0 0x14015000 0 0x400>;
+ clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
+ <&mmsys CLK_MM_HDMI_PLL>,
+ <&mmsys CLK_MM_HDMI_AUDIO>,
+ <&mmsys CLK_MM_HDMI_SPDIF>;
+ clock-names = "pixel", "pll", "bclk", "spdif";
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi";
+ mediatek,syscon-hdmi = <&mmsys 0x900>;
+ cec = <&cec>;
+ status = "disabled";
+ };
+
+ mipi_tx0: mipi-dphy@10010000 {
+ compatible = "mediatek,mt7623-mipi-tx",
+ "mediatek,mt2701-mipi-tx";
+ reg = <0 0x10010000 0 0x90>;
+ clocks = <&clk26m>;
+ clock-output-names = "mipi_tx0_pll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ };
+
+ cec: cec@10012000 {
+ compatible = "mediatek,mt7623-cec",
+ "mediatek,mt8173-cec";
+ reg = <0 0x10012000 0 0xbc>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_CEC>;
+ status = "disabled";
+ };
+
+ hdmi_phy: phy@10209100 {
+ compatible = "mediatek,mt7623-hdmi-phy",
+ "mediatek,mt2701-hdmi-phy";
+ reg = <0 0x10209100 0 0x24>;
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
+ clock-names = "pll_ref";
+ clock-output-names = "hdmitx_dig_cts";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ hdmiddc0: i2c@11013000 {
+ compatible = "mediatek,mt7623-hdmi-ddc",
+ "mediatek,mt8173-hdmi-ddc";
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
+ reg = <0 0x11013000 0 0x1C>;
+ clocks = <&pericfg CLK_PERI_I2C3>;
+ clock-names = "ddc-i2c";
+ status = "disabled";
+ };
+};
+
+&pio {
+ hdmi_pins_a: hdmi-default {
+ pins-hdmi {
+ pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>;
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ hdmi_ddc_pins_a: hdmi_ddc-default {
+ pins-hdmi-ddc {
+ pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>,
+ <MT7623_PIN_125_GPIO125_FUNC_HDMISD>;
+ };
+ };
};
--
2.25.1
From: Frank Wunderlich <[email protected]>
mt7623a has no graphics support so move nodes
from generic mt7623.dtsi to mt7623n.dtsi
Signed-off-by: Frank Wunderlich <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 99 ----------------------------------
arch/arm/boot/dts/mt7623n.dtsi | 99 ++++++++++++++++++++++++++++++++++
2 files changed, 99 insertions(+), 99 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index d94f24eb7f43..d09b5671c91b 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -14,7 +14,6 @@
#include <dt-bindings/power/mt2701-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include <dt-bindings/thermal/thermal.h>
@@ -297,17 +296,6 @@ timer: timer@10008000 {
clock-names = "system-clk", "rtc-clk";
};
- smi_common: smi@1000c000 {
- compatible = "mediatek,mt7623-smi-common",
- "mediatek,mt2701-smi-common";
- reg = <0 0x1000c000 0 0x1000>;
- clocks = <&infracfg CLK_INFRA_SMI>,
- <&mmsys CLK_MM_SMI_COMMON>,
- <&infracfg CLK_INFRA_SMI>;
- clock-names = "apb", "smi", "async";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
- };
-
pwrap: pwrap@1000d000 {
compatible = "mediatek,mt7623-pwrap",
"mediatek,mt2701-pwrap";
@@ -339,17 +327,6 @@ sysirq: interrupt-controller@10200100 {
reg = <0 0x10200100 0 0x1c>;
};
- iommu: mmsys_iommu@10205000 {
- compatible = "mediatek,mt7623-m4u",
- "mediatek,mt2701-m4u";
- reg = <0 0x10205000 0 0x1000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&infracfg CLK_INFRA_M4U>;
- clock-names = "bclk";
- mediatek,larbs = <&larb0 &larb1 &larb2>;
- #iommu-cells = <1>;
- };
-
efuse: efuse@10206000 {
compatible = "mediatek,mt7623-efuse",
"mediatek,mt8173-efuse";
@@ -725,70 +702,6 @@ mmc0: mmc@11230000 {
status = "disabled";
};
- g3dsys: syscon@13000000 {
- compatible = "mediatek,mt7623-g3dsys",
- "mediatek,mt2701-g3dsys",
- "syscon";
- reg = <0 0x13000000 0 0x200>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- mmsys: syscon@14000000 {
- compatible = "mediatek,mt7623-mmsys",
- "mediatek,mt2701-mmsys",
- "syscon";
- reg = <0 0x14000000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- larb0: larb@14010000 {
- compatible = "mediatek,mt7623-smi-larb",
- "mediatek,mt2701-smi-larb";
- reg = <0 0x14010000 0 0x1000>;
- mediatek,smi = <&smi_common>;
- mediatek,larb-id = <0>;
- clocks = <&mmsys CLK_MM_SMI_LARB0>,
- <&mmsys CLK_MM_SMI_LARB0>;
- clock-names = "apb", "smi";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
- };
-
- imgsys: syscon@15000000 {
- compatible = "mediatek,mt7623-imgsys",
- "mediatek,mt2701-imgsys",
- "syscon";
- reg = <0 0x15000000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- larb2: larb@15001000 {
- compatible = "mediatek,mt7623-smi-larb",
- "mediatek,mt2701-smi-larb";
- reg = <0 0x15001000 0 0x1000>;
- mediatek,smi = <&smi_common>;
- mediatek,larb-id = <2>;
- clocks = <&imgsys CLK_IMG_SMI_COMM>,
- <&imgsys CLK_IMG_SMI_COMM>;
- clock-names = "apb", "smi";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
- };
-
- jpegdec: jpegdec@15004000 {
- compatible = "mediatek,mt7623-jpgdec",
- "mediatek,mt2701-jpgdec";
- reg = <0 0x15004000 0 0x1000>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
- <&imgsys CLK_IMG_JPGDEC>;
- clock-names = "jpgdec-smi",
- "jpgdec";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
- mediatek,larb = <&larb2>;
- iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
- <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
- };
-
vdecsys: syscon@16000000 {
compatible = "mediatek,mt7623-vdecsys",
"mediatek,mt2701-vdecsys",
@@ -797,18 +710,6 @@ vdecsys: syscon@16000000 {
#clock-cells = <1>;
};
- larb1: larb@16010000 {
- compatible = "mediatek,mt7623-smi-larb",
- "mediatek,mt2701-smi-larb";
- reg = <0 0x16010000 0 0x1000>;
- mediatek,smi = <&smi_common>;
- mediatek,larb-id = <1>;
- clocks = <&vdecsys CLK_VDEC_CKGEN>,
- <&vdecsys CLK_VDEC_LARB>;
- clock-names = "apb", "smi";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>;
- };
-
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi
index 7724a4d05b89..a47e82468895 100644
--- a/arch/arm/boot/dts/mt7623n.dtsi
+++ b/arch/arm/boot/dts/mt7623n.dtsi
@@ -7,8 +7,18 @@
*/
#include "mt7623.dtsi"
+#include <dt-bindings/memory/mt2701-larb-port.h>
/ {
+ g3dsys: syscon@13000000 {
+ compatible = "mediatek,mt7623-g3dsys",
+ "mediatek,mt2701-g3dsys",
+ "syscon";
+ reg = <0 0x13000000 0 0x200>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
mali: gpu@13040000 {
compatible = "mediatek,mt7623-mali", "arm,mali-450";
reg = <0 0x13040000 0 0x30000>;
@@ -32,4 +42,93 @@ mali: gpu@13040000 {
power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;
resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;
};
+
+ mmsys: syscon@14000000 {
+ compatible = "mediatek,mt7623-mmsys",
+ "mediatek,mt2701-mmsys",
+ "syscon";
+ reg = <0 0x14000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb0: larb@14010000 {
+ compatible = "mediatek,mt7623-smi-larb",
+ "mediatek,mt2701-smi-larb";
+ reg = <0 0x14010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ mediatek,larb-id = <0>;
+ clocks = <&mmsys CLK_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ };
+
+ larb1: larb@16010000 {
+ compatible = "mediatek,mt7623-smi-larb",
+ "mediatek,mt2701-smi-larb";
+ reg = <0 0x16010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ mediatek,larb-id = <1>;
+ clocks = <&vdecsys CLK_VDEC_CKGEN>,
+ <&vdecsys CLK_VDEC_LARB>;
+ clock-names = "apb", "smi";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>;
+ };
+
+ larb2: larb@15001000 {
+ compatible = "mediatek,mt7623-smi-larb",
+ "mediatek,mt2701-smi-larb";
+ reg = <0 0x15001000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ mediatek,larb-id = <2>;
+ clocks = <&imgsys CLK_IMG_SMI_COMM>,
+ <&imgsys CLK_IMG_SMI_COMM>;
+ clock-names = "apb", "smi";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+ };
+
+ imgsys: syscon@15000000 {
+ compatible = "mediatek,mt7623-imgsys",
+ "mediatek,mt2701-imgsys",
+ "syscon";
+ reg = <0 0x15000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ iommu: mmsys_iommu@10205000 {
+ compatible = "mediatek,mt7623-m4u",
+ "mediatek,mt2701-m4u";
+ reg = <0 0x10205000 0 0x1000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_M4U>;
+ clock-names = "bclk";
+ mediatek,larbs = <&larb0 &larb1 &larb2>;
+ #iommu-cells = <1>;
+ };
+
+ jpegdec: jpegdec@15004000 {
+ compatible = "mediatek,mt7623-jpgdec",
+ "mediatek,mt2701-jpgdec";
+ reg = <0 0x15004000 0 0x1000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
+ <&imgsys CLK_IMG_JPGDEC>;
+ clock-names = "jpgdec-smi",
+ "jpgdec";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+ mediatek,larb = <&larb2>;
+ iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
+ <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
+ };
+
+ smi_common: smi@1000c000 {
+ compatible = "mediatek,mt7623-smi-common",
+ "mediatek,mt2701-smi-common";
+ reg = <0 0x1000c000 0 0x1000>;
+ clocks = <&infracfg CLK_INFRA_SMI>,
+ <&mmsys CLK_MM_SMI_COMMON>,
+ <&infracfg CLK_INFRA_SMI>;
+ clock-names = "apb", "smi", "async";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ };
};
--
2.25.1
Hi,
as i made a mistake in cover-letter, it is not assigned to the series.
to show its content, i send it here as comment (instead of resending the whole series):
based on series from David Woodhouse [1]
i moved more display-nodes out of mt7623.dtsi to new mt7623n.dtsi
and changed last part from my series [2] to add these nodes to this new dtsi
the depency of dtsi-dtsi-dts is already done for mt7623a, so i guess it's a good
way to use it for mt7623n too.
this first set is an RFC if all nodes are in right order and if it is wanted to move
them out as i have no technical document about mt7623a/n which describes which parts
are available on both or only on one of them
added MTK DRM Maintainer CK Hu, Ryder Lee and Sean Wang, maybe they can give me some advice
how to proceed further here
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=329209
[2] https://patchwork.kernel.org/patch/11700699/
Hi, Frank:
Frank Wunderlich <[email protected]> 於 2020年8月8日 週六 下午8:27寫道：
>
> Hi,
>
> as i made a mistake in cover-letter, it is not assigned to the series.
>
> to show its content, i send it here as comment (instead of resending the whole series):
>
> based on series from David Woodhouse [1]
> i moved more display-nodes out of mt7623.dtsi to new mt7623n.dtsi
> and changed last part from my series [2] to add these nodes to this new dtsi
>
> the depency of dtsi-dtsi-dts is already done for mt7623a, so i guess it's a good
> way to use it for mt7623n too.
>
> this first set is an RFC if all nodes are in right order and if it is wanted to move
> them out as i have no technical document about mt7623a/n which describes which parts
> are available on both or only on one of them
>
> added MTK DRM Maintainer CK Hu, Ryder Lee and Sean Wang, maybe they can give me some advice
> how to proceed further here
>
> [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=329209
> [2] https://patchwork.kernel.org/patch/11700699/
I would like to put all device in mt7623.dtsi with some device's
status is "disabled" and change its status in platform dtsi.
I would like to see all device in mt7623.dtsi because of its name. If
you move some device to platform dtsi, we would trace all platform
dtsi to find out how many device in mt7623. One day a new platform
enable different devices, you would reorganize all these platform
dtsi?
Regards,
Chun-Kuang.
Am 9. August 2020 02:16:59 MESZ schrieb Chun-Kuang Hu <[email protected]>:
>
>I would like to put all device in mt7623.dtsi with some device's
>status is "disabled" and change its status in platform dtsi.
>I would like to see all device in mt7623.dtsi because of its name. If
>you move some device to platform dtsi, we would trace all platform
>dtsi to find out how many device in mt7623. One day a new platform
>enable different devices, you would reorganize all these platform
>dtsi?
Ok,then i change the dts-patch from hdmi-series to disable all nodes and enabling them in bpi-r2 dts. Do they need to be in alphabetical order (or any other)?
Is the tmds Patch ok? (because review missing) https://patchwork.kernel.org/patch/11700679/
Just to know before reposting series as v5 :)
regards Frank
Hi, Frank:
Frank Wunderlich <[email protected]> 於 2020年8月9日 週日 下午3:22寫道：
>
>
>
> Am 9. August 2020 02:16:59 MESZ schrieb Chun-Kuang Hu <[email protected]>:
> >
> >I would like to put all device in mt7623.dtsi with some device's
> >status is "disabled" and change its status in platform dtsi.
> >I would like to see all device in mt7623.dtsi because of its name. If
> >you move some device to platform dtsi, we would trace all platform
> >dtsi to find out how many device in mt7623. One day a new platform
> >enable different devices, you would reorganize all these platform
> >dtsi?
>
> Ok,then i change the dts-patch from hdmi-series to disable all nodes and enabling them in bpi-r2 dts. Do they need to be in alphabetical order (or any other)?
Alphabetical order is better.
>
> Is the tmds Patch ok? (because review missing) https://patchwork.kernel.org/patch/11700679/
That patch looks really like a hack patch. I would wait for a long
time to see whether any one has comment for this. Or you could have a
better explain for it.
I could apply other patches first.
Regards,
Chun-Kuang.
>
> Just to know before reposting series as v5 :)
> regards Frank
Am 10. August 2020 02:06:27 MESZ schrieb Chun-Kuang Hu <[email protected]>:
>Alphabetical order is better.
In dts there is alphabetical order but not yet in dtsi...i try to fix this.
>> Is the tmds Patch ok? (because review missing)
>https://patchwork.kernel.org/patch/11700679/
>
>That patch looks really like a hack patch. I would wait for a long
>time to see whether any one has comment for this. Or you could have a
>better explain for it.
As i have documentation for mt7623 and there were no further comments on old series (https://patchwork.kernel.org/patch/10903303/) i guess i cannot fix this. I only know it is needed to get clear image on my 1280x1024 display with this Patch
I adressed Ryder and Bibby directly maybe they can help here
>I could apply other patches first.
I guess i need to fix order in dtsi first...afair any hdmi node creates an serial device moved the others +1. So maybe nodes need to be added after uartx (or at least the one if i found out which).
regards Frank
On Sun, 2020-08-09 at 08:16 +0800, Chun-Kuang Hu wrote:
> I would like to put all device in mt7623.dtsi with some device's
> status is "disabled" and change its status in platform dtsi.
> I would like to see all device in mt7623.dtsi because of its name. If
> you move some device to platform dtsi, we would trace all platform
> dtsi to find out how many device in mt7623. One day a new platform
> enable different devices, you would reorganize all these platform
> dtsi?
No, this isn't "platform dtsi", surely? This is mt7623a and mt7623n
dtsi for the two different SoCs, and platforms then just include
mt7623a.dtsi or mt7623n.dtsi as appropriate for the SoC they are using.
If you really want *all* the nodes for both MT7623A and MT7623N chips
in a single mt7623.dtsi but disabled, could we still have mt7623a.dtsi
and mt7623n.dtsi for the chips, enabling the nodes that are only-for-A
or only-for-N, so that each platform doesn't have to do that for
itself?
Although putting those nodes that exist only in one chip or the other
directly into the mt7623[an].dtsi still seems to make more sense to
me.
Hi, David:
David Woodhouse <[email protected]> 於 2020年8月10日 週一 下午3:48寫道：
>
> On Sun, 2020-08-09 at 08:16 +0800, Chun-Kuang Hu wrote:
> > I would like to put all device in mt7623.dtsi with some device's
> > status is "disabled" and change its status in platform dtsi.
> > I would like to see all device in mt7623.dtsi because of its name. If
> > you move some device to platform dtsi, we would trace all platform
> > dtsi to find out how many device in mt7623. One day a new platform
> > enable different devices, you would reorganize all these platform
> > dtsi?
>
> No, this isn't "platform dtsi", surely? This is mt7623a and mt7623n
> dtsi for the two different SoCs, and platforms then just include
> mt7623a.dtsi or mt7623n.dtsi as appropriate for the SoC they are using.
>
> If you really want *all* the nodes for both MT7623A and MT7623N chips
> in a single mt7623.dtsi but disabled, could we still have mt7623a.dtsi
> and mt7623n.dtsi for the chips, enabling the nodes that are only-for-A
> or only-for-N, so that each platform doesn't have to do that for
> itself?
>
> Although putting those nodes that exist only in one chip or the other
> directly into the mt7623[an].dtsi still seems to make more sense to
> me.
Sorry I does not notice that mt7623a and mt7623n are different SoC.
Because they are different SoC, I think the first step is to upstream
mt7623a.dtsi and mt7623n.dtsi independently. That means in each dtsi,
it include all devices of its SoC. After both dtsi is upsteamed, we
could find out what is the common part, then we create a common dtsi
these two SoC, for example mt7623a_mt7623n_common.dtsi. (Maybe there
is a SoC's name is exactly 'mt7623', so I prefer mt7623.dtsi is
reserved for that SoC, and mt7623_common.dtsi is not preferred because
I don't know there are how many mt7623 family SoC and
mt7623_common.dtsi should be use for all mt7623 family)
Regards,
Chun-Kuang.
Hi
Am 11. August 2020 01:28:25 MESZ schrieb Chun-Kuang Hu <[email protected]>:
>Sorry I does not notice that mt7623a and mt7623n are different SoC.
>Because they are different SoC, I think the first step is to upstream
>mt7623a.dtsi and mt7623n.dtsi independently. That means in each dtsi,
>it include all devices of its SoC. After both dtsi is upsteamed, we
>could find out what is the common part, then we create a common dtsi
>these two SoC, for example mt7623a_mt7623n_common.dtsi. (Maybe there
>is a SoC's name is exactly 'mt7623', so I prefer mt7623.dtsi is
>reserved for that SoC, and mt7623_common.dtsi is not preferred because
>I don't know there are how many mt7623 family SoC and
>mt7623_common.dtsi should be use for all mt7623 family)
Afair there is only mt7623a and mt7623n. Mt7623a uses mt7623.dtsi as common part. These 2 soc are released 5 years ago...and only these 2 from that family).
https://www.mediatek.com/news-events/press-releases/mediatek-launches-the-mt7623-and-mt7683-multi-standard-iot-gateways-with-high-speed-wlan-to-lan-to-drive-the-secure-smart-home
So from my current pov the best way (to no more delay my hdmi series) is to move display related stuff in new mt7623n.dtsi and keep mt7623.dtsi as common. So we can avoid touching mt7623a.dtsi for now (can be done later if really needed).
regards Frank
On Tue, 2020-08-11 at 10:41 +0200, Frank Wunderlich wrote:
> Afair there is only mt7623a and mt7623n. Mt7623a uses mt7623.dtsi as
> common part. These 2 soc are released 5 years ago...and only these 2
> from that family).
>
>
https://www.mediatek.com/news-events/press-releases/mediatek-launches-the-mt7623-and-mt7683-multi-standard-iot-gateways-with-high-speed-wlan-to-lan-to-drive-the-secure-smart-home
>
> So from my current pov the best way (to no more delay my hdmi series)
> is to move display related stuff in new mt7623n.dtsi and keep
> mt7623.dtsi as common. So we can avoid touching mt7623a.dtsi for now
> (can be done later if really needed).
Agreed.
I see all three (now I added U7623) MT7623A platforms add the built-in
Ethernet switch for themselves, so I'll probably move that to
mt7623a.dtsi on top of the series that we're already using. But that
can come later.