Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
Changed V3:
Keep enum
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 27 ++++++++++++++++---
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index affd823c8..2e9a5179c 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -11,9 +11,28 @@ maintainers:
properties:
compatible:
- enum:
- - rockchip,gpio-bank
- - rockchip,rk3188-gpio-bank0
+ oneOf:
+ - enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+ - items:
+ - enum:
+ - rockchip,px30-gpio-bank
+ - rockchip,rk3036-gpio-bank
+ - rockchip,rk3066a-gpio-bank
+ - rockchip,rk3128-gpio-bank
+ - rockchip,rk3188-gpio-bank
+ - rockchip,rk3228-gpio-bank
+ - rockchip,rk3288-gpio-bank
+ - rockchip,rk3328-gpio-bank
+ - rockchip,rk3308-gpio-bank
+ - rockchip,rk3368-gpio-bank
+ - rockchip,rk3399-gpio-bank
+ - rockchip,rk3568-gpio-bank
+ - rockchip,rk3588-gpio-bank
+ - rockchip,rv1108-gpio-bank
+ - rockchip,rv1126-gpio-bank
+ - const: rockchip,gpio-bank
reg:
maxItems: 1
@@ -75,7 +94,7 @@ examples:
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 10>;
--
2.20.1
Add a unique hardware GPIO ID to the Rockchip GPIO nodes with
the "rockchip,gpio-controller" property to be independent from aliases
and probe order. "gpio-ranges" can't be used for that, because there is
no semantic restrictions on how they are set up.
Signed-off-by: Johan Jonker <[email protected]>
---
See discussion:
https://lore.kernel.org/u-boot/CACRpkdZx8EaSFLeh4vruRsdC+Sx_ieBiKmuE7t37zhiYqtS3WQ@mail.gmail.com/
---
.../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index 2e9a5179c..39ac41e9d 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -52,6 +52,12 @@ properties:
gpio-line-names: true
+ rockchip,gpio-controller:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 8
+ description:
+ Unique hardware GPIO ID.
+
"#gpio-cells":
const: 2
--
2.20.1
Parse the rockchip,gpio-controller property in Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <[email protected]>
---
drivers/gpio/gpio-rockchip.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index e5de15a2a..47e45299f 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -702,24 +702,38 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
- struct device_node *pctlnp = of_get_parent(np);
+ struct device_node *pctlnp;
struct pinctrl_dev *pctldev = NULL;
struct rockchip_pin_bank *bank = NULL;
struct rockchip_pin_deferred *cfg;
+ struct of_phandle_args args;
static int gpio;
int id, ret;
- if (!np || !pctlnp)
+ if (!np)
return -ENODEV;
+ ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args);
+ if (!ret)
+ pctlnp = args.np;
+ else
+ pctlnp = of_get_parent(np);
+
+ if (!pctlnp)
+ return -ENODEV;
+
+ ret = of_property_read_u32(np, "rockchip,gpio-controller", &id);
+ if (ret) {
+ id = of_alias_get_id(np, "gpio");
+ if (id < 0)
+ id = gpio++;
+ }
+
pctldev = of_pinctrl_get(pctlnp);
+ of_node_put(pctlnp);
if (!pctldev)
return -EPROBE_DEFER;
- id = of_alias_get_id(np, "gpio");
- if (id < 0)
- id = gpio++;
-
bank = rockchip_gpio_find_bank(pctldev, id);
if (!bank)
return -EINVAL;
--
2.20.1
Add a rockchip,gpio-controller property to Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <[email protected]>
---
---
arch/arm/boot/dts/rk3036.dtsi | 3 +++
arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++
arch/arm/boot/dts/rk3128.dtsi | 4 ++++
arch/arm/boot/dts/rk3188.dtsi | 4 ++++
arch/arm/boot/dts/rk322x.dtsi | 4 ++++
arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++
arch/arm/boot/dts/rv1108.dtsi | 4 ++++
arch/arm/boot/dts/rv1126.dtsi | 5 +++++
8 files changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 78686fc72..ef748dc5d 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -582,6 +582,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -595,6 +596,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -608,6 +610,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index de9915d94..cc20b4214 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -280,6 +280,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -293,6 +294,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -306,6 +308,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -319,6 +322,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
@@ -332,6 +336,7 @@
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <2>;
interrupt-controller;
@@ -345,6 +350,7 @@
clocks = <&cru PCLK_GPIO6>;
gpio-controller;
+ rockchip,gpio-controller = <6>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi
index b63bd4ad3..01c8a6b33 100644
--- a/arch/arm/boot/dts/rk3128.dtsi
+++ b/arch/arm/boot/dts/rk3128.dtsi
@@ -476,6 +476,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -487,6 +488,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -498,6 +500,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -509,6 +512,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 44b54af0b..583ba942c 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -231,6 +231,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -244,6 +245,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -257,6 +259,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -270,6 +273,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index ffc16d6b9..e03203bc1 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -955,6 +955,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -968,6 +969,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -981,6 +983,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -994,6 +997,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2ca76b69a..937fec4b8 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1431,6 +1431,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1444,6 +1445,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1457,6 +1459,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1470,6 +1473,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1483,6 +1487,7 @@
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1496,6 +1501,7 @@
clocks = <&cru PCLK_GPIO5>;
gpio-controller;
+ rockchip,gpio-controller = <5>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1509,6 +1515,7 @@
clocks = <&cru PCLK_GPIO6>;
gpio-controller;
+ rockchip,gpio-controller = <6>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1522,6 +1529,7 @@
clocks = <&cru PCLK_GPIO7>;
gpio-controller;
+ rockchip,gpio-controller = <7>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1535,6 +1543,7 @@
clocks = <&cru PCLK_GPIO8>;
gpio-controller;
+ rockchip,gpio-controller = <8>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index abf3006f0..0dca27d09 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -602,6 +602,7 @@
clocks = <&cru PCLK_GPIO0_PMU>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -615,6 +616,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -628,6 +630,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -641,6 +644,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 1f07d0a4f..51e8e1741 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -433,6 +433,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -444,6 +445,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -455,6 +457,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -466,6 +469,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -477,6 +481,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.20.1
Add a rockchip,gpio-controller property to Rockchip gpio nodes to be
independent from aliases and probe order for our bank id.
Signed-off-by: Johan Jonker <[email protected]>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++
7 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 4f6959eb5..64f63e462 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1387,6 +1387,7 @@
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1399,6 +1400,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1411,6 +1413,7 @@
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1423,6 +1426,7 @@
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index dd228a256..e8d15ee53 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -798,6 +798,7 @@
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -809,6 +810,7 @@
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -820,6 +822,7 @@
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -831,6 +834,7 @@
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -842,6 +846,7 @@
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 6d7a7bf72..0a068499c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1051,6 +1051,7 @@
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1064,6 +1065,7 @@
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1077,6 +1079,7 @@
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1090,6 +1093,7 @@
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a4c5aaf1f..b89536940 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -984,6 +984,7 @@
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -997,6 +998,7 @@
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -1010,6 +1012,7 @@
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -1023,6 +1026,7 @@
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <0x2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 1881b4b71..19b052e20 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2091,6 +2091,7 @@
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2104,6 +2105,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2117,6 +2119,7 @@
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2130,6 +2133,7 @@
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <0x2>;
interrupt-controller;
@@ -2143,6 +2147,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <0x2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index eed0059a6..db4925fbf 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1808,6 +1808,7 @@
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
gpio-controller;
+ rockchip,gpio-controller = <0>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1819,6 +1820,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
+ rockchip,gpio-controller = <1>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1830,6 +1832,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
+ rockchip,gpio-controller = <2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1841,6 +1844,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
+ rockchip,gpio-controller = <3>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -1852,6 +1856,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
+ rockchip,gpio-controller = <4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 005cde61b..057f8be0d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1645,6 +1645,7 @@
clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 32>;
+ rockchip,gpio-controller = <0>;
interrupt-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
@@ -1657,6 +1658,7 @@
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
gpio-controller;
gpio-ranges = <&pinctrl 0 32 32>;
+ rockchip,gpio-controller = <1>;
interrupt-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
@@ -1669,6 +1671,7 @@
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
gpio-controller;
gpio-ranges = <&pinctrl 0 64 32>;
+ rockchip,gpio-controller = <2>;
interrupt-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
@@ -1681,6 +1684,7 @@
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
gpio-controller;
gpio-ranges = <&pinctrl 0 96 32>;
+ rockchip,gpio-controller = <3>;
interrupt-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
@@ -1693,6 +1697,7 @@
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
gpio-controller;
gpio-ranges = <&pinctrl 0 128 32>;
+ rockchip,gpio-controller = <4>;
interrupt-controller;
#gpio-cells = <2>;
#interrupt-cells = <2>;
--
2.20.1
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <[email protected]>
---
arch/arm/boot/dts/rk3036.dtsi | 6 +++---
arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------
arch/arm/boot/dts/rk3128.dtsi | 8 ++++----
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
arch/arm/boot/dts/rk322x.dtsi | 8 ++++----
arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++---------
arch/arm/boot/dts/rv1108.dtsi | 8 ++++----
arch/arm/boot/dts/rv1126.dtsi | 10 +++++-----
8 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index ef748dc5d..fc71801bd 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -576,7 +576,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -590,7 +590,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -604,7 +604,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index cc20b4214..92f48a9eb 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -274,7 +274,7 @@
ranges;
gpio0: gpio@20034000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -288,7 +288,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -302,7 +302,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -316,7 +316,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -330,7 +330,7 @@
};
gpio4: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -344,7 +344,7 @@
};
gpio6: gpio@2000a000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi
index 01c8a6b33..78e43a0b5 100644
--- a/arch/arm/boot/dts/rk3128.dtsi
+++ b/arch/arm/boot/dts/rk3128.dtsi
@@ -471,7 +471,7 @@
ranges;
gpio0: gpio@2007c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -483,7 +483,7 @@
};
gpio1: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -495,7 +495,7 @@
};
gpio2: gpio@20084000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -507,7 +507,7 @@
};
gpio3: gpio@20088000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank";
reg = <0x20088000 0x100>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 583ba942c..b414eb7ac 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -239,7 +239,7 @@
};
gpio1: gpio@2003c000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -253,7 +253,7 @@
};
gpio2: gpio@2003e000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -267,7 +267,7 @@
};
gpio3: gpio@20080000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index e03203bc1..a1d76e53c 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -949,7 +949,7 @@
ranges;
gpio0: gpio@11110000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -963,7 +963,7 @@
};
gpio1: gpio@11120000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -977,7 +977,7 @@
};
gpio2: gpio@11130000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -991,7 +991,7 @@
};
gpio3: gpio@11140000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank";
reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 937fec4b8..8faf7445b 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1425,7 +1425,7 @@
ranges;
gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1439,7 +1439,7 @@
};
gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1453,7 +1453,7 @@
};
gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1467,7 +1467,7 @@
};
gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1481,7 +1481,7 @@
};
gpio4: gpio@ff7b0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -1495,7 +1495,7 @@
};
gpio5: gpio@ff7c0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO5>;
@@ -1509,7 +1509,7 @@
};
gpio6: gpio@ff7d0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
@@ -1523,7 +1523,7 @@
};
gpio7: gpio@ff7e0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO7>;
@@ -1537,7 +1537,7 @@
};
gpio8: gpio@ff7f0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO8>;
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 0dca27d09..3db2dbf1b 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -596,7 +596,7 @@
ranges;
gpio0: gpio@20030000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0_PMU>;
@@ -610,7 +610,7 @@
};
gpio1: gpio@10310000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -624,7 +624,7 @@
};
gpio2: gpio@10320000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -638,7 +638,7 @@
};
gpio3: gpio@10330000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank";
reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 51e8e1741..0b2d2af87 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -428,7 +428,7 @@
ranges;
gpio0: gpio@ff460000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff460000 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -440,7 +440,7 @@
};
gpio1: gpio@ff620000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff620000 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -452,7 +452,7 @@
};
gpio2: gpio@ff630000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff630000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -464,7 +464,7 @@
};
gpio3: gpio@ff640000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff640000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -476,7 +476,7 @@
};
gpio4: gpio@ff650000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank";
reg = <0xff650000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <[email protected]>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++-----
7 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 64f63e462..a129b3e07 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1382,7 +1382,7 @@
ranges;
gpio0: gpio@ff040000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@@ -1395,7 +1395,7 @@
};
gpio1: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1408,7 +1408,7 @@
};
gpio2: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1421,7 +1421,7 @@
};
gpio3: gpio@ff270000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index e8d15ee53..c5344fa5c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -793,7 +793,7 @@
ranges;
gpio0: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -805,7 +805,7 @@
};
gpio1: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -817,7 +817,7 @@
};
gpio2: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -829,7 +829,7 @@
};
gpio3: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -841,7 +841,7 @@
};
gpio4: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0a068499c..b9185cffb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1045,7 +1045,7 @@
ranges;
gpio0: gpio@ff210000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1059,7 +1059,7 @@
};
gpio1: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1073,7 +1073,7 @@
};
gpio2: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1087,7 +1087,7 @@
};
gpio3: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index b89536940..729e1eed5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -978,7 +978,7 @@
ranges;
gpio0: gpio@ff750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
clocks = <&cru PCLK_GPIO0>;
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
@@ -992,7 +992,7 @@
};
gpio1: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO1>;
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1006,7 +1006,7 @@
};
gpio2: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1020,7 +1020,7 @@
};
gpio3: gpio@ff7a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 19b052e20..b88a4fe25 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2085,7 +2085,7 @@
ranges;
gpio0: gpio@ff720000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff720000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2099,7 +2099,7 @@
};
gpio1: gpio@ff730000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff730000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO1_PMU>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2113,7 +2113,7 @@
};
gpio2: gpio@ff780000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2127,7 +2127,7 @@
};
gpio3: gpio@ff788000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff788000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2141,7 +2141,7 @@
};
gpio4: gpio@ff790000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO4>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index db4925fbf..e25894958 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1803,7 +1803,7 @@
ranges;
gpio0: gpio@fdd60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfdd60000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -1815,7 +1815,7 @@
};
gpio1: gpio@fe740000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe740000 0x0 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1827,7 +1827,7 @@
};
gpio2: gpio@fe750000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe750000 0x0 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1839,7 +1839,7 @@
};
gpio3: gpio@fe760000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe760000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1851,7 +1851,7 @@
};
gpio4: gpio@fe770000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe770000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 057f8be0d..be28b2978 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1639,7 +1639,7 @@
#size-cells = <2>;
gpio0: gpio@fd8a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfd8a0000 0x0 0x100>;
interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
@@ -1652,7 +1652,7 @@
};
gpio1: gpio@fec20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec20000 0x0 0x100>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1665,7 +1665,7 @@
};
gpio2: gpio@fec30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec30000 0x0 0x100>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1678,7 +1678,7 @@
};
gpio3: gpio@fec40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec40000 0x0 0x100>;
interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1691,7 +1691,7 @@
};
gpio4: gpio@fec50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec50000 0x0 0x100>;
interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1
On 23/02/2023 20:46, Johan Jonker wrote:
> Add a unique hardware GPIO ID to the Rockchip GPIO nodes with
> the "rockchip,gpio-controller" property to be independent from aliases
> and probe order. "gpio-ranges" can't be used for that, because there is
> no semantic restrictions on how they are set up.
>
> Signed-off-by: Johan Jonker <[email protected]>
> ---
>
> See discussion:
> https://lore.kernel.org/u-boot/CACRpkdZx8EaSFLeh4vruRsdC+Sx_ieBiKmuE7t37zhiYqtS3WQ@mail.gmail.com/
> ---
> .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> index 2e9a5179c..39ac41e9d 100644
> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -52,6 +52,12 @@ properties:
>
> gpio-line-names: true
>
> + rockchip,gpio-controller:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 8
> + description:
> + Unique hardware GPIO ID.
Neither commit msg nor this description explain why do you need it.
Also: what is a unique ID? why only 8 of them are allowed? Why assigning
arbitrary numbers should be a property of DT (answer: it's not)?
Best regards,
Krzysztof
On Thu, Feb 23, 2023 at 8:46 PM Johan Jonker <[email protected]> wrote:
> Add a unique hardware GPIO ID to the Rockchip GPIO nodes with
> the "rockchip,gpio-controller" property to be independent from aliases
> and probe order. "gpio-ranges" can't be used for that, because there is
> no semantic restrictions on how they are set up.
>
> Signed-off-by: Johan Jonker <[email protected]>
> ---
>
> See discussion:
> https://lore.kernel.org/u-boot/CACRpkdZx8EaSFLeh4vruRsdC+Sx_ieBiKmuE7t37zhiYqtS3WQ@mail.gmail.com/
> ---
> .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> index 2e9a5179c..39ac41e9d 100644
> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -52,6 +52,12 @@ properties:
>
> gpio-line-names: true
>
> + rockchip,gpio-controller:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 8
> + description:
> + Unique hardware GPIO ID.
So we need to discuss this with the Device Tree people because if this is needed
it need to be motivated in terms of "any operating system needs this".
Very similar precedents exist:
pinctrl/renesas,rzg2l-poeg.yaml
renesas,poeg-id:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 2, 3 ]
description: |
POEG group index. Valid values are:
<0> : POEG group A
<1> : POEG group B
<2> : POEG group C
<3> : POEG group D
pinctrl/st,stm32-pinctrl.yaml
st,bank-name:
description:
Should be a name string for this bank as specified in the datasheet.
$ref: "/schemas/types.yaml#/definitions/string"
enum:
- GPIOA
- GPIOB
- GPIOC
- GPIOD
- GPIOE
- GPIOF
- GPIOG
- GPIOH
- GPIOI
- GPIOJ
- GPIOK
- GPIOZ
I don't know how the above properties are used in practice, but any creative
driver writer can use them exactly as you intend to do with this, so we need to
figure out if this is something all operating systems actually need or
whether we
should let driver authors just keep smuggling it in under the radar as
is already
happening.
Yours,
Linus Walleij