Many parts of Qualcomm SoCs are entirely independent of each other and can
run when the other parts are off. The RPMh system architecture embraces
this by giving each (loosely defined) subsystem its own connection (as in,
physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource
State Coordinators) that barter for power, bandwidth etc.
This series introduces the groundwork necessary for voting for resources
through non-APPS RSCs. It should allow for lower-latency vote adjustments
(e.g. for very high bandwidth / multiple displays) and could potentially
allow for full APSS collapse while keeping e.g. MDSS operating (say
refreshing an image from a RAM buffer).
On top of that, a rather necessary and overdue cleanup is performed to
stop adding more and more arguments to the insane preprocessor macros.
Partially reverting (or reimplementing the revert) [1] will be necessary
to coordinate the rather complex relationship between the DPU and RSC
drivers.
The "Point x paths to the x RSC" patches won't do anything (check the
compatibility workaround qcom_icc_pre_aggregate()) until disp_rsc is
properly described in the device tree, along with its BCM voter),
but they prepare ground for when that happens.
I was able to test sending requests through the DISP_RSC on SM8450, but
I had to hack its clocks (_rscc_ in dispcc) to be always-on, as we don't
have any clk handling for qcom,rpmh-rsc today.
Boot-tested on SM8350 and SM8450, nothing exploded.
[1] https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/
Dependencies:
[2] https://lore.kernel.org/linux-arm-msm/[email protected]/
[3] https://lore.kernel.org/linux-arm-msm/[email protected]/
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (53):
dt-bindings: interconnect: qcom,icc: Introduce fixed BCM voter indices
dt-bindings: interconnect: qcom,bcm-voter: Add qcom,bcm-voter-idx
interconnect: qcom: icc-rpmh: Store direct BCM voter references
interconnect: qcom: icc-rpmh: Retire dead code
interconnect: qcom: icc-rpmh: Implement voting on non-APPS RSCs
interconnect: qcom: sc7180: Retire DEFINE_QNODE
interconnect: qcom: sdm670: Retire DEFINE_QNODE
interconnect: qcom: sdm845: Retire DEFINE_QNODE
interconnect: qcom: sdx55: Retire DEFINE_QNODE
interconnect: qcom: sdx65: Retire DEFINE_QNODE
interconnect: qcom: sm6350: Retire DEFINE_QNODE
interconnect: qcom: sm8150: Retire DEFINE_QNODE
interconnect: qcom: sm8250: Retire DEFINE_QNODE
interconnect: qcom: sm8350: Retire DEFINE_QNODE
interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE
interconnect: qcom: sc7180: Retire DEFINE_QBCM
interconnect: qcom: sdm670: Retire DEFINE_QBCM
interconnect: qcom: sdm845: Retire DEFINE_QBCM
interconnect: qcom: sdx55: Retire DEFINE_QBCM
interconnect: qcom: sdx65: Retire DEFINE_QBCM
interconnect: qcom: sm6350: Retire DEFINE_QBCM
interconnect: qcom: sm8150: Retire DEFINE_QBCM
interconnect: qcom: sm8250: Retire DEFINE_QBCM
interconnect: qcom: sm8350: Retire DEFINE_QBCM
interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM
interconnect: qcom: qdu1000: Explicitly assign voter_idx
interconnect: qcom: sa8775p: Explicitly assign voter_idx
interconnect: qcom: sc7280: Explicitly assign voter_idx
interconnect: qcom: sc8180x: Explicitly assign voter_idx
interconnect: qcom: sc8280xp: Explicitly assign voter_idx
interconnect: qcom: sm8450: Explicitly assign voter_idx
interconnect: qcom: sm8550: Explicitly assign voter_idx
arm64: dts: qcom: qdu1000: add qcom,bcm-voter-idx
arm64: dts: qcom: sa8775p: add qcom,bcm-voter-idx
arm64: dts: qcom: sc7180: add qcom,bcm-voter-idx
arm64: dts: qcom: sc7280: add qcom,bcm-voter-idx
arm64: dts: qcom: sc8180x: add qcom,bcm-voter-idx
arm64: dts: qcom: sc8280xp: add qcom,bcm-voter-idx
arm64: dts: qcom: sdm670: add qcom,bcm-voter-idx
arm64: dts: qcom: sdm845: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx75: add qcom,bcm-voter-idx
arm64: dts: qcom: sm6350: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8150: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8250: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8350: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8450: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8550: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx55: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx65: add qcom,bcm-voter-idx
interconnect: qcom: sm8350: Point display paths to the display RSC
interconnect: qcom: sm8450: Point display paths to the display RSC
interconnect: qcom: sm8550: Point display paths to the display RSC
interconnect: qcom: sm8550: Point camera paths to the camera RSC
.../bindings/interconnect/qcom,bcm-voter.yaml | 10 +
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 1 +
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 +
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +
drivers/interconnect/qcom/bcm-voter.c | 75 +-
drivers/interconnect/qcom/bcm-voter.h | 9 -
drivers/interconnect/qcom/icc-rpmh.c | 53 +-
drivers/interconnect/qcom/icc-rpmh.h | 14 +-
drivers/interconnect/qcom/qdu1000.c | 11 +
drivers/interconnect/qcom/sa8775p.c | 28 +
drivers/interconnect/qcom/sc7180.c | 1637 +++++++++++++++--
drivers/interconnect/qcom/sc7280.c | 27 +
drivers/interconnect/qcom/sc8180x.c | 23 +
drivers/interconnect/qcom/sc8280xp.c | 27 +
drivers/interconnect/qcom/sdm670.c | 1410 +++++++++++++--
drivers/interconnect/qcom/sdm845.c | 1683 ++++++++++++++++--
drivers/interconnect/qcom/sdx55.c | 863 ++++++++-
drivers/interconnect/qcom/sdx65.c | 850 ++++++++-
drivers/interconnect/qcom/sm6350.c | 1551 +++++++++++++++--
drivers/interconnect/qcom/sm8150.c | 1714 ++++++++++++++++--
drivers/interconnect/qcom/sm8250.c | 1772 +++++++++++++++++--
drivers/interconnect/qcom/sm8350.c | 1830 ++++++++++++++++++--
drivers/interconnect/qcom/sm8450.c | 24 +
drivers/interconnect/qcom/sm8550.c | 42 +
include/dt-bindings/interconnect/qcom,icc.h | 8 +
39 files changed, 12320 insertions(+), 1370 deletions(-)
---
base-commit: 82cee168d497ffcb79e4889fe3c7384788e89f4d
change-id: 20230708-topic-rpmh_icc_rsc-f897080fb207
Best regards,
--
Konrad Dybcio <[email protected]>
The _DISP paths are expected to go through the DISP RSC. Point them to the
correct place.
Fixes: d26a56674497 ("interconnect: qcom: Add SM8350 interconnect provider driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sm8350.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c
index c48f96ff8575..0466ba5d939a 100644
--- a/drivers/interconnect/qcom/sm8350.c
+++ b/drivers/interconnect/qcom/sm8350.c
@@ -1609,7 +1609,7 @@ static struct qcom_icc_bcm bcm_sn14 = {
static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
@@ -1617,7 +1617,7 @@ static struct qcom_icc_bcm bcm_acv_disp = {
static struct qcom_icc_bcm bcm_mc0_disp = {
.name = "MC0",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
@@ -1625,7 +1625,7 @@ static struct qcom_icc_bcm bcm_mc0_disp = {
static struct qcom_icc_bcm bcm_mm0_disp = {
.name = "MM0",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_disp },
};
@@ -1633,7 +1633,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = {
static struct qcom_icc_bcm bcm_mm1_disp = {
.name = "MM1",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 2,
.nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp },
};
@@ -1641,7 +1641,7 @@ static struct qcom_icc_bcm bcm_mm1_disp = {
static struct qcom_icc_bcm bcm_mm4_disp = {
.name = "MM4",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &qns_mem_noc_sf_disp },
};
@@ -1649,7 +1649,7 @@ static struct qcom_icc_bcm bcm_mm4_disp = {
static struct qcom_icc_bcm bcm_mm5_disp = {
.name = "MM5",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &qxm_rot_disp },
};
@@ -1657,7 +1657,7 @@ static struct qcom_icc_bcm bcm_mm5_disp = {
static struct qcom_icc_bcm bcm_sh0_disp = {
.name = "SH0",
.keepalive = false,
- .voter_idx = 0,
+ .voter_idx = 1,
.num_nodes = 1,
.nodes = { &qns_llcc_disp },
};
--
2.41.0
To avoid confusion, explicitly assign the BCM voter index.
Note the assignment may be incorrect, but this commit brings no
functional change.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sm8550.c | 42 ++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom/sm8550.c
index 0864ed285375..40740cf5e41d 100644
--- a/drivers/interconnect/qcom/sm8550.c
+++ b/drivers/interconnect/qcom/sm8550.c
@@ -1474,12 +1474,14 @@ static struct qcom_icc_node qns_mem_noc_sf_cam_ife_2 = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = 0x8,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi },
};
static struct qcom_icc_bcm bcm_ce0 = {
.name = "CE0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qxm_crypto },
};
@@ -1488,6 +1490,7 @@ static struct qcom_icc_bcm bcm_cn0 = {
.name = "CN0",
.enable_mask = 0x1,
.keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 54,
.nodes = { &qsm_cfg, &qhs_ahb2phy0,
&qhs_ahb2phy1, &qhs_apss,
@@ -1520,6 +1523,7 @@ static struct qcom_icc_bcm bcm_cn0 = {
static struct qcom_icc_bcm bcm_cn1 = {
.name = "CN1",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qhs_display_cfg },
};
@@ -1527,12 +1531,14 @@ static struct qcom_icc_bcm bcm_cn1 = {
static struct qcom_icc_bcm bcm_co0 = {
.name = "CO0",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 2,
.nodes = { &qxm_nsp, &qns_nsp_gemnoc },
};
static struct qcom_icc_bcm bcm_lp0 = {
.name = "LP0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 2,
.nodes = { &qnm_lpass_lpinoc, &qns_lpass_aggnoc },
};
@@ -1540,12 +1546,14 @@ static struct qcom_icc_bcm bcm_lp0 = {
static struct qcom_icc_bcm bcm_mc0 = {
.name = "MC0",
.keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi },
};
static struct qcom_icc_bcm bcm_mm0 = {
.name = "MM0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf },
};
@@ -1553,6 +1561,7 @@ static struct qcom_icc_bcm bcm_mm0 = {
static struct qcom_icc_bcm bcm_mm1 = {
.name = "MM1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 8,
.nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp,
&qnm_camnoc_sf, &qnm_vapss_hcp,
@@ -1564,6 +1573,7 @@ static struct qcom_icc_bcm bcm_qup0 = {
.name = "QUP0",
.keepalive = true,
.vote_scale = 1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qup0_core_slave },
};
@@ -1572,6 +1582,7 @@ static struct qcom_icc_bcm bcm_qup1 = {
.name = "QUP1",
.keepalive = true,
.vote_scale = 1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qup1_core_slave },
};
@@ -1580,6 +1591,7 @@ static struct qcom_icc_bcm bcm_qup2 = {
.name = "QUP2",
.keepalive = true,
.vote_scale = 1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qup2_core_slave },
};
@@ -1587,6 +1599,7 @@ static struct qcom_icc_bcm bcm_qup2 = {
static struct qcom_icc_bcm bcm_sh0 = {
.name = "SH0",
.keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_llcc },
};
@@ -1594,6 +1607,7 @@ static struct qcom_icc_bcm bcm_sh0 = {
static struct qcom_icc_bcm bcm_sh1 = {
.name = "SH1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 13,
.nodes = { &alm_gpu_tcu, &alm_sys_tcu,
&chm_apps, &qnm_gpu,
@@ -1607,6 +1621,7 @@ static struct qcom_icc_bcm bcm_sh1 = {
static struct qcom_icc_bcm bcm_sn0 = {
.name = "SN0",
.keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_gemnoc_sf },
};
@@ -1614,6 +1629,7 @@ static struct qcom_icc_bcm bcm_sn0 = {
static struct qcom_icc_bcm bcm_sn1 = {
.name = "SN1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 3,
.nodes = { &qhm_gic, &xm_gic,
&qns_gemnoc_gc },
@@ -1621,18 +1637,21 @@ static struct qcom_icc_bcm bcm_sn1 = {
static struct qcom_icc_bcm bcm_sn2 = {
.name = "SN2",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qnm_aggre1_noc },
};
static struct qcom_icc_bcm bcm_sn3 = {
.name = "SN3",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qnm_aggre2_noc },
};
static struct qcom_icc_bcm bcm_sn7 = {
.name = "SN7",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_pcie_mem_noc },
};
@@ -1640,24 +1659,28 @@ static struct qcom_icc_bcm bcm_sn7 = {
static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mc0_disp = {
.name = "MC0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mm0_disp = {
.name = "MM0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_disp },
};
static struct qcom_icc_bcm bcm_sh0_disp = {
.name = "SH0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_llcc_disp },
};
@@ -1665,6 +1688,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = {
static struct qcom_icc_bcm bcm_sh1_disp = {
.name = "SH1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 2,
.nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp },
};
@@ -1672,18 +1696,21 @@ static struct qcom_icc_bcm bcm_sh1_disp = {
static struct qcom_icc_bcm bcm_acv_cam_ife_0 = {
.name = "ACV",
.enable_mask = 0x0,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_0 },
};
static struct qcom_icc_bcm bcm_mc0_cam_ife_0 = {
.name = "MC0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_0 },
};
static struct qcom_icc_bcm bcm_mm0_cam_ife_0 = {
.name = "MM0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_cam_ife_0 },
};
@@ -1691,6 +1718,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_0 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_0 = {
.name = "MM1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_0, &qnm_camnoc_icp_cam_ife_0,
&qnm_camnoc_sf_cam_ife_0, &qns_mem_noc_sf_cam_ife_0 },
@@ -1698,6 +1726,7 @@ static struct qcom_icc_bcm bcm_mm1_cam_ife_0 = {
static struct qcom_icc_bcm bcm_sh0_cam_ife_0 = {
.name = "SH0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_llcc_cam_ife_0 },
};
@@ -1705,6 +1734,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_0 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = {
.name = "SH1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_0, &qnm_mnoc_sf_cam_ife_0,
&qnm_pcie_cam_ife_0 },
@@ -1713,18 +1743,21 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = {
static struct qcom_icc_bcm bcm_acv_cam_ife_1 = {
.name = "ACV",
.enable_mask = 0x0,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_1 },
};
static struct qcom_icc_bcm bcm_mc0_cam_ife_1 = {
.name = "MC0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_1 },
};
static struct qcom_icc_bcm bcm_mm0_cam_ife_1 = {
.name = "MM0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_cam_ife_1 },
};
@@ -1732,6 +1765,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_1 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_1 = {
.name = "MM1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_1, &qnm_camnoc_icp_cam_ife_1,
&qnm_camnoc_sf_cam_ife_1, &qns_mem_noc_sf_cam_ife_1 },
@@ -1739,6 +1773,7 @@ static struct qcom_icc_bcm bcm_mm1_cam_ife_1 = {
static struct qcom_icc_bcm bcm_sh0_cam_ife_1 = {
.name = "SH0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_llcc_cam_ife_1 },
};
@@ -1746,6 +1781,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_1 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = {
.name = "SH1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_1, &qnm_mnoc_sf_cam_ife_1,
&qnm_pcie_cam_ife_1 },
@@ -1754,18 +1790,21 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = {
static struct qcom_icc_bcm bcm_acv_cam_ife_2 = {
.name = "ACV",
.enable_mask = 0x0,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_2 },
};
static struct qcom_icc_bcm bcm_mc0_cam_ife_2 = {
.name = "MC0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &ebi_cam_ife_2 },
};
static struct qcom_icc_bcm bcm_mm0_cam_ife_2 = {
.name = "MM0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_cam_ife_2 },
};
@@ -1773,6 +1812,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_2 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_2 = {
.name = "MM1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_2, &qnm_camnoc_icp_cam_ife_2,
&qnm_camnoc_sf_cam_ife_2, &qns_mem_noc_sf_cam_ife_2 },
@@ -1780,6 +1820,7 @@ static struct qcom_icc_bcm bcm_mm1_cam_ife_2 = {
static struct qcom_icc_bcm bcm_sh0_cam_ife_2 = {
.name = "SH0",
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 1,
.nodes = { &qns_llcc_cam_ife_2 },
};
@@ -1787,6 +1828,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_2 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_2 = {
.name = "SH1",
.enable_mask = 0x1,
+ .voter_idx = ICC_BCM_VOTER_APPS,
.num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_2, &qnm_mnoc_sf_cam_ife_2,
&qnm_pcie_cam_ife_2 },
--
2.41.0
The struct definition macros are hard to read and comapre, expand them.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sm8150.c | 311 +++++++++++++++++++++++++++++++++----
1 file changed, 283 insertions(+), 28 deletions(-)
diff --git a/drivers/interconnect/qcom/sm8150.c b/drivers/interconnect/qcom/sm8150.c
index 29f16899cf5d..91f68d91f12a 100644
--- a/drivers/interconnect/qcom/sm8150.c
+++ b/drivers/interconnect/qcom/sm8150.c
@@ -1279,34 +1279,289 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
.buswidth = 8,
};
-DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
-DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
-DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
-DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf);
-DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1);
-DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_gem_noc_snoc);
-DEFINE_QBCM(bcm_mm2, "MM2", false, &qxm_camnoc_sf, &qns2_mem_noc);
-DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_gpu_tcu, &acm_sys_tcu);
-DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9);
-DEFINE_QBCM(bcm_sh4, "SH4", false, &qnm_cmpnoc);
-DEFINE_QBCM(bcm_sh5, "SH5", false, &acm_apps);
-DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf);
-DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
-DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
-DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
-DEFINE_QBCM(bcm_co1, "CO1", false, &qnm_npu);
-DEFINE_QBCM(bcm_cn0, "CN0", true, &qhm_spdm, &qnm_snoc, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy_south, &qhs_aop, &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp, &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_emac_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_npu_cfg, &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_phy_refgen_north, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qupv3_east, &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_spdm, &qhs_spss_cfg, &qhs_ssc_cfg, &qhs_tcsr, &qhs_tlmm_east, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tlmm_west, &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc);
-DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup0, &qhm_qup1, &qhm_qup2);
-DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
-DEFINE_QBCM(bcm_sn3, "SN3", false, &srvc_aggre1_noc, &srvc_aggre2_noc, &qns_cnoc);
-DEFINE_QBCM(bcm_sn4, "SN4", false, &qxs_pimem);
-DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm);
-DEFINE_QBCM(bcm_sn8, "SN8", false, &xs_pcie_0, &xs_pcie_1);
-DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_aggre1_noc);
-DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_aggre2_noc);
-DEFINE_QBCM(bcm_sn12, "SN12", false, &qxm_pimem, &xm_gic);
-DEFINE_QBCM(bcm_sn14, "SN14", false, &qns_pcie_mem_noc);
-DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_gemnoc);
+static struct qcom_icc_bcm bcm_acv = {
+ .name = "ACV",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &ebi },
+};
+
+static struct qcom_icc_bcm bcm_mc0 = {
+ .name = "MC0",
+ .keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &ebi },
+};
+
+static struct qcom_icc_bcm bcm_sh0 = {
+ .name = "SH0",
+ .keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_llcc },
+};
+
+static struct qcom_icc_bcm bcm_mm0 = {
+ .name = "MM0",
+ .keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_mem_noc_hf },
+};
+
+static struct qcom_icc_bcm bcm_mm1 = {
+ .name = "MM1",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 7,
+ .nodes = { &qxm_camnoc_hf0_uncomp,
+ &qxm_camnoc_hf1_uncomp,
+ &qxm_camnoc_sf_uncomp,
+ &qxm_camnoc_hf0,
+ &qxm_camnoc_hf1,
+ &qxm_mdp0,
+ &qxm_mdp1
+ },
+};
+
+static struct qcom_icc_bcm bcm_sh2 = {
+ .name = "SH2",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_gem_noc_snoc },
+};
+
+static struct qcom_icc_bcm bcm_mm2 = {
+ .name = "MM2",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 2,
+ .nodes = { &qxm_camnoc_sf, &qns2_mem_noc },
+};
+
+static struct qcom_icc_bcm bcm_sh3 = {
+ .name = "SH3",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 2,
+ .nodes = { &acm_gpu_tcu, &acm_sys_tcu },
+};
+
+static struct qcom_icc_bcm bcm_mm3 = {
+ .name = "MM3",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 4,
+ .nodes = { &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9 },
+};
+
+static struct qcom_icc_bcm bcm_sh4 = {
+ .name = "SH4",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qnm_cmpnoc },
+};
+
+static struct qcom_icc_bcm bcm_sh5 = {
+ .name = "SH5",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &acm_apps },
+};
+
+static struct qcom_icc_bcm bcm_sn0 = {
+ .name = "SN0",
+ .keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_gemnoc_sf },
+};
+
+static struct qcom_icc_bcm bcm_co0 = {
+ .name = "CO0",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_cdsp_mem_noc },
+};
+
+static struct qcom_icc_bcm bcm_ce0 = {
+ .name = "CE0",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qxm_crypto },
+};
+
+static struct qcom_icc_bcm bcm_sn1 = {
+ .name = "SN1",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qxs_imem },
+};
+
+static struct qcom_icc_bcm bcm_co1 = {
+ .name = "CO1",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qnm_npu },
+};
+
+static struct qcom_icc_bcm bcm_cn0 = {
+ .name = "CN0",
+ .keepalive = true,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 53,
+ .nodes = { &qhm_spdm,
+ &qnm_snoc,
+ &qhs_a1_noc_cfg,
+ &qhs_a2_noc_cfg,
+ &qhs_ahb2phy_south,
+ &qhs_aop,
+ &qhs_aoss,
+ &qhs_camera_cfg,
+ &qhs_clk_ctl,
+ &qhs_compute_dsp,
+ &qhs_cpr_cx,
+ &qhs_cpr_mmcx,
+ &qhs_cpr_mx,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_display_cfg,
+ &qhs_emac_cfg,
+ &qhs_glm,
+ &qhs_gpuss_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mnoc_cfg,
+ &qhs_npu_cfg,
+ &qhs_pcie0_cfg,
+ &qhs_pcie1_cfg,
+ &qhs_phy_refgen_north,
+ &qhs_pimem_cfg,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qspi,
+ &qhs_qupv3_east,
+ &qhs_qupv3_north,
+ &qhs_qupv3_south,
+ &qhs_sdc2,
+ &qhs_sdc4,
+ &qhs_snoc_cfg,
+ &qhs_spdm,
+ &qhs_spss_cfg,
+ &qhs_ssc_cfg,
+ &qhs_tcsr,
+ &qhs_tlmm_east,
+ &qhs_tlmm_north,
+ &qhs_tlmm_south,
+ &qhs_tlmm_west,
+ &qhs_tsif,
+ &qhs_ufs_card_cfg,
+ &qhs_ufs_mem_cfg,
+ &qhs_usb3_0,
+ &qhs_usb3_1,
+ &qhs_venus_cfg,
+ &qhs_vsense_ctrl_cfg,
+ &qns_cnoc_a2noc,
+ &srvc_cnoc
+ },
+};
+
+static struct qcom_icc_bcm bcm_qup0 = {
+ .name = "QUP0",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 3,
+ .nodes = { &qhm_qup0, &qhm_qup1, &qhm_qup2 },
+};
+
+static struct qcom_icc_bcm bcm_sn2 = {
+ .name = "SN2",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_gemnoc_gc },
+};
+
+static struct qcom_icc_bcm bcm_sn3 = {
+ .name = "SN3",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 3,
+ .nodes = { &srvc_aggre1_noc, &srvc_aggre2_noc, &qns_cnoc },
+};
+
+static struct qcom_icc_bcm bcm_sn4 = {
+ .name = "SN4",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qxs_pimem },
+};
+
+static struct qcom_icc_bcm bcm_sn5 = {
+ .name = "SN5",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &xs_qdss_stm },
+};
+
+static struct qcom_icc_bcm bcm_sn8 = {
+ .name = "SN8",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 2,
+ .nodes = { &xs_pcie_0, &xs_pcie_1 },
+};
+
+static struct qcom_icc_bcm bcm_sn9 = {
+ .name = "SN9",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qnm_aggre1_noc },
+};
+
+static struct qcom_icc_bcm bcm_sn11 = {
+ .name = "SN11",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qnm_aggre2_noc },
+};
+
+static struct qcom_icc_bcm bcm_sn12 = {
+ .name = "SN12",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 2,
+ .nodes = { &qxm_pimem, &xm_gic },
+};
+
+static struct qcom_icc_bcm bcm_sn14 = {
+ .name = "SN14",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qns_pcie_mem_noc },
+};
+
+static struct qcom_icc_bcm bcm_sn15 = {
+ .name = "SN15",
+ .keepalive = false,
+ .voter_idx = ICC_BCM_VOTER_APPS,
+ .num_nodes = 1,
+ .nodes = { &qnm_gemnoc },
+};
static struct qcom_icc_bcm * const aggre1_noc_bcms[] = {
&bcm_qup0,
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index 1a3583029a64..7efdcb2a7a0e 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -795,6 +795,7 @@ rpmhpd_opp_turbo_l1: opp10 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 557a3d8e889b..fc8779a2fa96 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3,6 +3,7 @@
* Copyright (c) 2020, Linaro Limited
*/
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sm8350.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,dispcc-sm8350.h>
@@ -3397,6 +3398,7 @@ rpmhpd_opp_turbo_l1: opp10 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index c2b5d56ba242..1f52f63c5a57 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2563,6 +2563,7 @@ rpmhpd_opp_turbo_l1: opp10 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 6e8aba256931..d54b0ac6d0a3 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
@@ -3714,6 +3715,7 @@ apps_rsc: rsc@17a00000 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
rpmhcc: clock-controller {
--
2.41.0
It makes zero (or less) sense to consume BCM voters per interconnect
provider. They are shared throughout the entire system and it's enough
to keep a single reference to each of them.
Storing them in a shared array at fixed indices will let us improve both
the representation of the RPMh architecture (every RSC can hold a resource
vote on any bus, they're not limited in that regard) and save as much as
kilobytes worth of RAM.
Signed-off-by: Konrad Dybcio <[email protected]>
---
include/dt-bindings/interconnect/qcom,icc.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/dt-bindings/interconnect/qcom,icc.h b/include/dt-bindings/interconnect/qcom,icc.h
index cd34f36daaaa..9c13ef8a044e 100644
--- a/include/dt-bindings/interconnect/qcom,icc.h
+++ b/include/dt-bindings/interconnect/qcom,icc.h
@@ -23,4 +23,12 @@
#define QCOM_ICC_TAG_ALWAYS (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE |\
QCOM_ICC_TAG_SLEEP)
+#define ICC_BCM_VOTER_APPS 0
+#define ICC_BCM_VOTER_DISP 1
+#define ICC_BCM_VOTER_CAM0 2
+#define ICC_BCM_VOTER_CAM1 3
+#define ICC_BCM_VOTER_CAM2 4
+
+#define ICC_BCM_VOTER_MAX 64
+
#endif
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index e03007e23e91..29994aae897c 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sm8250.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -5674,6 +5675,7 @@ rpmhpd_opp_turbo_l1: opp10 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
index 55ce87b75253..35519e018ab2 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
@@ -866,6 +866,7 @@ rpmhpd_opp_turbo_l1: opp10 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
};
--
2.41.0
The _DISP paths are expected to go through the DISP RSC. Point them to the
correct place.
Fixes: e6f0d6a30f73 ("interconnect: qcom: Add SM8550 interconnect provider driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sm8550.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom/sm8550.c
index 40740cf5e41d..41314b214cbe 100644
--- a/drivers/interconnect/qcom/sm8550.c
+++ b/drivers/interconnect/qcom/sm8550.c
@@ -1659,28 +1659,28 @@ static struct qcom_icc_bcm bcm_sn7 = {
static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV",
.enable_mask = 0x1,
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mc0_disp = {
.name = "MC0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mm0_disp = {
.name = "MM0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_disp },
};
static struct qcom_icc_bcm bcm_sh0_disp = {
.name = "SH0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &qns_llcc_disp },
};
@@ -1688,7 +1688,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = {
static struct qcom_icc_bcm bcm_sh1_disp = {
.name = "SH1",
.enable_mask = 0x1,
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 2,
.nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp },
};
--
2.41.0
The _DISP paths are expected to go through the DISP RSC. Point them to the
correct place.
Fixes: fafc114a468e ("interconnect: qcom: Add SM8450 interconnect provider driver")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sm8450.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/interconnect/qcom/sm8450.c b/drivers/interconnect/qcom/sm8450.c
index 989ae24f2be9..6f42b1d693b4 100644
--- a/drivers/interconnect/qcom/sm8450.c
+++ b/drivers/interconnect/qcom/sm8450.c
@@ -1517,21 +1517,21 @@ static struct qcom_icc_bcm bcm_sn7 = {
static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV",
.enable_mask = 0x1,
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mc0_disp = {
.name = "MC0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &ebi_disp },
};
static struct qcom_icc_bcm bcm_mm0_disp = {
.name = "MM0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &qns_mem_noc_hf_disp },
};
@@ -1539,7 +1539,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = {
static struct qcom_icc_bcm bcm_mm1_disp = {
.name = "MM1",
.enable_mask = 0x1,
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 3,
.nodes = { &qnm_mdp_disp, &qnm_rot_disp,
&qns_mem_noc_sf_disp },
@@ -1547,7 +1547,7 @@ static struct qcom_icc_bcm bcm_mm1_disp = {
static struct qcom_icc_bcm bcm_sh0_disp = {
.name = "SH0",
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &qns_llcc_disp },
};
@@ -1555,7 +1555,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = {
static struct qcom_icc_bcm bcm_sh1_disp = {
.name = "SH1",
.enable_mask = 0x1,
- .voter_idx = ICC_BCM_VOTER_APPS,
+ .voter_idx = ICC_BCM_VOTER_DISP,
.num_nodes = 1,
.nodes = { &qnm_pcie_disp },
};
--
2.41.0
To improve the representation and ease handling, identify each BCM voter
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 0cd580920a92..151cc60de9cd 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/clock/qcom,dispcc-sm8150.h>
#include <dt-bindings/clock/qcom,gcc-sm8150.h>
#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sm8150.h>
#include <dt-bindings/thermal/thermal.h>
@@ -4332,6 +4333,7 @@ rpmhpd_opp_turbo_l1: opp11 {
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
+ qcom,bcm-voter-idx = <ICC_BCM_VOTER_APPS>;
};
};
--
2.41.0
On 11/07/2023 15:18, Konrad Dybcio wrote:
> The _DISP paths are expected to go through the DISP RSC. Point them to the
> correct place.
>
> Fixes: d26a56674497 ("interconnect: qcom: Add SM8350 interconnect provider driver")
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> drivers/interconnect/qcom/sm8350.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c
> index c48f96ff8575..0466ba5d939a 100644
> --- a/drivers/interconnect/qcom/sm8350.c
> +++ b/drivers/interconnect/qcom/sm8350.c
> @@ -1609,7 +1609,7 @@ static struct qcom_icc_bcm bcm_sn14 = {
> static struct qcom_icc_bcm bcm_acv_disp = {
> .name = "ACV",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
Shouldn't this value come from a enum? Otherwise a magic '1' is... a magic.
> .num_nodes = 1,
> .nodes = { &ebi_disp },
> };
> @@ -1617,7 +1617,7 @@ static struct qcom_icc_bcm bcm_acv_disp = {
> static struct qcom_icc_bcm bcm_mc0_disp = {
> .name = "MC0",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 1,
> .nodes = { &ebi_disp },
> };
> @@ -1625,7 +1625,7 @@ static struct qcom_icc_bcm bcm_mc0_disp = {
> static struct qcom_icc_bcm bcm_mm0_disp = {
> .name = "MM0",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 1,
> .nodes = { &qns_mem_noc_hf_disp },
> };
> @@ -1633,7 +1633,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = {
> static struct qcom_icc_bcm bcm_mm1_disp = {
> .name = "MM1",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 2,
> .nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp },
> };
> @@ -1641,7 +1641,7 @@ static struct qcom_icc_bcm bcm_mm1_disp = {
> static struct qcom_icc_bcm bcm_mm4_disp = {
> .name = "MM4",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 1,
> .nodes = { &qns_mem_noc_sf_disp },
> };
> @@ -1649,7 +1649,7 @@ static struct qcom_icc_bcm bcm_mm4_disp = {
> static struct qcom_icc_bcm bcm_mm5_disp = {
> .name = "MM5",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 1,
> .nodes = { &qxm_rot_disp },
> };
> @@ -1657,7 +1657,7 @@ static struct qcom_icc_bcm bcm_mm5_disp = {
> static struct qcom_icc_bcm bcm_sh0_disp = {
> .name = "SH0",
> .keepalive = false,
> - .voter_idx = 0,
> + .voter_idx = 1,
> .num_nodes = 1,
> .nodes = { &qns_llcc_disp },
> };
>
--
With best wishes
Dmitry
On 11.07.2023 16:17, Dmitry Baryshkov wrote:
> On 11/07/2023 15:18, Konrad Dybcio wrote:
>> The _DISP paths are expected to go through the DISP RSC. Point them to the
>> correct place.
>>
>> Fixes: d26a56674497 ("interconnect: qcom: Add SM8350 interconnect provider driver")
>> Signed-off-by: Konrad Dybcio <[email protected]>
>> ---
>> drivers/interconnect/qcom/sm8350.c | 14 +++++++-------
>> 1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c
>> index c48f96ff8575..0466ba5d939a 100644
>> --- a/drivers/interconnect/qcom/sm8350.c
>> +++ b/drivers/interconnect/qcom/sm8350.c
>> @@ -1609,7 +1609,7 @@ static struct qcom_icc_bcm bcm_sn14 = {
>> static struct qcom_icc_bcm bcm_acv_disp = {
>> .name = "ACV",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>
> Shouldn't this value come from a enum? Otherwise a magic '1' is... a magic.
Yep, rebase mess!
Konrad
>
>> .num_nodes = 1,
>> .nodes = { &ebi_disp },
>> };
>> @@ -1617,7 +1617,7 @@ static struct qcom_icc_bcm bcm_acv_disp = {
>> static struct qcom_icc_bcm bcm_mc0_disp = {
>> .name = "MC0",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 1,
>> .nodes = { &ebi_disp },
>> };
>> @@ -1625,7 +1625,7 @@ static struct qcom_icc_bcm bcm_mc0_disp = {
>> static struct qcom_icc_bcm bcm_mm0_disp = {
>> .name = "MM0",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 1,
>> .nodes = { &qns_mem_noc_hf_disp },
>> };
>> @@ -1633,7 +1633,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = {
>> static struct qcom_icc_bcm bcm_mm1_disp = {
>> .name = "MM1",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 2,
>> .nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp },
>> };
>> @@ -1641,7 +1641,7 @@ static struct qcom_icc_bcm bcm_mm1_disp = {
>> static struct qcom_icc_bcm bcm_mm4_disp = {
>> .name = "MM4",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 1,
>> .nodes = { &qns_mem_noc_sf_disp },
>> };
>> @@ -1649,7 +1649,7 @@ static struct qcom_icc_bcm bcm_mm4_disp = {
>> static struct qcom_icc_bcm bcm_mm5_disp = {
>> .name = "MM5",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 1,
>> .nodes = { &qxm_rot_disp },
>> };
>> @@ -1657,7 +1657,7 @@ static struct qcom_icc_bcm bcm_mm5_disp = {
>> static struct qcom_icc_bcm bcm_sh0_disp = {
>> .name = "SH0",
>> .keepalive = false,
>> - .voter_idx = 0,
>> + .voter_idx = 1,
>> .num_nodes = 1,
>> .nodes = { &qns_llcc_disp },
>> };
>>
>
On 11/07/2023 14:18, Konrad Dybcio wrote:
> It makes zero (or less) sense to consume BCM voters per interconnect
> provider. They are shared throughout the entire system and it's enough
> to keep a single reference to each of them.
>
> Storing them in a shared array at fixed indices will let us improve both
> the representation of the RPMh architecture (every RSC can hold a resource
> vote on any bus, they're not limited in that regard) and save as much as
> kilobytes worth of RAM.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> include/dt-bindings/interconnect/qcom,icc.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/include/dt-bindings/interconnect/qcom,icc.h b/include/dt-bindings/interconnect/qcom,icc.h
> index cd34f36daaaa..9c13ef8a044e 100644
> --- a/include/dt-bindings/interconnect/qcom,icc.h
> +++ b/include/dt-bindings/interconnect/qcom,icc.h
> @@ -23,4 +23,12 @@
> #define QCOM_ICC_TAG_ALWAYS (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE |\
> QCOM_ICC_TAG_SLEEP)
>
> +#define ICC_BCM_VOTER_APPS 0
> +#define ICC_BCM_VOTER_DISP 1
> +#define ICC_BCM_VOTER_CAM0 2
> +#define ICC_BCM_VOTER_CAM1 3
> +#define ICC_BCM_VOTER_CAM2 4
> +
> +#define ICC_BCM_VOTER_MAX 64
I proposed to skip the max. If you actually use it, you won't be able to
change it ever.
Best regards,
Krzysztof
On 12.07.2023 22:39, Krzysztof Kozlowski wrote:
> On 11/07/2023 14:18, Konrad Dybcio wrote:
>> It makes zero (or less) sense to consume BCM voters per interconnect
>> provider. They are shared throughout the entire system and it's enough
>> to keep a single reference to each of them.
>>
>> Storing them in a shared array at fixed indices will let us improve both
>> the representation of the RPMh architecture (every RSC can hold a resource
>> vote on any bus, they're not limited in that regard) and save as much as
>> kilobytes worth of RAM.
>>
>> Signed-off-by: Konrad Dybcio <[email protected]>
>> ---
>> include/dt-bindings/interconnect/qcom,icc.h | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/include/dt-bindings/interconnect/qcom,icc.h b/include/dt-bindings/interconnect/qcom,icc.h
>> index cd34f36daaaa..9c13ef8a044e 100644
>> --- a/include/dt-bindings/interconnect/qcom,icc.h
>> +++ b/include/dt-bindings/interconnect/qcom,icc.h
>> @@ -23,4 +23,12 @@
>> #define QCOM_ICC_TAG_ALWAYS (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE |\
>> QCOM_ICC_TAG_SLEEP)
>>
>> +#define ICC_BCM_VOTER_APPS 0
>> +#define ICC_BCM_VOTER_DISP 1
>> +#define ICC_BCM_VOTER_CAM0 2
>> +#define ICC_BCM_VOTER_CAM1 3
>> +#define ICC_BCM_VOTER_CAM2 4
>> +
>> +#define ICC_BCM_VOTER_MAX 64
>
> I proposed to skip the max. If you actually use it, you won't be able to
> change it ever.
I guess I can just add the max in the driver.
Konrad
>
>
> Best regards,
> Krzysztof
>
Hi Konrad,
On 11.07.23 15:17, Konrad Dybcio wrote:
> Many parts of Qualcomm SoCs are entirely independent of each other and can
> run when the other parts are off. The RPMh system architecture embraces
> this by giving each (loosely defined) subsystem its own connection (as in,
> physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource
> State Coordinators) that barter for power, bandwidth etc.
>
> This series introduces the groundwork necessary for voting for resources
> through non-APPS RSCs. It should allow for lower-latency vote adjustments
> (e.g. for very high bandwidth / multiple displays) and could potentially
> allow for full APSS collapse while keeping e.g. MDSS operating (say
> refreshing an image from a RAM buffer).
This is good stuff. Thanks for working on it! Actually the path tagging,
that have been introduced some time ago could be used for supporting the
multiple RSCs. Today we can get the tags from DT, and tag the path with
some DISP_RSC flag (for example) and avoid the qcom,bcm-voter-idx property.
Mike has been also looking into this, so maybe he can share his thoughts.
>
> On top of that, a rather necessary and overdue cleanup is performed to
> stop adding more and more arguments to the insane preprocessor macros.
>
Retiring the DEFINE_QNODE is good clean-up, but some patches failed to
apply so a re-base would be needed.
Thanks,
Georgi
> Partially reverting (or reimplementing the revert) [1] will be necessary
> to coordinate the rather complex relationship between the DPU and RSC
> drivers.
>
> The "Point x paths to the x RSC" patches won't do anything (check the
> compatibility workaround qcom_icc_pre_aggregate()) until disp_rsc is
> properly described in the device tree, along with its BCM voter),
> but they prepare ground for when that happens.
>
> I was able to test sending requests through the DISP_RSC on SM8450, but
> I had to hack its clocks (_rscc_ in dispcc) to be always-on, as we don't
> have any clk handling for qcom,rpmh-rsc today.
>
> Boot-tested on SM8350 and SM8450, nothing exploded.
>
> [1] https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/
>
> Dependencies:
> [2] https://lore.kernel.org/linux-arm-msm/[email protected]/
> [3] https://lore.kernel.org/linux-arm-msm/[email protected]/
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> Konrad Dybcio (53):
> dt-bindings: interconnect: qcom,icc: Introduce fixed BCM voter indices
> dt-bindings: interconnect: qcom,bcm-voter: Add qcom,bcm-voter-idx
> interconnect: qcom: icc-rpmh: Store direct BCM voter references
> interconnect: qcom: icc-rpmh: Retire dead code
> interconnect: qcom: icc-rpmh: Implement voting on non-APPS RSCs
> interconnect: qcom: sc7180: Retire DEFINE_QNODE
> interconnect: qcom: sdm670: Retire DEFINE_QNODE
> interconnect: qcom: sdm845: Retire DEFINE_QNODE
> interconnect: qcom: sdx55: Retire DEFINE_QNODE
> interconnect: qcom: sdx65: Retire DEFINE_QNODE
> interconnect: qcom: sm6350: Retire DEFINE_QNODE
> interconnect: qcom: sm8150: Retire DEFINE_QNODE
> interconnect: qcom: sm8250: Retire DEFINE_QNODE
> interconnect: qcom: sm8350: Retire DEFINE_QNODE
> interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE
> interconnect: qcom: sc7180: Retire DEFINE_QBCM
> interconnect: qcom: sdm670: Retire DEFINE_QBCM
> interconnect: qcom: sdm845: Retire DEFINE_QBCM
> interconnect: qcom: sdx55: Retire DEFINE_QBCM
> interconnect: qcom: sdx65: Retire DEFINE_QBCM
> interconnect: qcom: sm6350: Retire DEFINE_QBCM
> interconnect: qcom: sm8150: Retire DEFINE_QBCM
> interconnect: qcom: sm8250: Retire DEFINE_QBCM
> interconnect: qcom: sm8350: Retire DEFINE_QBCM
> interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM
> interconnect: qcom: qdu1000: Explicitly assign voter_idx
> interconnect: qcom: sa8775p: Explicitly assign voter_idx
> interconnect: qcom: sc7280: Explicitly assign voter_idx
> interconnect: qcom: sc8180x: Explicitly assign voter_idx
> interconnect: qcom: sc8280xp: Explicitly assign voter_idx
> interconnect: qcom: sm8450: Explicitly assign voter_idx
> interconnect: qcom: sm8550: Explicitly assign voter_idx
> arm64: dts: qcom: qdu1000: add qcom,bcm-voter-idx
> arm64: dts: qcom: sa8775p: add qcom,bcm-voter-idx
> arm64: dts: qcom: sc7180: add qcom,bcm-voter-idx
> arm64: dts: qcom: sc7280: add qcom,bcm-voter-idx
> arm64: dts: qcom: sc8180x: add qcom,bcm-voter-idx
> arm64: dts: qcom: sc8280xp: add qcom,bcm-voter-idx
> arm64: dts: qcom: sdm670: add qcom,bcm-voter-idx
> arm64: dts: qcom: sdm845: add qcom,bcm-voter-idx
> arm64: dts: qcom: sdx75: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm6350: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm8150: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm8250: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm8350: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm8450: add qcom,bcm-voter-idx
> arm64: dts: qcom: sm8550: add qcom,bcm-voter-idx
> arm64: dts: qcom: sdx55: add qcom,bcm-voter-idx
> arm64: dts: qcom: sdx65: add qcom,bcm-voter-idx
> interconnect: qcom: sm8350: Point display paths to the display RSC
> interconnect: qcom: sm8450: Point display paths to the display RSC
> interconnect: qcom: sm8550: Point display paths to the display RSC
> interconnect: qcom: sm8550: Point camera paths to the camera RSC
>
> .../bindings/interconnect/qcom,bcm-voter.yaml | 10 +
> arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 1 +
> arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 +
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +
> drivers/interconnect/qcom/bcm-voter.c | 75 +-
> drivers/interconnect/qcom/bcm-voter.h | 9 -
> drivers/interconnect/qcom/icc-rpmh.c | 53 +-
> drivers/interconnect/qcom/icc-rpmh.h | 14 +-
> drivers/interconnect/qcom/qdu1000.c | 11 +
> drivers/interconnect/qcom/sa8775p.c | 28 +
> drivers/interconnect/qcom/sc7180.c | 1637 +++++++++++++++--
> drivers/interconnect/qcom/sc7280.c | 27 +
> drivers/interconnect/qcom/sc8180x.c | 23 +
> drivers/interconnect/qcom/sc8280xp.c | 27 +
> drivers/interconnect/qcom/sdm670.c | 1410 +++++++++++++--
> drivers/interconnect/qcom/sdm845.c | 1683 ++++++++++++++++--
> drivers/interconnect/qcom/sdx55.c | 863 ++++++++-
> drivers/interconnect/qcom/sdx65.c | 850 ++++++++-
> drivers/interconnect/qcom/sm6350.c | 1551 +++++++++++++++--
> drivers/interconnect/qcom/sm8150.c | 1714 ++++++++++++++++--
> drivers/interconnect/qcom/sm8250.c | 1772 +++++++++++++++++--
> drivers/interconnect/qcom/sm8350.c | 1830 ++++++++++++++++++--
> drivers/interconnect/qcom/sm8450.c | 24 +
> drivers/interconnect/qcom/sm8550.c | 42 +
> include/dt-bindings/interconnect/qcom,icc.h | 8 +
> 39 files changed, 12320 insertions(+), 1370 deletions(-)
> ---
> base-commit: 82cee168d497ffcb79e4889fe3c7384788e89f4d
> change-id: 20230708-topic-rpmh_icc_rsc-f897080fb207
>
> Best regards,
On Thu, Aug 03, 2023 at 07:48:08PM +0300, Georgi Djakov wrote:
> Hi Konrad,
>
> On 11.07.23 15:17, Konrad Dybcio wrote:
> > Many parts of Qualcomm SoCs are entirely independent of each other and can
> > run when the other parts are off. The RPMh system architecture embraces
> > this by giving each (loosely defined) subsystem its own connection (as in,
> > physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource
> > State Coordinators) that barter for power, bandwidth etc.
> >
> > This series introduces the groundwork necessary for voting for resources
> > through non-APPS RSCs. It should allow for lower-latency vote adjustments
> > (e.g. for very high bandwidth / multiple displays) and could potentially
> > allow for full APSS collapse while keeping e.g. MDSS operating (say
> > refreshing an image from a RAM buffer).
>
> This is good stuff. Thanks for working on it! Actually the path tagging,
> that have been introduced some time ago could be used for supporting the
> multiple RSCs. Today we can get the tags from DT, and tag the path with
> some DISP_RSC flag (for example) and avoid the qcom,bcm-voter-idx property.
>
> Mike has been also looking into this, so maybe he can share his thoughts.
>
Yeah, the current way we've been supporting multiple voters (e.g. RSCs)
doesn't scale. We currently duplicate the topology for any path that
requires a secondary, non-APSS voter. Which means we have duplicates
nodes and bindings for each hop in those paths, even though there's only
a single logical path.
For example, in qcom/sm8550.c, each node and BCM ending with _disp,
_ife_0, _ife_1, or _ife_2 is a duplicate. The only reason they exist is
to allow clients to target their votes to the non-APPS voters. And to
provide separate, voter-specific buckets of aggregation. But everything
else about them is 100% identical to their default APPS counterparts.
For sm8550, this amounts to roughly 643 extra lines of code.
Initially there was only the one secondary display voter, so the scaling
problem wasn't a huge issue. But sm8550 has four voters. And future SOCs
will have even more.
We should only define the logical topology once. The ratio of NOC ports
to interconnect nodes should be 1:1, rather than 1:N where N is the
number of voters that care about them.
The general idea is that we could use tags for this. So, instead of...
path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP);
it would be...
path = icc_get(dev, MASTER_MDP, SLAVE_EBI1);
icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP);
I have an early prototype with basic testing already. I can hopefully
clean it up and post for review in the next couple of weeks.
On Wed, Sep 06, 2023 at 02:14:14PM +0200, Konrad Dybcio wrote:
> > The general idea is that we could use tags for this. So, instead of...
> >
> > path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP);
> >
> > it would be...
> >
> > path = icc_get(dev, MASTER_MDP, SLAVE_EBI1);
> > icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP);
> >
> > I have an early prototype with basic testing already. I can hopefully
> > clean it up and post for review in the next couple of weeks.
> I was initially not very happy with this approach (overloading tags
> with additional information), but it grew on me over time.
>
> My only concern is that if we reserve say bits 16-31 for path tags
> (remember, dt-bindings are ABI), we may eventually run out of them.
The voter tags wouldn't require bitmasks like the bucket tags do. We'd
just need an integer for each voter shifted into the proper position in
the tag value. Thus, reserving N bits for the voters would give us 2**N
voters, which should be plenty. For example:
#define QCOM_ICC_VOTERS_START 16
#define QCOM_ICC_VOTERS_END 23
#define QCOM_ICC_TAG_VOTER_HLOS (0 << QCOM_ICC_VOTERS_START)
#define QCOM_ICC_TAG_VOTER_DISP (1 << QCOM_ICC_VOTERS_START)
#define QCOM_ICC_TAG_VOTER_CAM_IFE_0 (2 << QCOM_ICC_VOTERS_START)
#define QCOM_ICC_TAG_VOTER_CAM_IFE_1 (3 << QCOM_ICC_VOTERS_START)
#define QCOM_ICC_TAG_VOTER_CAM_IFE_2 (4 << QCOM_ICC_VOTERS_START)
The applicable voters should likely be defined in the target-specific
headers, rather than the common qcom,icc.h. The bit range used for them
could be common, but each target may only support a small subset of the
total set of possible voters across all targets.
Clients requiring multiple voters for the same logical path should be
rare. On the off-chance they require that, they could just request the
same path multiple times with different voter tags applied and call
icc_set_bw() for each of them separately.
I'm back from travel and vacation and plan to pick this up again soon.
On 13.09.2023 03:29, Mike Tipton wrote:
> On Wed, Sep 06, 2023 at 02:14:14PM +0200, Konrad Dybcio wrote:
>>> The general idea is that we could use tags for this. So, instead of...
>>>
>>> path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP);
>>>
>>> it would be...
>>>
>>> path = icc_get(dev, MASTER_MDP, SLAVE_EBI1);
>>> icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP);
>>>
>>> I have an early prototype with basic testing already. I can hopefully
>>> clean it up and post for review in the next couple of weeks.
>> I was initially not very happy with this approach (overloading tags
>> with additional information), but it grew on me over time.
>>
>> My only concern is that if we reserve say bits 16-31 for path tags
>> (remember, dt-bindings are ABI), we may eventually run out of them.
>
> The voter tags wouldn't require bitmasks like the bucket tags do. We'd
> just need an integer for each voter shifted into the proper position in
> the tag value. Thus, reserving N bits for the voters would give us 2**N
> voters, which should be plenty. For example:
>
> #define QCOM_ICC_VOTERS_START 16
> #define QCOM_ICC_VOTERS_END 23
>
> #define QCOM_ICC_TAG_VOTER_HLOS (0 << QCOM_ICC_VOTERS_START)
> #define QCOM_ICC_TAG_VOTER_DISP (1 << QCOM_ICC_VOTERS_START)
> #define QCOM_ICC_TAG_VOTER_CAM_IFE_0 (2 << QCOM_ICC_VOTERS_START)
> #define QCOM_ICC_TAG_VOTER_CAM_IFE_1 (3 << QCOM_ICC_VOTERS_START)
> #define QCOM_ICC_TAG_VOTER_CAM_IFE_2 (4 << QCOM_ICC_VOTERS_START)
>
> The applicable voters should likely be defined in the target-specific
> headers, rather than the common qcom,icc.h. The bit range used for them
> could be common, but each target may only support a small subset of the
> total set of possible voters across all targets.
I'm not sure how client drivers would then choose the
correct path other than
switch (soc) {
case 8450:
tag = QCOM_ICC_TAG_VOTER_8450_HLOS;
break;
case 8550:
tag = QCOM_ICC_TAG_VOTER_8550_HLOS;
break;
...
}
which would be unacceptable.
> Clients requiring multiple voters for the same logical path should be
> rare. On the off-chance they require that, they could just request the
> same path multiple times with different voter tags applied and call
> icc_set_bw() for each of them separately.
>
> I'm back from travel and vacation and plan to pick this up again soon.
Happy to hear that!
Konrad
On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote:
> > The applicable voters should likely be defined in the target-specific
> > headers, rather than the common qcom,icc.h. The bit range used for them
> > could be common, but each target may only support a small subset of the
> > total set of possible voters across all targets.
> I'm not sure how client drivers would then choose the
> correct path other than
>
> switch (soc) {
> case 8450:
> tag = QCOM_ICC_TAG_VOTER_8450_HLOS;
> break;
> case 8550:
> tag = QCOM_ICC_TAG_VOTER_8550_HLOS;
> break;
> ...
> }
>
> which would be unacceptable.
The same general way it's handled for the endpoint bindings, which are
already target-specific.
Any client drivers hardcoding the endpoint bindings in their driver
would have to include the appropriate, target-specific binding header
(e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver
file is itself target-specific. Otherwise, it would have to pull the
endpoint bindings from devicetree. Or just use the recommended
of_icc_get() and let devicetree do everything for them. Same for the
target-specific voter tag bindings.
Clients can also specify their tags in devicetree. They don't actually
have to call icc_set_tag() directly. For example:
#include <dt-bindings/interconnect/qcom,sm8450.h>
interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>;
Then when they call of_icc_get() for this path it'll automatically have
QCOM_ICC_TAG_VOTER_DISP set for them.
On Fri, Sep 15, 2023 at 03:43:27PM +0200, Konrad Dybcio wrote:
> On 14.09.2023 04:32, Mike Tipton wrote:
> > On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote:
> >>> The applicable voters should likely be defined in the target-specific
> >>> headers, rather than the common qcom,icc.h. The bit range used for them
> >>> could be common, but each target may only support a small subset of the
> >>> total set of possible voters across all targets.
> >> I'm not sure how client drivers would then choose the
> >> correct path other than
> >>
> >> switch (soc) {
> >> case 8450:
> >> tag = QCOM_ICC_TAG_VOTER_8450_HLOS;
> >> break;
> >> case 8550:
> >> tag = QCOM_ICC_TAG_VOTER_8550_HLOS;
> >> break;
> >> ...
> >> }
> >>
> >> which would be unacceptable.
> >
> > The same general way it's handled for the endpoint bindings, which are
> > already target-specific.
> >
> > Any client drivers hardcoding the endpoint bindings in their driver
> > would have to include the appropriate, target-specific binding header
> > (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver
> > file is itself target-specific. Otherwise, it would have to pull the
> > endpoint bindings from devicetree. Or just use the recommended
> > of_icc_get() and let devicetree do everything for them. Same for the
> > target-specific voter tag bindings.
> >
> > Clients can also specify their tags in devicetree. They don't actually
> > have to call icc_set_tag() directly. For example:
> >
> > #include <dt-bindings/interconnect/qcom,sm8450.h>
> >
> > interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
> > &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>;
> >
> > Then when they call of_icc_get() for this path it'll automatically have
> > QCOM_ICC_TAG_VOTER_DISP set for them.
> I think I'd skew towards the "define everything in the DT" approach.
>
> One thing that makes me uneasy to go on with this approach is the
> question whether there is a case in which we would want to switch
> from e.g. voting through DISP to voting through APPS (or similar)
> from within a single device.
It shouldn't be common. But it could be done fairly simply by listing
paths for each different voter in the dt properties.
interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_APPS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_APPS>,
<&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>,
interconnect-names = "path-apps-voter",
"path-disp-voter";
On 14.09.2023 04:32, Mike Tipton wrote:
> On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote:
>>> The applicable voters should likely be defined in the target-specific
>>> headers, rather than the common qcom,icc.h. The bit range used for them
>>> could be common, but each target may only support a small subset of the
>>> total set of possible voters across all targets.
>> I'm not sure how client drivers would then choose the
>> correct path other than
>>
>> switch (soc) {
>> case 8450:
>> tag = QCOM_ICC_TAG_VOTER_8450_HLOS;
>> break;
>> case 8550:
>> tag = QCOM_ICC_TAG_VOTER_8550_HLOS;
>> break;
>> ...
>> }
>>
>> which would be unacceptable.
>
> The same general way it's handled for the endpoint bindings, which are
> already target-specific.
>
> Any client drivers hardcoding the endpoint bindings in their driver
> would have to include the appropriate, target-specific binding header
> (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver
> file is itself target-specific. Otherwise, it would have to pull the
> endpoint bindings from devicetree. Or just use the recommended
> of_icc_get() and let devicetree do everything for them. Same for the
> target-specific voter tag bindings.
>
> Clients can also specify their tags in devicetree. They don't actually
> have to call icc_set_tag() directly. For example:
>
> #include <dt-bindings/interconnect/qcom,sm8450.h>
>
> interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
> &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>;
>
> Then when they call of_icc_get() for this path it'll automatically have
> QCOM_ICC_TAG_VOTER_DISP set for them.
I think I'd skew towards the "define everything in the DT" approach.
One thing that makes me uneasy to go on with this approach is the
question whether there is a case in which we would want to switch
from e.g. voting through DISP to voting through APPS (or similar)
from within a single device.
Konrad
On 15.09.2023 18:05, Mike Tipton wrote:
> On Fri, Sep 15, 2023 at 03:43:27PM +0200, Konrad Dybcio wrote:
>> On 14.09.2023 04:32, Mike Tipton wrote:
>>> On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote:
>>>>> The applicable voters should likely be defined in the target-specific
>>>>> headers, rather than the common qcom,icc.h. The bit range used for them
>>>>> could be common, but each target may only support a small subset of the
>>>>> total set of possible voters across all targets.
>>>> I'm not sure how client drivers would then choose the
>>>> correct path other than
>>>>
>>>> switch (soc) {
>>>> case 8450:
>>>> tag = QCOM_ICC_TAG_VOTER_8450_HLOS;
>>>> break;
>>>> case 8550:
>>>> tag = QCOM_ICC_TAG_VOTER_8550_HLOS;
>>>> break;
>>>> ...
>>>> }
>>>>
>>>> which would be unacceptable.
>>>
>>> The same general way it's handled for the endpoint bindings, which are
>>> already target-specific.
>>>
>>> Any client drivers hardcoding the endpoint bindings in their driver
>>> would have to include the appropriate, target-specific binding header
>>> (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver
>>> file is itself target-specific. Otherwise, it would have to pull the
>>> endpoint bindings from devicetree. Or just use the recommended
>>> of_icc_get() and let devicetree do everything for them. Same for the
>>> target-specific voter tag bindings.
>>>
>>> Clients can also specify their tags in devicetree. They don't actually
>>> have to call icc_set_tag() directly. For example:
>>>
>>> #include <dt-bindings/interconnect/qcom,sm8450.h>
>>>
>>> interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
>>> &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>;
>>>
>>> Then when they call of_icc_get() for this path it'll automatically have
>>> QCOM_ICC_TAG_VOTER_DISP set for them.
>> I think I'd skew towards the "define everything in the DT" approach.
>>
>> One thing that makes me uneasy to go on with this approach is the
>> question whether there is a case in which we would want to switch
>> from e.g. voting through DISP to voting through APPS (or similar)
>> from within a single device.
>
> It shouldn't be common. But it could be done fairly simply by listing
> paths for each different voter in the dt properties.
>
> interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_APPS
> &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_APPS>,
> <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP
> &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>,
> interconnect-names = "path-apps-voter",
> "path-disp-voter";
Eeeeeh, I don't know.. this almost sounds like a patch-up solution
to a problem that doesn't quite yet exist.
I debated introducing a third interconnect cell for this, but I am
not sure the added complexity is worth it.
Having a global set of RSC-bound tags would be a "nice" and tidy
solution.. Maybe we could even allocate like 24 bits to these, as
I don't think you'll be introducing new buckets (or at least I hope
you won't!).
24 is an obscene amount of RSCs to have, even counting virtual
channels, so unless you folks have some dark plans to make all
pieces of hardware powered completely separately from each other,
I suppose I could ask for a pinky-promise to not exceed that
number, ever :D
Konrad