This series enables PCI-Express on MT8195 Cherry Tomato Chromebooks,
making it possible to use the MT7921E WiFi card on PCIe bus.
While at it, I've also added the missing hardware PWM nodes for
MT8195 and relevant nodes to get backlight support in all Cherry
devices for the internal display.
!! Please Note !!
This series applies on top of [1], [2] and [3], even though it does not
have any real dependencies on them.
[1]: https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/
[2]: https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/
[3]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=724363
AngeloGioacchino Del Regno (4):
arm64: dts: mediatek: cherry: Add platform thermal configuration
arm64: dts: mediatek: cherry: Enable PCI-Express ports for WiFi
arm64: dts: mediatek: mt8195: Add display pwm nodes
arm64: dts: mediatek: cherry: Add configuration for display backlight
.../dts/mediatek/mt8195-cherry-tomato-r1.dts | 7 +
.../boot/dts/mediatek/mt8195-cherry.dtsi | 173 ++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 23 +++
3 files changed, 203 insertions(+)
--
2.39.2
On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
to enable enumerating this chip.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../dts/mediatek/mt8195-cherry-tomato-r1.dts | 7 ++++++
.../boot/dts/mediatek/mt8195-cherry.dtsi | 25 +++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
index 2d5e8f371b6d..11fc83ddf236 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
@@ -20,6 +20,13 @@ &sound {
model = "mt8195_r1019_5682";
};
+&pcie0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_pins_default>;
+};
+
&ts_10 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index ae2052a7160d..d679a04207d8 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -553,6 +553,13 @@ flash@0 {
};
};
+&pcie1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_pins_default>;
+};
+
&pio {
mediatek,rsel-resistance-in-si-unit;
pinctrl-names = "default";
@@ -934,6 +941,24 @@ pins-cs {
};
};
+ pcie0_pins_default: pcie0-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
+ <PINMUX_GPIO20__FUNC_PERSTN>,
+ <PINMUX_GPIO21__FUNC_CLKREQN>;
+ bias-pull-up;
+ };
+ };
+
+ pcie1_pins_default: pcie1-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
+ <PINMUX_GPIO23__FUNC_CLKREQN_1>,
+ <PINMUX_GPIO24__FUNC_WAKEN_1>;
+ bias-pull-up;
+ };
+ };
+
pio_default: pio-default-pins {
pins-wifi-enable {
pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
--
2.39.2
Configure the hardware PWM for the integrated display's backlight:
all Cherry devices enable the backlight with GPIO82 and manage the
PWM via MediaTek disp-pwm on GPIO97.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../boot/dts/mediatek/mt8195-cherry.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index d679a04207d8..c50f1e2914b2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -22,6 +22,16 @@ aliases {
serial0 = &uart0;
};
+ backlight_lcd0: backlight-lcd0 {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 1023>;
+ default-brightness-level = <576>;
+ enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
+ num-interpolated-steps = <1023>;
+ pwms = <&disp_pwm0 0 500000>;
+ power-supply = <&ppvar_sys>;
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -349,6 +359,13 @@ &auxadc {
status = "okay";
};
+&disp_pwm0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&disp_pwm0_pin_default>;
+};
+
&i2c0 {
status = "okay";
@@ -773,6 +790,13 @@ pins-cmd-dat {
};
};
+ disp_pwm0_pin_default: disp-pwm0-default-pins {
+ pins-disp-pwm {
+ pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
+ <PINMUX_GPIO97__FUNC_DISP_PWM0>;
+ };
+ };
+
i2c0_pins: i2c0-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
--
2.39.2
Add the two hardware PWMs for display backlighting but keep them
disabled by default, as usage is board-specific.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index fecb41104193..c86c4b48dc3f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1102,6 +1102,29 @@ lvts_ap: thermal-sensor@1100b000 {
#thermal-sensor-cells = <1>;
};
+ disp_pwm0: pwm@1100e000 {
+ compatible = "mediatek,mt8195-disp-pwm", "mediatek,mt8183-disp-pwm";
+ reg = <0 0x1100e000 0 0x1000>;
+ interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ #pwm-cells = <2>;
+ clocks = <&topckgen CLK_TOP_DISP_PWM0>,
+ <&infracfg_ao CLK_INFRA_AO_DISP_PWM>;
+ clock-names = "main", "mm";
+ status = "disabled";
+ };
+
+ disp_pwm1: pwm@1100f000 {
+ compatible = "mediatek,mt8195-disp-pwm", "mediatek,mt8183-disp-pwm";
+ reg = <0 0x1100f000 0 0x1000>;
+ interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
+ #pwm-cells = <2>;
+ clocks = <&topckgen CLK_TOP_DISP_PWM1>,
+ <&infracfg_ao CLK_INFRA_AO_DISP_PWM1>;
+ clock-names = "main", "mm";
+ status = "disabled";
+ };
+
spi1: spi@11010000 {
compatible = "mediatek,mt8195-spi",
"mediatek,mt6765-spi";
--
2.39.2
This platform has three auxiliary NTC thermistors, connected to the
SoC's ADC pins. Enable the auxadc in order to be able to read the
ADC values, add a generic-adc-thermal LUT for each and finally assign
them to the SoC's thermal zones.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../boot/dts/mediatek/mt8195-cherry.dtsi | 124 ++++++++++++++++++
1 file changed, 124 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 24669093fbed..ae2052a7160d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -104,6 +104,108 @@ ppvar_sys: regulator-ppvar-sys {
regulator-boot-on;
};
+ tboard_thermistor1: thermal-sensor-t1 {
+ compatible = "generic-adc-thermal";
+ #thermal-sensor-cells = <0>;
+ io-channels = <&auxadc 0>;
+ io-channel-names = "sensor-channel";
+ temperature-lookup-table = < (-5000) 4241
+ 0 4063
+ 5000 3856
+ 10000 3621
+ 15000 3364
+ 20000 3091
+ 25000 2810
+ 30000 2526
+ 35000 2247
+ 40000 1982
+ 45000 1734
+ 50000 1507
+ 55000 1305
+ 60000 1122
+ 65000 964
+ 70000 827
+ 75000 710
+ 80000 606
+ 85000 519
+ 90000 445
+ 95000 382
+ 100000 330
+ 105000 284
+ 110000 245
+ 115000 213
+ 120000 183
+ 125000 161>;
+ };
+
+ tboard_thermistor2: thermal-sensor-t2 {
+ compatible = "generic-adc-thermal";
+ #thermal-sensor-cells = <0>;
+ io-channels = <&auxadc 0>;
+ io-channel-names = "sensor-channel";
+ temperature-lookup-table = < (-5000) 4241
+ 0 4063
+ 5000 3856
+ 10000 3621
+ 15000 3364
+ 20000 3091
+ 25000 2810
+ 30000 2526
+ 35000 2247
+ 40000 1982
+ 45000 1734
+ 50000 1507
+ 55000 1305
+ 60000 1122
+ 65000 964
+ 70000 827
+ 75000 710
+ 80000 606
+ 85000 519
+ 90000 445
+ 95000 382
+ 100000 330
+ 105000 284
+ 110000 245
+ 115000 213
+ 120000 183
+ 125000 161>;
+ };
+
+ tboard_thermistor3: thermal-sensor-t3 {
+ compatible = "generic-adc-thermal";
+ #thermal-sensor-cells = <0>;
+ io-channels = <&auxadc 0>;
+ io-channel-names = "sensor-channel";
+ temperature-lookup-table = < (-5000) 4241
+ 0 4063
+ 5000 3856
+ 10000 3621
+ 15000 3364
+ 20000 3091
+ 25000 2810
+ 30000 2526
+ 35000 2247
+ 40000 1982
+ 45000 1734
+ 50000 1507
+ 55000 1305
+ 60000 1122
+ 65000 964
+ 70000 827
+ 75000 710
+ 80000 606
+ 85000 519
+ 90000 445
+ 95000 382
+ 100000 330
+ 105000 284
+ 110000 245
+ 115000 213
+ 120000 183
+ 125000 161>;
+ };
+
usb_vbus: regulator-5v0-usb-vbus {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
@@ -243,6 +345,10 @@ &gpu {
mali-supply = <&mt6315_7_vbuck1>;
};
+&auxadc {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -1074,6 +1180,24 @@ mt6315_7_vbuck1: vbuck1 {
};
};
+&thermal_zones {
+ ap_ntc1 {
+ polling-delay = <1000>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&tboard_thermistor1>;
+ };
+ ap_ntc2 {
+ polling-delay = <1000>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&tboard_thermistor2>;
+ };
+ ap_ntc3 {
+ polling-delay = <1000>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&tboard_thermistor3>;
+ };
+};
+
&u3phy0 {
status = "okay";
};
--
2.39.2
On Thu, Feb 23, 2023 at 10:56 PM AngeloGioacchino Del Regno
<[email protected]> wrote:
>
> Configure the hardware PWM for the integrated display's backlight:
> all Cherry devices enable the backlight with GPIO82 and manage the
> PWM via MediaTek disp-pwm on GPIO97.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
with some additional patches to enable the internal display.
On Thu, Feb 23, 2023 at 10:56 PM AngeloGioacchino Del Regno
<[email protected]> wrote:
>
> Add the two hardware PWMs for display backlighting but keep them
> disabled by default, as usage is board-specific.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
and
Tested-by: Chen-Yu Tsai <[email protected]>
for disp_pwm0
On Thu, Feb 23, 2023 at 10:55 PM AngeloGioacchino Del Regno
<[email protected]> wrote:
>
> On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
> over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
> to enable enumerating this chip.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> .../dts/mediatek/mt8195-cherry-tomato-r1.dts | 7 ++++++
For pcie0 in tomato-r1, this is not used for WiFi. This was only used in
the earliest version for NVMe. It was subsequently removed. Please add it in
a separate patch.
> .../boot/dts/mediatek/mt8195-cherry.dtsi | 25 +++++++++++++++++++
For pcie1 in Cherry:
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
On Thu, Feb 23, 2023 at 10:55 PM AngeloGioacchino Del Regno
<[email protected]> wrote:
>
> This platform has three auxiliary NTC thermistors, connected to the
> SoC's ADC pins. Enable the auxadc in order to be able to read the
> ADC values, add a generic-adc-thermal LUT for each and finally assign
> them to the SoC's thermal zones.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> .../boot/dts/mediatek/mt8195-cherry.dtsi | 124 ++++++++++++++++++
> 1 file changed, 124 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 24669093fbed..ae2052a7160d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -104,6 +104,108 @@ ppvar_sys: regulator-ppvar-sys {
> regulator-boot-on;
> };
>
> + tboard_thermistor1: thermal-sensor-t1 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> + tboard_thermistor2: thermal-sensor-t2 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> + tboard_thermistor3: thermal-sensor-t3 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> usb_vbus: regulator-5v0-usb-vbus {
> compatible = "regulator-fixed";
> regulator-name = "usb-vbus";
> @@ -243,6 +345,10 @@ &gpu {
> mali-supply = <&mt6315_7_vbuck1>;
> };
>
> +&auxadc {
> + status = "okay";
> +};
> +
> &i2c0 {
> status = "okay";
>
> @@ -1074,6 +1180,24 @@ mt6315_7_vbuck1: vbuck1 {
> };
> };
>
> +&thermal_zones {
> + ap_ntc1 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor1>;
Without trip points, this doesn't satisfy the bindings, nor does the
driver probe.
> + };
> + ap_ntc2 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor2>;
> + };
> + ap_ntc3 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor3>;
> + };
> +};
> +
> &u3phy0 {
> status = "okay";
> };
> --
> 2.39.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Thu, Feb 23, 2023 at 10:55 PM AngeloGioacchino Del Regno
<[email protected]> wrote:
>
> This platform has three auxiliary NTC thermistors, connected to the
> SoC's ADC pins. Enable the auxadc in order to be able to read the
> ADC values, add a generic-adc-thermal LUT for each and finally assign
> them to the SoC's thermal zones.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> .../boot/dts/mediatek/mt8195-cherry.dtsi | 124 ++++++++++++++++++
> 1 file changed, 124 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 24669093fbed..ae2052a7160d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -104,6 +104,108 @@ ppvar_sys: regulator-ppvar-sys {
> regulator-boot-on;
> };
>
> + tboard_thermistor1: thermal-sensor-t1 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> + tboard_thermistor2: thermal-sensor-t2 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
You are reusing the same channel for all three sensors. That doesn't
make a lot of sense.
Furthermore, the design only has two thermistors, connected to the first
two ADC channels. The first one is located near the SoC; the second one
is near the PMIC.
ChenYu
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> + tboard_thermistor3: thermal-sensor-t3 {
> + compatible = "generic-adc-thermal";
> + #thermal-sensor-cells = <0>;
> + io-channels = <&auxadc 0>;
> + io-channel-names = "sensor-channel";
> + temperature-lookup-table = < (-5000) 4241
> + 0 4063
> + 5000 3856
> + 10000 3621
> + 15000 3364
> + 20000 3091
> + 25000 2810
> + 30000 2526
> + 35000 2247
> + 40000 1982
> + 45000 1734
> + 50000 1507
> + 55000 1305
> + 60000 1122
> + 65000 964
> + 70000 827
> + 75000 710
> + 80000 606
> + 85000 519
> + 90000 445
> + 95000 382
> + 100000 330
> + 105000 284
> + 110000 245
> + 115000 213
> + 120000 183
> + 125000 161>;
> + };
> +
> usb_vbus: regulator-5v0-usb-vbus {
> compatible = "regulator-fixed";
> regulator-name = "usb-vbus";
> @@ -243,6 +345,10 @@ &gpu {
> mali-supply = <&mt6315_7_vbuck1>;
> };
>
> +&auxadc {
> + status = "okay";
> +};
> +
> &i2c0 {
> status = "okay";
>
> @@ -1074,6 +1180,24 @@ mt6315_7_vbuck1: vbuck1 {
> };
> };
>
> +&thermal_zones {
> + ap_ntc1 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor1>;
> + };
> + ap_ntc2 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor2>;
> + };
> + ap_ntc3 {
> + polling-delay = <1000>;
> + polling-delay-passive = <0>;
> + thermal-sensors = <&tboard_thermistor3>;
> + };
> +};
> +
> &u3phy0 {
> status = "okay";
> };
> --
> 2.39.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
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On Fri, Feb 24, 2023 at 4:52 PM Chen-Yu Tsai <[email protected]> wrote:
>
> On Thu, Feb 23, 2023 at 10:56 PM AngeloGioacchino Del Regno
> <[email protected]> wrote:
> >
> > Configure the hardware PWM for the integrated display's backlight:
> > all Cherry devices enable the backlight with GPIO82 and manage the
> > PWM via MediaTek disp-pwm on GPIO97.
> >
> > Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
>
> Reviewed-by: Chen-Yu Tsai <[email protected]>
> Tested-by: Chen-Yu Tsai <[email protected]>
>
> with some additional patches to enable the internal display.
Matthias, could you pick up patches 3 and 4 from this series? They are
independent of the other two patches. Having them picked up would reduce
the number of patches that have to get carried for testing and resent.
Thanks
ChenYu
On 24/02/2023 10:01, Chen-Yu Tsai wrote:
> On Thu, Feb 23, 2023 at 10:56 PM AngeloGioacchino Del Regno
> <[email protected]> wrote:
>>
>> Add the two hardware PWMs for display backlighting but keep them
>> disabled by default, as usage is board-specific.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
>
> Reviewed-by: Chen-Yu Tsai <[email protected]>
>
> and
>
> Tested-by: Chen-Yu Tsai <[email protected]>
>
> for disp_pwm0
Applied, thanks!
On 31/03/2023 08:44, Chen-Yu Tsai wrote:
> On Fri, Feb 24, 2023 at 4:52 PM Chen-Yu Tsai <[email protected]> wrote:
>>
>> On Thu, Feb 23, 2023 at 10:56 PM AngeloGioacchino Del Regno
>> <[email protected]> wrote:
>>>
>>> Configure the hardware PWM for the integrated display's backlight:
>>> all Cherry devices enable the backlight with GPIO82 and manage the
>>> PWM via MediaTek disp-pwm on GPIO97.
>>>
>>> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
>>
>> Reviewed-by: Chen-Yu Tsai <[email protected]>
>> Tested-by: Chen-Yu Tsai <[email protected]>
>>
>> with some additional patches to enable the internal display.
>
> Matthias, could you pick up patches 3 and 4 from this series? They are
> independent of the other two patches. Having them picked up would reduce
> the number of patches that have to get carried for testing and resent.
>
Applied, thanks!