2019-07-29 14:07:01

by Neil Armstrong

Subject: [PATCH 2/4] clk: meson: regmap: export regmap_div ops functions

The G12A CPU Clock Postmux divider needs a custom div_set_rate() call.

Export the clk_regmap_div_round_rate() and clk_regmap_div_recalc_rate()
to be able to override the default clk_regmap_div_set_rate() callback.
---
drivers/clk/meson/clk-regmap.c | 10 ++++++----
drivers/clk/meson/clk-regmap.h | 5 +++++
2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c
index dcd1757cc5df..26c8c74a8cf0 100644
--- a/drivers/clk/meson/clk-regmap.c
+++ b/drivers/clk/meson/clk-regmap.c
@@ -56,8 +56,8 @@ const struct clk_ops clk_regmap_gate_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_regmap_gate_ro_ops);

-static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
- unsigned long prate)
+unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
+ unsigned long prate)
{
struct clk_regmap *clk = to_clk_regmap(hw);
struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
@@ -74,9 +74,10 @@ static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
return divider_recalc_rate(hw, prate, val, div->table, div->flags,
div->width);
}
+EXPORT_SYMBOL_GPL(clk_regmap_div_recalc_rate);

-static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
{
struct clk_regmap *clk = to_clk_regmap(hw);
struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
@@ -100,6 +101,7 @@ static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
return divider_round_rate(hw, rate, prate, div->table, div->width,
div->flags);
}
+EXPORT_SYMBOL_GPL(clk_regmap_div_round_rate);

static int clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
diff --git a/drivers/clk/meson/clk-regmap.h b/drivers/clk/meson/clk-regmap.h
index c4a39604cffd..ebf776a32ce3 100644
--- a/drivers/clk/meson/clk-regmap.h
+++ b/drivers/clk/meson/clk-regmap.h
@@ -78,6 +78,11 @@ clk_get_regmap_div_data(struct clk_regmap *clk)
return (struct clk_regmap_div_data *)clk->data;
}

+unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
+ unsigned long prate);
+long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate);
+
extern const struct clk_ops clk_regmap_divider_ops;
extern const struct clk_ops clk_regmap_divider_ro_ops;

--
2.22.0

2019-07-30 16:38:30

by Neil Armstrong

Subject: Re: [PATCH 2/4] clk: meson: regmap: export regmap_div ops functions

On 29/07/2019 15:16, Neil Armstrong wrote:
> The G12A CPU Clock Postmux divider needs a custom div_set_rate() call.
>
> Export the clk_regmap_div_round_rate() and clk_regmap_div_recalc_rate()
> to be able to override the default clk_regmap_div_set_rate() callback.

Signoff missing.... will fix in v2

> ---
> drivers/clk/meson/clk-regmap.c | 10 ++++++----
> drivers/clk/meson/clk-regmap.h | 5 +++++
> 2 files changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c
> index dcd1757cc5df..26c8c74a8cf0 100644
> --- a/drivers/clk/meson/clk-regmap.c
> +++ b/drivers/clk/meson/clk-regmap.c
> @@ -56,8 +56,8 @@ const struct clk_ops clk_regmap_gate_ro_ops = {
> };
> EXPORT_SYMBOL_GPL(clk_regmap_gate_ro_ops);
>
> -static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> - unsigned long prate)
> +unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> + unsigned long prate)
> {
> struct clk_regmap *clk = to_clk_regmap(hw);
> struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
> @@ -74,9 +74,10 @@ static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> return divider_recalc_rate(hw, prate, val, div->table, div->flags,
> div->width);
> }
> +EXPORT_SYMBOL_GPL(clk_regmap_div_recalc_rate);
>
> -static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> - unsigned long *prate)
> +long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long *prate)
> {
> struct clk_regmap *clk = to_clk_regmap(hw);
> struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
> @@ -100,6 +101,7 @@ static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> return divider_round_rate(hw, rate, prate, div->table, div->width,
> div->flags);
> }
> +EXPORT_SYMBOL_GPL(clk_regmap_div_round_rate);
>
> static int clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long parent_rate)
> diff --git a/drivers/clk/meson/clk-regmap.h b/drivers/clk/meson/clk-regmap.h
> index c4a39604cffd..ebf776a32ce3 100644
> --- a/drivers/clk/meson/clk-regmap.h
> +++ b/drivers/clk/meson/clk-regmap.h
> @@ -78,6 +78,11 @@ clk_get_regmap_div_data(struct clk_regmap *clk)
> return (struct clk_regmap_div_data *)clk->data;
> }
>
> +unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
> + unsigned long prate);
> +long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long *prate);
> +
> extern const struct clk_ops clk_regmap_divider_ops;
> extern const struct clk_ops clk_regmap_divider_ro_ops;
>
>