Add devicetree for Milbeaut M10V SoC and M10V Evaluation board.
Signed-off-by: Sugaya Taichi <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/milbeaut-m10v-evb.dts | 32 ++++++++
arch/arm/boot/dts/milbeaut-m10v.dtsi | 131 ++++++++++++++++++++++++++++++++
3 files changed, 164 insertions(+)
create mode 100644 arch/arm/boot/dts/milbeaut-m10v-evb.dts
create mode 100644 arch/arm/boot/dts/milbeaut-m10v.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bd40148..f697d87 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1233,6 +1233,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7623n-bananapi-bpi-r2.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
+dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb
dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
diff --git a/arch/arm/boot/dts/milbeaut-m10v-evb.dts b/arch/arm/boot/dts/milbeaut-m10v-evb.dts
new file mode 100644
index 0000000..59e8d73
--- /dev/null
+++ b/arch/arm/boot/dts/milbeaut-m10v-evb.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Socionext Milbeaut M10V Evaluation Board */
+/dts-v1/;
+#include "milbeaut-m10v.dtsi"
+
+/ {
+ model = "Socionext M10V EVB";
+ compatible = "socionext,milbeaut-m10v-evb", "socionext,sc2000a";
+
+ aliases {
+ serial1 = &uart1;
+ };
+
+ chosen {
+ bootargs = "init=/sbin/finit rootwait earlycon";
+ stdout-path = "serial1:115200n8";
+ };
+
+ clocks {
+ uclk40xi: uclk40xi {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <40000000>;
+ };
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x80000000>;
+ };
+
+};
diff --git a/arch/arm/boot/dts/milbeaut-m10v.dtsi b/arch/arm/boot/dts/milbeaut-m10v.dtsi
new file mode 100644
index 0000000..4fc2f8b
--- /dev/null
+++ b/arch/arm/boot/dts/milbeaut-m10v.dtsi
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "socionext,sc2000a";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "socionext,milbeaut-m10v-smp";
+ cpu@f00 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf00>;
+ };
+ cpu@f01 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf01>;
+ };
+ cpu@f02 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf02>;
+ };
+ cpu@f03 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf03>;
+ };
+ };
+
+ timer { /* The Generic Timer */
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clock-frequency = <40000000>;
+ always-on;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ interrupt-parent = <&gic>;
+
+ gic: interrupt-controller@1d000000 {
+ compatible = "arm,cortex-a7-gic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x1d001000 0x1000>,
+ <0x1d002000 0x1000>; /* CPU I/f base and size */
+ };
+
+ clk: m10v-clock-ctrl@1d021000 {
+ compatible = "socionext,milbeaut-m10v-ccu";
+ #clock-cells = <1>;
+ reg = <0x1d021000 0x1000>;
+ clocks = <&uclk40xi>;
+ };
+
+ timer@1e000050 { /* 32-bit Reload Timers */
+ compatible = "socionext,milbeaut-timer";
+ reg = <0x1e000050 0x20>;
+ interrupts = <0 91 4>;
+ clocks = <&clk 4>;
+ };
+
+ pinctrl: pinctrl@1d022000 {
+ compatible = "socionext,milbeaut-m10v-pinctrl";
+ reg = <0x1d022000 0x1000>,
+ <0x1c26f000 0x1000>;
+ reg-names = "pinctrl", "exiu";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&clk 4>;
+ interrupts = <0 54 4>, <0 55 4>, <0 56 4>, <0 57 4>,
+ <0 58 4>, <0 59 4>, <0 60 4>, <0 61 4>,
+ <0 62 4>, <0 63 4>, <0 64 4>, <0 65 4>,
+ <0 66 4>, <0 67 4>, <0 68 4>, <0 69 4>;
+ interrupt-names = "pin-48", "pin-49", "pin-50",
+ "pin-51", "pin-52", "pin-53",
+ "pin-54", "pin-55", "pin-56",
+ "pin-57", "pin-58", "pin-59",
+ "pin-60", "pin-61", "pin-62",
+ "pin-63";
+
+ usio1pins: usio1pins {
+ pins = "PE4", "PE5", "P87";
+ function = "usio1";
+ };
+ };
+
+ uart1: serial@1e700010 { /* PE4, PE5 */
+ /* Enable this as ttyUSI0 */
+ compatible = "socionext,milbeaut-usio-uart";
+ reg = <0x1e700010 0x10>;
+ interrupts = <0 141 0x4>, <0 149 0x4>;
+ interrupt-names = "rx", "tx";
+ clocks = <&clk 2>;
+ };
+
+ };
+
+ sram@0 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x10000>;
+ smp-sram@f100 {
+ compatible = "socionext,milbeaut-smp-sram";
+ reg = <0xf100 0x20>;
+ };
+ };
+};
--
1.9.1
On Fri, Feb 8, 2019 at 1:28 PM Sugaya Taichi
<[email protected]> wrote:
> +
> + aliases {
> + serial1 = &uart1;
> + };
Maybe start with serial0 here? It seems unusual to start
counting at 1.
> + chosen {
> + bootargs = "init=/sbin/finit rootwait earlycon";
The /sbin/finit argument seems user space specific, so you probably don't
want this in the dts file but rather pass it from the boot loader.
Possible drop the bootargs entirely.
Arnd
Hi,
Thank you for you comments.
On 2019/02/18 21:09, Arnd Bergmann wrote:
> On Fri, Feb 8, 2019 at 1:28 PM Sugaya Taichi
> <[email protected]> wrote:
>> +
>> + aliases {
>> + serial1 = &uart1;
>> + };
>
> Maybe start with serial0 here? It seems unusual to start
> counting at 1.
>
The M10V evaluation board(EVB) uses a console with uart ch1, so this
alias number is derived from the used channel one.
Therefore it is no problem to change the alias number to 0.
>> + chosen {
>> + bootargs = "init=/sbin/finit rootwait earlycon";
>
> The /sbin/finit argument seems user space specific, so you probably don't
> want this in the dts file but rather pass it from the boot loader.
> Possible drop the bootargs entirely.
>
Okay, remove the arg from the dts and add to bootargs instead.
Thanks,
Sugaya Taichi
> Arnd
>
On Tue, Feb 19, 2019 at 6:11 AM Sugaya, Taichi
<[email protected]> wrote:
>
> Hi,
> Thank you for you comments.
>
> On 2019/02/18 21:09, Arnd Bergmann wrote:
> > On Fri, Feb 8, 2019 at 1:28 PM Sugaya Taichi
> > <[email protected]> wrote:
> >> +
> >> + aliases {
> >> + serial1 = &uart1;
> >> + };
> >
> > Maybe start with serial0 here? It seems unusual to start
> > counting at 1.
> >
>
> The M10V evaluation board(EVB) uses a console with uart ch1, so this
> alias number is derived from the used channel one.
> Therefore it is no problem to change the alias number to 0.
The alias should normally reflect whatever is printed on the board,
if there are no labels, the convention is to start with zero, regardless
of what internal uart is connected to it.
Arnd
Hi,
On 2019/02/19 19:11, Arnd Bergmann wrote:
> On Tue, Feb 19, 2019 at 6:11 AM Sugaya, Taichi
> <[email protected]> wrote:
>>
>> Hi,
>> Thank you for you comments.
>>
>> On 2019/02/18 21:09, Arnd Bergmann wrote:
>>> On Fri, Feb 8, 2019 at 1:28 PM Sugaya Taichi
>>> <[email protected]> wrote:
>>>> +
>>>> + aliases {
>>>> + serial1 = &uart1;
>>>> + };
>>>
>>> Maybe start with serial0 here? It seems unusual to start
>>> counting at 1.
>>>
>>
>> The M10V evaluation board(EVB) uses a console with uart ch1, so this
>> alias number is derived from the used channel one.
>> Therefore it is no problem to change the alias number to 0.
>
> The alias should normally reflect whatever is printed on the board,
> if there are no labels, the convention is to start with zero, regardless
> of what internal uart is connected to it.
>
I got it.
I use a "serial0" beacause there are no labels about uart ch on M10V EVB.
Thanks,
Sugaya Taichi
> Arnd
>