From: Pavel Pisa <[email protected]>
This driver adds support for the CTU CAN FD open-source IP core.
More documentation and core sources at project page
(https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).
The core integration to Xilinx Zynq system as platform driver
is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
Implementation on Intel FPGA based PCI Express board is available
from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd).
The CTU CAN FD core emulation send for review for QEMU mainline.
Development repository for QEMU emulation - ctu-canfd branch of
https://gitlab.fel.cvut.cz/canbus/qemu-canbus
More about CAN bus related projects used and developed at CTU FEE
on the guidepost page http://canbus.pages.fel.cvut.cz/ .
Martin Jerabek (1):
can: ctucanfd: add support for CTU CAN FD open-source IP core - bus
independent part.
Pavel Pisa (5):
dt-bindings: vendor-prefix: add prefix for the Czech Technical
University in Prague.
dt-bindings: net: can: binding for CTU CAN FD open-source IP core.
can: ctucanfd: CTU CAN FD open-source IP core - PCI bus support.
can: ctucanfd: CTU CAN FD open-source IP core - platform/SoC support.
docs: ctucanfd: CTU CAN FD open-source IP core documentation.
The version 5 changes:
- sent at 2020-08-15
- correct Kconfig formatting according to Randy Dunlap
- silence warnings reported by make W=1 C=1 flags.
Changes suggested by Jakub Kicinski
- big thanks for core patch review by Pavel Machek
resulting in more readability and formating updates
- fix power management errors found by Pavel Machek
- removed comments from d-t bindings as suggested by Rob Herring
- selected ctu,ctucanfd-2 as alternative name to ctu,ctucanfd
which allows to bind to actual major HDL core sources version 2.x
if for some reason driver adaptation would not work on version
read from the core
- line length limit relaxed to 100 characters on some cases
where it helps to readability
The version 4 changes:
- sent at 2020-08-04
- changes summary, 169 non-merge commits, 6 driver,
32 IP core sources enhancements and fixes, 58 tests
in master and about additional 30 iso-testbench
preparation branch.
- convert device-tree binding documentation to YAML
- QEMU model of CTU CAN FD IP core and generic extension
of QEMU CAN bus emulation developed by Jan Charvat.
- driver tested on QEMU emulated Malta big-endian MIPS
platform and big endian-support fixed.
- checkpatch from 5.4 kernel used to cleanup driver formatting
- header files generated from IP core IP-Xact description
updated to include protocol exception (pex) field.
Mechanism to set it from the driver is not provided yet.
The version 3 changes:
- sent at 2019-12-21
- adapts device tree bindings documentation according to
Rob Herring suggestions.
- the driver has been separated to individual modules for core support,
PCI bus integration and platform, SoC integration.
- the FPGA design has been cleaned up and CAN protocol FSM redesigned
by Ondrej Ille (the core redesign has been reason to pause attempts to driver
submission)
- the work from February 2019 on core, test framework and driver
1601 commits in total, 436 commits in the core sources, 144 commits
in the driver, 151 documentation, 502 in tests.
- not all continuous integration tests updated for latest design version yet
https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/pipelines
- Zynq hardware in the loop test show no issues for after driver PCI and platform
separation and latest VHDL sources updates.
- driver code has been periodically tested on 4.18.5-rt3 and 4.19 long term
stable kernels.
- test of the patches before submission is run on 5.4 kernel
- the core has been integrated by Jaroslav Beran <[email protected]>
into Intel FPGA based SoC used in the tester developed for Skoda auto
at Department of Measurement, Faculty of Electrical Engineering,
Czech Technical University https://meas.fel.cvut.cz/ . He has contributed
feedback and fixes to the project.
The version 2 sent at 2019-02-27
The version 1 sent at 2019-02-22
Ondrej Ille has prepared the CTU CAN IP Core sources for new release.
We are waiting with it for the driver review, our intention
is to release IP when driver is reviewed and mainlined.
DKMS CTU CAN FD driver build by OpenBuildService to ease integration
into Debian systems when driver is not provided by the distribution
https://build.opensuse.org/package/show/home:ppisa/ctu_can_fd
Jan Charvat <[email protected]> finished work to extend already
mainlined QEMU SJA1000 and SocketCAN support to provide even CAN FD
support and CTU CAN FD core support.
https://gitlab.fel.cvut.cz/canbus/qemu-canbus/-/tree/ctu-canfd
The patches has been sent for review to QEMU mainlining list.
Thanks in advance to all who help us to deliver the project into public.
Thanks to all colleagues, reviewers and other providing feedback,
infrastructure and enthusiasm and motivation for open-source work.
Build infrastructure and hardware is provided by
Department of Control Engineering,
Faculty of Electrical Engineering,
Czech Technical University in Prague
https://dce.fel.cvut.cz/en
.../bindings/net/can/ctu,ctucanfd.yaml | 63 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
.../ctu/FSM_TXT_Buffer_user.png | Bin 0 -> 174807 bytes
.../device_drivers/ctu/ctucanfd-driver.rst | 634 ++++++++++
drivers/net/can/Kconfig | 1 +
drivers/net/can/Makefile | 1 +
drivers/net/can/ctucanfd/Kconfig | 35 +
drivers/net/can/ctucanfd/Makefile | 13 +
drivers/net/can/ctucanfd/ctu_can_fd.c | 1105 +++++++++++++++++
drivers/net/can/ctucanfd/ctu_can_fd.h | 87 ++
drivers/net/can/ctucanfd/ctu_can_fd_frame.h | 189 +++
drivers/net/can/ctucanfd/ctu_can_fd_hw.c | 790 ++++++++++++
drivers/net/can/ctucanfd/ctu_can_fd_hw.h | 916 ++++++++++++++
drivers/net/can/ctucanfd/ctu_can_fd_pci.c | 314 +++++
.../net/can/ctucanfd/ctu_can_fd_platform.c | 142 +++
drivers/net/can/ctucanfd/ctu_can_fd_regs.h | 971 +++++++++++++++
16 files changed, 5263 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
create mode 100644 Documentation/networking/device_drivers/ctu/FSM_TXT_Buffer_user.png
create mode 100644 Documentation/networking/device_drivers/ctu/ctucanfd-driver.rst
create mode 100644 drivers/net/can/ctucanfd/Kconfig
create mode 100644 drivers/net/can/ctucanfd/Makefile
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd.c
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd.h
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_frame.h
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_hw.c
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_hw.h
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_pci.c
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_platform.c
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_regs.h
--
2.20.1
Platform bus adaptation for CTU CAN FD open-source IP core.
The core has been tested together with OpenCores SJA1000
modified to be CAN FD frames tolerant on MicroZed Zynq based
MZ_APO education kits designed by Petr Porazil from PiKRON.com
company. FPGA design
https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
The kit description at the Computer Architectures course pages
https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .
Kit carrier board and mechanics design source files
https://gitlab.com/pikron/projects/mz_apo/microzed_apo
The work is documented in Martin Jeřábek's diploma theses
Open-source and Open-hardware CAN FD Protocol Support
https://dspace.cvut.cz/handle/10467/80366
.
Signed-off-by: Pavel Pisa <[email protected]>
Signed-off-by: Martin Jerabek <[email protected]>
Signed-off-by: Ondrej Ille <[email protected]>
---
drivers/net/can/ctucanfd/Kconfig | 11 ++
drivers/net/can/ctucanfd/Makefile | 3 +
.../net/can/ctucanfd/ctu_can_fd_platform.c | 142 ++++++++++++++++++
3 files changed, 156 insertions(+)
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_platform.c
diff --git a/drivers/net/can/ctucanfd/Kconfig b/drivers/net/can/ctucanfd/Kconfig
index e1636373628a..a8c9cc38f216 100644
--- a/drivers/net/can/ctucanfd/Kconfig
+++ b/drivers/net/can/ctucanfd/Kconfig
@@ -21,4 +21,15 @@ config CAN_CTUCANFD_PCI
PCIe board with PiKRON.com designed transceiver riser shield is available
at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
+config CAN_CTUCANFD_PLATFORM
+ tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
+ depends on OF
+ help
+ The core has been tested together with OpenCores SJA1000
+ modified to be CAN FD frames tolerant on MicroZed Zynq based
+ MZ_APO education kits designed by Petr Porazil from PiKRON.com
+ company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
+ The kit description at the Computer Architectures course pages
+ https://cw.fel.cvut.cz/b182/courses/b35apo/documentation/mz_apo/start .
+
endif
diff --git a/drivers/net/can/ctucanfd/Makefile b/drivers/net/can/ctucanfd/Makefile
index eb945260952d..a77ca72d534e 100644
--- a/drivers/net/can/ctucanfd/Makefile
+++ b/drivers/net/can/ctucanfd/Makefile
@@ -8,3 +8,6 @@ ctucanfd-y := ctu_can_fd.o ctu_can_fd_hw.o
obj-$(CONFIG_CAN_CTUCANFD_PCI) += ctucanfd_pci.o
ctucanfd_pci-y := ctu_can_fd_pci.o
+
+obj-$(CONFIG_CAN_CTUCANFD_PLATFORM) += ctucanfd_platform.o
+ctucanfd_platform-y += ctu_can_fd_platform.o
diff --git a/drivers/net/can/ctucanfd/ctu_can_fd_platform.c b/drivers/net/can/ctucanfd/ctu_can_fd_platform.c
new file mode 100644
index 000000000000..c35b16b8566b
--- /dev/null
+++ b/drivers/net/can/ctucanfd/ctu_can_fd_platform.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*******************************************************************************
+ *
+ * CTU CAN FD IP Core
+ *
+ * Copyright (C) 2015-2018 Ondrej Ille <[email protected]> FEE CTU
+ * Copyright (C) 2018-2020 Ondrej Ille <[email protected]> self-funded
+ * Copyright (C) 2018-2019 Martin Jerabek <[email protected]> FEE CTU
+ * Copyright (C) 2018-2020 Pavel Pisa <[email protected]> FEE CTU/self-funded
+ *
+ * Project advisors:
+ * Jiri Novak <[email protected]>
+ * Pavel Pisa <[email protected]>
+ *
+ * Department of Measurement (http://meas.fel.cvut.cz/)
+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)
+ * Czech Technical University (http://www.cvut.cz/)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ ******************************************************************************/
+
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#include "ctu_can_fd.h"
+
+#define DRV_NAME "ctucanfd"
+
+static void ctucan_platform_set_drvdata(struct device *dev,
+ struct net_device *ndev)
+{
+ struct platform_device *pdev = container_of(dev, struct platform_device,
+ dev);
+
+ platform_set_drvdata(pdev, ndev);
+}
+
+/**
+ * ctucan_platform_probe - Platform registration call
+ * @pdev: Handle to the platform device structure
+ *
+ * This function does all the memory allocation and registration for the CAN
+ * device.
+ *
+ * Return: 0 on success and failure value on error
+ */
+static int ctucan_platform_probe(struct platform_device *pdev)
+{
+ struct resource *res; /* IO mem resources */
+ struct device *dev = &pdev->dev;
+ void __iomem *addr;
+ int ret;
+ unsigned int ntxbufs;
+ int irq;
+
+ /* Get the virtual base address for the device */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ addr = devm_ioremap_resource(dev, res);
+ if (IS_ERR(addr)) {
+ dev_err(dev, "Cannot remap address.\n");
+ ret = PTR_ERR(addr);
+ goto err;
+ }
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(dev, "Cannot find interrupt.\n");
+ ret = irq;
+ goto err;
+ }
+
+ /* Number of tx bufs might be change in HW for future. If so,
+ * it will be passed as property via device tree
+ */
+ ntxbufs = 4;
+ ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 0,
+ 1, ctucan_platform_set_drvdata);
+
+ if (ret < 0)
+ platform_set_drvdata(pdev, NULL);
+
+err:
+ return ret;
+}
+
+/**
+ * ctucan_platform_remove - Unregister the device after releasing the resources
+ * @pdev: Handle to the platform device structure
+ *
+ * This function frees all the resources allocated to the device.
+ * Return: 0 always
+ */
+static int ctucan_platform_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct ctucan_priv *priv = netdev_priv(ndev);
+
+ netdev_dbg(ndev, "ctucan_remove");
+
+ unregister_candev(ndev);
+ pm_runtime_disable(&pdev->dev);
+ netif_napi_del(&priv->napi);
+ free_candev(ndev);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(ctucan_platform_pm_ops, ctucan_suspend, ctucan_resume);
+
+/* Match table for OF platform binding */
+static const struct of_device_id ctucan_of_match[] = {
+ { .compatible = "ctu,ctucanfd-2", },
+ { .compatible = "ctu,ctucanfd", },
+ { /* end of list */ },
+};
+MODULE_DEVICE_TABLE(of, ctucan_of_match);
+
+static struct platform_driver ctucanfd_driver = {
+ .probe = ctucan_platform_probe,
+ .remove = ctucan_platform_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .pm = &ctucan_platform_pm_ops,
+ .of_match_table = ctucan_of_match,
+ },
+};
+
+module_platform_driver(ctucanfd_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Martin Jerabek");
+MODULE_DESCRIPTION("CTU CAN FD for platform");
--
2.20.1
PCI bus adaptation for CTU CAN FD open-source IP core.
The project providing FPGA design for Intel EP4CGX15 based DB4CGX15
PCIe board with PiKRON.com designed transceiver riser shield is available
at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
Signed-off-by: Pavel Pisa <[email protected]>
Signed-off-by: Martin Jerabek <[email protected]>
Signed-off-by: Ondrej Ille <[email protected]>
---
drivers/net/can/ctucanfd/Kconfig | 9 +
drivers/net/can/ctucanfd/Makefile | 3 +
drivers/net/can/ctucanfd/ctu_can_fd_pci.c | 314 ++++++++++++++++++++++
3 files changed, 326 insertions(+)
create mode 100644 drivers/net/can/ctucanfd/ctu_can_fd_pci.c
diff --git a/drivers/net/can/ctucanfd/Kconfig b/drivers/net/can/ctucanfd/Kconfig
index d8da44d7f926..e1636373628a 100644
--- a/drivers/net/can/ctucanfd/Kconfig
+++ b/drivers/net/can/ctucanfd/Kconfig
@@ -12,4 +12,13 @@ config CAN_CTUCANFD
if CAN_CTUCANFD
+config CAN_CTUCANFD_PCI
+ tristate "CTU CAN-FD IP core PCI/PCIe driver"
+ depends on PCI
+ help
+ This driver adds PCI/PCIe support for CTU CAN-FD IP core.
+ The project providing FPGA design for Intel EP4CGX15 based DB4CGX15
+ PCIe board with PiKRON.com designed transceiver riser shield is available
+ at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
+
endif
diff --git a/drivers/net/can/ctucanfd/Makefile b/drivers/net/can/ctucanfd/Makefile
index 8d47008d0076..eb945260952d 100644
--- a/drivers/net/can/ctucanfd/Makefile
+++ b/drivers/net/can/ctucanfd/Makefile
@@ -5,3 +5,6 @@
obj-$(CONFIG_CAN_CTUCANFD) := ctucanfd.o
ctucanfd-y := ctu_can_fd.o ctu_can_fd_hw.o
+
+obj-$(CONFIG_CAN_CTUCANFD_PCI) += ctucanfd_pci.o
+ctucanfd_pci-y := ctu_can_fd_pci.o
diff --git a/drivers/net/can/ctucanfd/ctu_can_fd_pci.c b/drivers/net/can/ctucanfd/ctu_can_fd_pci.c
new file mode 100644
index 000000000000..c4542eac2747
--- /dev/null
+++ b/drivers/net/can/ctucanfd/ctu_can_fd_pci.c
@@ -0,0 +1,314 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*******************************************************************************
+ *
+ * CTU CAN FD IP Core
+ *
+ * Copyright (C) 2015-2018 Ondrej Ille <[email protected]> FEE CTU
+ * Copyright (C) 2018-2020 Ondrej Ille <[email protected]> self-funded
+ * Copyright (C) 2018-2019 Martin Jerabek <[email protected]> FEE CTU
+ * Copyright (C) 2018-2020 Pavel Pisa <[email protected]> FEE CTU/self-funded
+ *
+ * Project advisors:
+ * Jiri Novak <[email protected]>
+ * Pavel Pisa <[email protected]>
+ *
+ * Department of Measurement (http://meas.fel.cvut.cz/)
+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)
+ * Czech Technical University (http://www.cvut.cz/)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ ******************************************************************************/
+
+#include <linux/module.h>
+#include <linux/pci.h>
+
+#include "ctu_can_fd.h"
+
+#define DRV_NAME "ctucanfd_pci"
+
+#ifndef PCI_DEVICE_DATA
+#define PCI_DEVICE_DATA(vend, dev, data) \
+.vendor = PCI_VENDOR_ID_##vend, \
+.device = PCI_DEVICE_ID_##vend##_##dev, \
+.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0, \
+.driver_data = (kernel_ulong_t)(data)
+#endif
+#ifndef PCI_VENDOR_ID_TEDIA
+#define PCI_VENDOR_ID_TEDIA 0x1760
+#endif
+
+#define PCI_DEVICE_ID_ALTERA_CTUCAN_TEST 0xCAFD
+#define PCI_DEVICE_ID_TEDIA_CTUCAN_VER21 0xff00
+
+#define CTUCAN_BAR0_CTUCAN_ID 0x0000
+#define CTUCAN_BAR0_CRA_BASE 0x4000
+#define CYCLONE_IV_CRA_A2P_IE (0x0050)
+
+#define CTUCAN_WITHOUT_CTUCAN_ID 0
+#define CTUCAN_WITH_CTUCAN_ID 1
+
+static bool use_msi = 1;
+module_param(use_msi, bool, 0444);
+MODULE_PARM_DESC(use_msi, "PCIe implementation use MSI interrupts. Default: 1 (yes)");
+
+static bool pci_use_second = 1;
+module_param(pci_use_second, bool, 0444);
+MODULE_PARM_DESC(pci_use_second, "Use the second CAN core on PCIe card. Default: 1 (yes)");
+
+struct ctucan_pci_board_data {
+ void __iomem *bar0_base;
+ void __iomem *cra_base;
+ void __iomem *bar1_base;
+ struct list_head ndev_list_head;
+ int use_msi;
+};
+
+static struct ctucan_pci_board_data *ctucan_pci_get_bdata(struct pci_dev *pdev)
+{
+ return (struct ctucan_pci_board_data *)pci_get_drvdata(pdev);
+}
+
+static void ctucan_pci_set_drvdata(struct device *dev,
+ struct net_device *ndev)
+{
+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
+ struct ctucan_priv *priv = netdev_priv(ndev);
+ struct ctucan_pci_board_data *bdata = ctucan_pci_get_bdata(pdev);
+
+ list_add(&priv->peers_on_pdev, &bdata->ndev_list_head);
+ priv->irq_flags = IRQF_SHARED;
+}
+
+/**
+ * ctucan_pci_probe - PCI registration call
+ * @pdev: Handle to the pci device structure
+ * @ent: Pointer to the entry from ctucan_pci_tbl
+ *
+ * This function does all the memory allocation and registration for the CAN
+ * device.
+ *
+ * Return: 0 on success and failure value on error
+ */
+static int ctucan_pci_probe(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ struct device *dev = &pdev->dev;
+ unsigned long driver_data = ent->driver_data;
+ struct ctucan_pci_board_data *bdata;
+ void __iomem *addr;
+ void __iomem *cra_addr;
+ void __iomem *bar0_base;
+ u32 cra_a2p_ie;
+ u32 ctucan_id = 0;
+ int ret;
+ unsigned int ntxbufs;
+ unsigned int num_cores = 1;
+ unsigned int core_i = 0;
+ int irq;
+ int msi_ok = 0;
+
+ ret = pci_enable_device(pdev);
+ if (ret) {
+ dev_err(dev, "pci_enable_device FAILED\n");
+ goto err;
+ }
+
+ ret = pci_request_regions(pdev, KBUILD_MODNAME);
+ if (ret) {
+ dev_err(dev, "pci_request_regions FAILED\n");
+ goto err_disable_device;
+ }
+
+ if (use_msi) {
+ ret = pci_enable_msi(pdev);
+ if (!ret) {
+ dev_info(dev, "MSI enabled\n");
+ pci_set_master(pdev);
+ msi_ok = 1;
+ }
+ }
+
+ dev_info(dev, "ctucan BAR0 0x%08llx 0x%08llx\n",
+ (long long)pci_resource_start(pdev, 0),
+ (long long)pci_resource_len(pdev, 0));
+
+ dev_info(dev, "ctucan BAR1 0x%08llx 0x%08llx\n",
+ (long long)pci_resource_start(pdev, 1),
+ (long long)pci_resource_len(pdev, 1));
+
+ addr = pci_iomap(pdev, 1, pci_resource_len(pdev, 1));
+ if (!addr) {
+ dev_err(dev, "PCI BAR 1 cannot be mapped\n");
+ ret = -ENOMEM;
+ goto err_release_regions;
+ }
+
+ /* Cyclone IV PCI Express Control Registers Area */
+ bar0_base = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
+ if (!bar0_base) {
+ dev_err(dev, "PCI BAR 0 cannot be mapped\n");
+ ret = -EIO;
+ goto err_pci_iounmap_bar1;
+ }
+
+ if (driver_data == CTUCAN_WITHOUT_CTUCAN_ID) {
+ cra_addr = bar0_base;
+ num_cores = 2;
+ } else {
+ cra_addr = bar0_base + CTUCAN_BAR0_CRA_BASE;
+ ctucan_id = ioread32(bar0_base + CTUCAN_BAR0_CTUCAN_ID);
+ dev_info(dev, "ctucan_id 0x%08lx\n", (unsigned long)ctucan_id);
+ num_cores = ctucan_id & 0xf;
+ }
+
+ irq = pdev->irq;
+
+ ntxbufs = 4;
+
+ bdata = kzalloc(sizeof(*bdata), GFP_KERNEL);
+ if (!bdata) {
+ ret = -ENOMEM;
+ goto err_pci_iounmap_bar0;
+ }
+
+ INIT_LIST_HEAD(&bdata->ndev_list_head);
+ bdata->bar0_base = bar0_base;
+ bdata->cra_base = cra_addr;
+ bdata->bar1_base = addr;
+ bdata->use_msi = msi_ok;
+
+ pci_set_drvdata(pdev, bdata);
+
+ ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 100000000,
+ 0, ctucan_pci_set_drvdata);
+ if (ret < 0)
+ goto err_free_board;
+
+ core_i++;
+
+ while (pci_use_second && (core_i < num_cores)) {
+ addr += 0x4000;
+ ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 100000000,
+ 0, ctucan_pci_set_drvdata);
+ if (ret < 0) {
+ dev_info(dev, "CTU CAN FD core %d initialization failed\n",
+ core_i);
+ break;
+ }
+ core_i++;
+ }
+
+ /* enable interrupt in
+ * Avalon-MM to PCI Express Interrupt Enable Register
+ */
+ cra_a2p_ie = ioread32(cra_addr + CYCLONE_IV_CRA_A2P_IE);
+ dev_info(dev, "cra_a2p_ie 0x%08x\n", cra_a2p_ie);
+ cra_a2p_ie |= 1;
+ iowrite32(cra_a2p_ie, cra_addr + CYCLONE_IV_CRA_A2P_IE);
+ cra_a2p_ie = ioread32(cra_addr + CYCLONE_IV_CRA_A2P_IE);
+ dev_info(dev, "cra_a2p_ie 0x%08x\n", cra_a2p_ie);
+
+ return 0;
+
+err_free_board:
+ pci_set_drvdata(pdev, NULL);
+ kfree(bdata);
+err_pci_iounmap_bar0:
+ pci_iounmap(pdev, cra_addr);
+err_pci_iounmap_bar1:
+ pci_iounmap(pdev, addr);
+err_release_regions:
+ if (msi_ok) {
+ pci_disable_msi(pdev);
+ pci_clear_master(pdev);
+ }
+ pci_release_regions(pdev);
+err_disable_device:
+ pci_disable_device(pdev);
+err:
+ return ret;
+}
+
+/**
+ * ctucan_pci_remove - Unregister the device after releasing the resources
+ * @pdev: Handle to the pci device structure
+ *
+ * This function frees all the resources allocated to the device.
+ * Return: 0 always
+ */
+static void ctucan_pci_remove(struct pci_dev *pdev)
+{
+ struct net_device *ndev;
+ struct ctucan_priv *priv = NULL;
+ struct ctucan_pci_board_data *bdata = ctucan_pci_get_bdata(pdev);
+
+ dev_dbg(&pdev->dev, "ctucan_remove");
+
+ if (!bdata) {
+ dev_err(&pdev->dev, "%s: no list of devices\n", __func__);
+ return;
+ }
+
+ /* disable interrupt in
+ * Avalon-MM to PCI Express Interrupt Enable Register
+ */
+ if (bdata->cra_base)
+ iowrite32(0, bdata->cra_base + CYCLONE_IV_CRA_A2P_IE);
+
+ while ((priv = list_first_entry_or_null(&bdata->ndev_list_head, struct ctucan_priv,
+ peers_on_pdev)) != NULL) {
+ ndev = priv->can.dev;
+
+ unregister_candev(ndev);
+
+ netif_napi_del(&priv->napi);
+
+ list_del_init(&priv->peers_on_pdev);
+ free_candev(ndev);
+ }
+
+ pci_iounmap(pdev, bdata->bar1_base);
+
+ if (bdata->use_msi) {
+ pci_disable_msi(pdev);
+ pci_clear_master(pdev);
+ }
+
+ pci_release_regions(pdev);
+ pci_disable_device(pdev);
+
+ pci_iounmap(pdev, bdata->bar0_base);
+
+ pci_set_drvdata(pdev, NULL);
+ kfree(bdata);
+}
+
+static SIMPLE_DEV_PM_OPS(ctucan_pci_pm_ops, ctucan_suspend, ctucan_resume);
+
+static const struct pci_device_id ctucan_pci_tbl[] = {
+ {PCI_DEVICE_DATA(TEDIA, CTUCAN_VER21,
+ CTUCAN_WITH_CTUCAN_ID)},
+ {},
+};
+
+static struct pci_driver ctucan_pci_driver = {
+ .name = KBUILD_MODNAME,
+ .id_table = ctucan_pci_tbl,
+ .probe = ctucan_pci_probe,
+ .remove = ctucan_pci_remove,
+ .driver.pm = &ctucan_pci_pm_ops,
+};
+
+module_pci_driver(ctucan_pci_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Pavel Pisa");
+MODULE_DESCRIPTION("CTU CAN FD for PCI bus");
--
2.20.1
On 8/15/20 12:43 PM, Pavel Pisa wrote:
> diff --git a/drivers/net/can/ctucanfd/Kconfig b/drivers/net/can/ctucanfd/Kconfig
> index e1636373628a..a8c9cc38f216 100644
> --- a/drivers/net/can/ctucanfd/Kconfig
> +++ b/drivers/net/can/ctucanfd/Kconfig
> @@ -21,4 +21,15 @@ config CAN_CTUCANFD_PCI
> PCIe board with PiKRON.com designed transceiver riser shield is available
> at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
>
> +config CAN_CTUCANFD_PLATFORM
> + tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
> + depends on OF
Can this be
depends on OF || COMPILE_TEST
?
> + help
> + The core has been tested together with OpenCores SJA1000
> + modified to be CAN FD frames tolerant on MicroZed Zynq based
> + MZ_APO education kits designed by Petr Porazil from PiKRON.com
> + company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
> + The kit description at the Computer Architectures course pages
> + https://cw.fel.cvut.cz/b182/courses/b35apo/documentation/mz_apo/start .
> +
> endif
--
~Randy
Hello Randy and Rob,
thanks much for review, I have corrected FPGA spelling
and binding YAML license.
On Sunday 16 of August 2020 01:28:13 Randy Dunlap wrote:
> On 8/15/20 12:43 PM, Pavel Pisa wrote:
> > diff --git a/drivers/net/can/ctucanfd/Kconfig
> > b/drivers/net/can/ctucanfd/Kconfig index e1636373628a..a8c9cc38f216
> > 100644
> > --- a/drivers/net/can/ctucanfd/Kconfig
> > +++ b/drivers/net/can/ctucanfd/Kconfig
> > @@ -21,4 +21,15 @@ config CAN_CTUCANFD_PCI
> > PCIe board with PiKRON.com designed transceiver riser shield is
> > available at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
> >
> > +config CAN_CTUCANFD_PLATFORM
> > + tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
> > + depends on OF
>
> Can this be
> depends on OF || COMPILE_TEST
> ?
I am not sure for this change. Is it ensured/documented somewhere that
header files provide dummy definition such way, that OF drivers builds
even if OF support is disabled? If I remember well, CTU CAN FD OF
module build fails if attempted in the frame of native x86_64
build where OF has been disabled. Does COMPILE_TEST ensure that
such build succeeds.
As for the next steps, I expect that without any review of Marc Kleine-Budde
or Wolfgang Grandegger from initial attempt for submission from February 2019,
we are at the end of the road now.
If there is confirmed preference, I would shorten license headers in the
C files, but I am not sure if SPDX-License-Identifier is recognized by
copyright law and because code and CTU CAN FD IP can be used outside
of Linux kernel by others, we would like to keep legally binding preamble.
It is reduced by not listing address to obtain complete GPL-2.0 from anyway.
And change of preamble requires to update main repository, because
header files are generated from IP core IPXACT definition by Python
based tools.
I am aware of only one other suggestion not followed yet and it
is separation of part of ctucan_tx_interrupt() function into new
one suggested by Pavel Machek. I agree that function length of 108
lines is big. When blank lines are removed we are on 68 lines and 28
lines are switch statement. The function consist of two nested loops.
External one required to ensure no lost interrupt when edge triggered
delivery or implementation is used. For me personally, it is more
readable in the actual format then to separate and propagate local
variables to another function. And particular function code received
only formatting and ctu_can_fd_ -> ctucan_hw_ rename in past year
so it is tested many/many times by manual PCI test and automated
Zynq tests. Each of the following pipelines which contains two jobs
ands by test of FPGA design and driver build and tests on real HW
https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top/pipelines
You can go through years of the testing and development back.
So I have even tendency to not shuffle code which does not
result in indisputable better readability and breaks more than year
of unmodified code successful (pass) test result line and confidence.
Because I understand that you all are loaded a lot I expect that after
ACK/review-by by Rob, there is no need to send v6 to
[email protected]
I am not sure about cross-post to
[email protected]
[email protected]
when the progress is stuck on
[email protected]
Problem is that linux-can seems to eat core driver patch, probably because it
is too long.
Thanks to all for patience and if somebody does want to be loaded by minor
updates, resends and pings to linux-can, send me note to not bother you
again.
Thanks for your time,
Pavel
PS: I would be available on Drew Fustini's LPC 2020
BoF: upstream drivers for open source FPGA SoC peripherals
today. If there is interrest I can provide some information
and show some overview and results.
On 8/25/20 2:25 AM, Pavel Pisa wrote:
> Hello Randy and Rob,
>
> thanks much for review, I have corrected FPGA spelling
> and binding YAML license.
>
> On Sunday 16 of August 2020 01:28:13 Randy Dunlap wrote:
>> On 8/15/20 12:43 PM, Pavel Pisa wrote:
>>> diff --git a/drivers/net/can/ctucanfd/Kconfig
>>> b/drivers/net/can/ctucanfd/Kconfig index e1636373628a..a8c9cc38f216
>>> 100644
>>> --- a/drivers/net/can/ctucanfd/Kconfig
>>> +++ b/drivers/net/can/ctucanfd/Kconfig
>>> @@ -21,4 +21,15 @@ config CAN_CTUCANFD_PCI
>>> PCIe board with PiKRON.com designed transceiver riser shield is
>>> available at https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd .
>>>
>>> +config CAN_CTUCANFD_PLATFORM
>>> + tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
>>> + depends on OF
>>
>> Can this be
>> depends on OF || COMPILE_TEST
>> ?
>
> I am not sure for this change. Is it ensured/documented somewhere that
> header files provide dummy definition such way, that OF drivers builds
> even if OF support is disabled? If I remember well, CTU CAN FD OF
> module build fails if attempted in the frame of native x86_64
> build where OF has been disabled. Does COMPILE_TEST ensure that
> such build succeeds.
>
COMPILE_TEST won't ensure anything.
OTOH, <linux/of.h> has lots of stubs for handling the case of
CONFIG_OF not being enabled.
--
~Randy