Description
-----------
Implement a bootcount (1) related driver that uses
NVMEM as a backend. The patchset will also update the
`snvs_lpgpr` driver to support 2 bytes NVMEM cells.
1. https://www.denx.de/wiki/view/DULG/UBootBootCountLimit
Testing
-------
Hardware: i.MX6sx evaluation board
Kernel: linux-imx-5.4.24
1. Configure the bootcount hardware in DT to use a NVMEM cell provided
by `snvs_lpgpr` driver as backend.
e.g. This will configure a 4 bytes long NVMEM cell
```
bootcount_regs: bootcount-snvs-regs@0 {
reg = <0x0 0x04>;
};
```
2. Record the current NVMEM cell content:
```
~ # hexdump -C
/sys/devices/soc0/soc/2000000.aips-bus/20cc000.snvs/20cc000.snvs:snvs-lpgpr/20cc000.snvs:snvs-lpgpr0/nvmem
00000000 00 00 01 b0 |....|
00000004
```
3. Write the bootcount and check that is successful: PASS
```
~ # echo 1 > /sys/bus/platform/drivers/bootcount-nvmem/bootcount/value
bootcount: Write regval: 0xb0010001
~ # hexdump -C
/sys/devices/soc0/soc/2000000.aips-bus/20cc000.snvs/20cc000.snvs:snvs-lpgpr/20cc000.snvs:snvs-lpgpr0/nvmem
00000000 01 00 01 b0 |....|
00000004
```
Note: similar tests were done also for 2 bytes NVMEM cell size.
Kernel: linux-next, tag: next-20210322
1. Enable bootcount and snvs_lpgpr drivers
2. Verify that they compile succesfully: PASS
```
kernel-master> make -j2 drivers/nvmem/
DESCEND objtool
CALL scripts/atomic/check-atomics.sh
CC arch/x86/kernel/asm-offsets.s
CALL scripts/checksyscalls.sh
CC drivers/nvmem/core.o
CC drivers/nvmem/bootcount-nvmem.o
CC drivers/nvmem/snvs_lpgpr.o
AR drivers/nvmem/built-in.
```
Testing the bootcount YAML document:
1. Check the document by running the command:
`make DT_CHECKER_FLAGS=-m dt_binding_check`
2. Verify that is successful: PASS
3. Verify that no warnings are generated by bootcount related yaml file: PASS
```
...
CHECK Documentation/devicetree/bindings/nvmem/brcm,nvram.example.dt.yaml DTC Documentation/devicetree/bindings/nvmem/bootcount-nvmem.example.dt.yaml
CHECK Documentation/devicetree/bindings/nvmem/bootcount-nvmem.example.dt.yaml
DTC Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.example.dt.yaml
...
```
Changes since v1
----------------
- Fix the dt-bindings YAML document.
Changes since v2
----------------
- Fix the dt-bindings YAML document warnings.
Changes since v3
----------------
- Remove the dependencies from the bindings documentation
- Fix the `bootcount-magic` description from bindings documentation
Nandor Han (4):
dt-bindings: nvmem: Add bootcount-nvmem
nvmem: bootcount: add bootcount driver
nvmem: snvs_lpgpr: use cell stride for regmap size calculation
nvmem: snvs_lpgpr: support two bytes NVMEM cell size
.../bindings/nvmem/bootcount-nvmem.yaml | 71 +++++++
drivers/nvmem/Kconfig | 10 +
drivers/nvmem/Makefile | 1 +
drivers/nvmem/bootcount-nvmem.c | 195 ++++++++++++++++++
drivers/nvmem/snvs_lpgpr.c | 67 +++++-
5 files changed, 338 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/nvmem/bootcount-nvmem.yaml
create mode 100644 drivers/nvmem/bootcount-nvmem.c
--
2.26.3
Documents the device tree bindings for `bootcount-nvmem` driver.
Signed-off-by: Nandor Han <[email protected]>
---
.../bindings/nvmem/bootcount-nvmem.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/bootcount-nvmem.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/bootcount-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/bootcount-nvmem.yaml
new file mode 100644
index 000000000000..1200ef906843
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/bootcount-nvmem.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+# Copyright (c) Vaisala Oyj. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/bootcount-nvmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bootcount NVMEM bindings
+
+maintainers:
+ - Nandor Han <[email protected]>
+
+description: |
+ This binding is intendent to describe the hardware location for
+ storing the bootcount value and magic combo.
+
+ The NVMEM cell size should be 2 or 4 bytes.
+
+allOf:
+ - $ref: "nvmem-consumer.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - linux,bootcount-nvmem
+
+ nvmem-cells:
+ description: Phandle to reboot mode nvmem data cell.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ nvmem-cell-names:
+ description: Name of the NVMEM cell.
+ $ref: /schemas/types.yaml#/definitions/string-array
+ enum:
+ - bootcount-regs
+
+ linux,bootcount-magic:
+ description: Override the default magic value.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - nvmem-cells
+ - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+ # example with 16 bit nvram cell:
+ - |
+ bootcount {
+ compatible = "linux,bootcount-nvmem";
+ nvmem-cells = <&bootcount_regs>;
+ nvmem-cell-names = "bootcount-regs";
+ };
+
+ rtc: rtc@68 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ reg = <0x68 0x10>;
+
+ bootcount_regs: bootcount_nvmem_regs@e {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ reg = <0x0e 0x2>;
+ };
+ };
+
+...
--
2.26.3
In some situation is desired to use less than 4 bytes for storing data.
This will allow using the same register for multiple purposes.
Add support for allowing 2 bytes granularity for NVMEM cells.
Signed-off-by: Nandor Han <[email protected]>
---
drivers/nvmem/snvs_lpgpr.c | 67 ++++++++++++++++++++++++++++++++++----
1 file changed, 61 insertions(+), 6 deletions(-)
diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c
index 35457421314a..44614f3d68f0 100644
--- a/drivers/nvmem/snvs_lpgpr.c
+++ b/drivers/nvmem/snvs_lpgpr.c
@@ -21,6 +21,9 @@
#define IMX_GPR_SL BIT(5)
#define IMX_GPR_HL BIT(5)
+#define REGMAP_FIELD_SIZE 16
+#define REGMAP_FIELDS_PER_REG 2
+
struct snvs_lpgpr_cfg {
int offset;
int offset_hplr;
@@ -33,6 +36,7 @@ struct snvs_lpgpr_priv {
struct regmap *regmap;
struct nvmem_config cfg;
const struct snvs_lpgpr_cfg *dcfg;
+ struct regmap_field **reg_fields;
};
static const struct snvs_lpgpr_cfg snvs_lpgpr_cfg_imx6q = {
@@ -56,6 +60,11 @@ static int snvs_lpgpr_write(void *context, unsigned int offset, void *val,
const struct snvs_lpgpr_cfg *dcfg = priv->dcfg;
unsigned int lock_reg;
int ret;
+ u32 regval;
+ unsigned int field_id;
+
+ if (offset + bytes > dcfg->size)
+ return -EINVAL;
ret = regmap_read(priv->regmap, dcfg->offset_hplr, &lock_reg);
if (ret < 0)
@@ -71,8 +80,16 @@ static int snvs_lpgpr_write(void *context, unsigned int offset, void *val,
if (lock_reg & IMX_GPR_HL)
return -EPERM;
- return regmap_bulk_write(priv->regmap, dcfg->offset + offset, val,
- bytes / priv->cfg.stride);
+ if (bytes == (REGMAP_FIELD_SIZE >> 3)) {
+ regval = *(u16 *)(val);
+ field_id = offset / REGMAP_FIELDS_PER_REG;
+ ret = regmap_field_write(priv->reg_fields[field_id], regval);
+ } else {
+ ret = regmap_bulk_write(priv->regmap, dcfg->offset + offset,
+ val, bytes / priv->cfg.stride);
+ }
+
+ return ret;
}
static int snvs_lpgpr_read(void *context, unsigned int offset, void *val,
@@ -80,9 +97,27 @@ static int snvs_lpgpr_read(void *context, unsigned int offset, void *val,
{
struct snvs_lpgpr_priv *priv = context;
const struct snvs_lpgpr_cfg *dcfg = priv->dcfg;
+ int ret;
+ u32 regval;
+ unsigned int field_id;
- return regmap_bulk_read(priv->regmap, dcfg->offset + offset, val,
- bytes / priv->cfg.stride);
+ if (offset + bytes > dcfg->size)
+ return -EINVAL;
+
+ if (bytes == (REGMAP_FIELD_SIZE >> 3)) {
+ field_id = offset / REGMAP_FIELDS_PER_REG;
+ ret = regmap_field_read(priv->reg_fields[field_id], ®val);
+ if (ret)
+ return ret;
+
+ *(u16 *)(val) = regval;
+ } else {
+ ret = regmap_bulk_read(priv->regmap, dcfg->offset + offset, val,
+ bytes / priv->cfg.stride);
+ if (ret)
+ return ret;
+ }
+ return 0;
}
static int snvs_lpgpr_probe(struct platform_device *pdev)
@@ -94,6 +129,8 @@ static int snvs_lpgpr_probe(struct platform_device *pdev)
struct nvmem_config *cfg;
struct nvmem_device *nvmem;
const struct snvs_lpgpr_cfg *dcfg;
+ int i;
+ int fields_count;
if (!node)
return -ENOENT;
@@ -121,13 +158,31 @@ static int snvs_lpgpr_probe(struct platform_device *pdev)
cfg->priv = priv;
cfg->name = dev_name(dev);
cfg->dev = dev;
- cfg->stride = 4;
- cfg->word_size = 4;
+ cfg->stride = 2;
+ cfg->word_size = 2;
cfg->size = dcfg->size;
cfg->owner = THIS_MODULE;
cfg->reg_read = snvs_lpgpr_read;
cfg->reg_write = snvs_lpgpr_write;
+ fields_count = priv->dcfg->size / priv->cfg.stride;
+ priv->reg_fields = devm_kzalloc(
+ dev, sizeof(struct regmap_field *) * fields_count, GFP_KERNEL);
+ if (!priv->reg_fields)
+ return -ENOMEM;
+
+ for (i = 0; i < fields_count; i++) {
+ size_t field_start = i * REGMAP_FIELD_SIZE;
+ size_t field_end = field_start + REGMAP_FIELD_SIZE - 1;
+ const struct reg_field field =
+ REG_FIELD(dcfg->offset, field_start, field_end);
+
+ priv->reg_fields[i] =
+ devm_regmap_field_alloc(dev, priv->regmap, field);
+ if (IS_ERR(priv->reg_fields[i]))
+ return PTR_ERR(priv->reg_fields[i]);
+ }
+
nvmem = devm_nvmem_register(dev, cfg);
return PTR_ERR_OR_ZERO(nvmem);
--
2.26.3
On 5/5/21 1:42 PM, Nandor Han wrote:
> Description
> -----------
> Implement a bootcount (1) related driver that uses
> NVMEM as a backend. The patchset will also update the
> `snvs_lpgpr` driver to support 2 bytes NVMEM cells.
>
Any feedback about this patchset?
--
Regards,
Nandor