From: Vamsi Krishna Lanka <[email protected]>
Hello,
Changes from v5:
- Collected Vinod Koul's and Rob's Reviewed-by for the patches
- Rebased on the latest tip of Torvald's tree (MAINTAINERS: co-maintain random.c)
Changes from v4:
- Fixed comments from vinod koul on Clock Alpha PLL and GCC driver support patches
- Addressed Rob's comments related to GCC dt-binding patch
- Collected Vinod Koul's Reviewed-by for the dt-bindings patches
Changes from v3:
- Fixed DTbindings and unused variables errors reported by kernel test bot
- Rebased on top of v5.16-rc1
Changes from v2:
- Addressed Taniya Das and Vinod Koul's comments related to adding LUCID_EVO
PLL type and rpmh support patches
- Collected Rob's Acked-by for the dt-bindings patches
Changes from v1:
- Addressed Bjorn's comments related to the GCC support patch
- Collected Bjorn's and Rob's Reviewed-by for the dt-bindings patches
This patch series adds bindings and device driver changes for GCC, pdc and RPMh
clock support for SDX65 Platform.
Thanks,
Vamsi
Vamsi Krishna Lanka (2):
clk: qcom: Add LUCID_EVO PLL type for SDX65
clk: qcom: Add SDX65 GCC support
Vamsi krishna Lanka (3):
dt-bindings: clock: Add SDX65 GCC clock bindings
dt-bindings: clock: Introduce RPMHCC bindings for SDX65
clk: qcom: Add support for SDX65 RPMh clocks
.../bindings/clock/qcom,gcc-sdx65.yaml | 80 +
.../bindings/clock/qcom,rpmhcc.yaml | 1 +
drivers/clk/qcom/Kconfig | 8 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-alpha-pll.c | 204 ++-
drivers/clk/qcom/clk-alpha-pll.h | 3 +
drivers/clk/qcom/clk-rpmh.c | 25 +
drivers/clk/qcom/gcc-sdx65.c | 1603 +++++++++++++++++
include/dt-bindings/clock/qcom,gcc-sdx65.h | 122 ++
9 files changed, 2021 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
create mode 100644 drivers/clk/qcom/gcc-sdx65.c
create mode 100644 include/dt-bindings/clock/qcom,gcc-sdx65.h
base-commit: 58e1100fdc5990b0cc0d4beaf2562a92e621ac7d
--
2.33.1
From: Vamsi krishna Lanka <[email protected]>
Add support for clocks maintained by RPMh in SDX65 SoCs.
Signed-off-by: Vamsi Krishna Lanka <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Reviewed-by: Vinod Koul <[email protected]>
---
drivers/clk/qcom/clk-rpmh.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 441d7a20e6f3..30b26fb96514 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -556,6 +556,30 @@ static const struct clk_rpmh_desc clk_rpmh_sm6350 = {
.num_clks = ARRAY_SIZE(sm6350_rpmh_clocks),
};
+DEFINE_CLK_RPMH_VRM(sdx65, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4);
+
+static struct clk_hw *sdx65_rpmh_clocks[] = {
+ [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw,
+ [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw,
+ [RPMH_LN_BB_CLK1] = &sdx65_ln_bb_clk1.hw,
+ [RPMH_LN_BB_CLK1_A] = &sdx65_ln_bb_clk1_ao.hw,
+ [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw,
+ [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw,
+ [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw,
+ [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw,
+ [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw,
+ [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw,
+ [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw,
+ [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw,
+ [RPMH_IPA_CLK] = &sdm845_ipa.hw,
+ [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
+ .clks = sdx65_rpmh_clocks,
+ .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks),
+};
+
static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
void *data)
{
@@ -643,6 +667,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
{ .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
+ { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65},
{ .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
{ .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
--
2.33.1
From: Vamsi krishna Lanka <[email protected]>
Add compatible for SDX65 RPMHCC.
Signed-off-by: Vamsi Krishna Lanka <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Vinod Koul <[email protected]>
---
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index 72212970e6f5..0e7e05e38bb2 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
@@ -22,6 +22,7 @@ properties:
- qcom,sc8180x-rpmh-clk
- qcom,sdm845-rpmh-clk
- qcom,sdx55-rpmh-clk
+ - qcom,sdx65-rpmh-clk
- qcom,sm6350-rpmh-clk
- qcom,sm8150-rpmh-clk
- qcom,sm8250-rpmh-clk
--
2.33.1
On Wed 01 Dec 18:21 CST 2021, [email protected] wrote:
> From: Vamsi krishna Lanka <[email protected]>
>
> Add support for clocks maintained by RPMh in SDX65 SoCs.
>
> Signed-off-by: Vamsi Krishna Lanka <[email protected]>
> Acked-by: Bjorn Andersson <[email protected]>
> Reviewed-by: Vinod Koul <[email protected]>
The two RPMh patches are independent of the PLL/GCC patches, so I have
picked up the RPMh patches from this series.
Please respin the PLL & GCC patches per Stephen's feedback.
PS. checkpatch --strict complains that the author signature doesn't
match the Signed-off-by, because you have a lowercase 'k' in the From,
but uppercase in the s-o-b. Can you please make sure the two matches in
the future?
Thanks,
Bjorn
> ---
> drivers/clk/qcom/clk-rpmh.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> index 441d7a20e6f3..30b26fb96514 100644
> --- a/drivers/clk/qcom/clk-rpmh.c
> +++ b/drivers/clk/qcom/clk-rpmh.c
> @@ -556,6 +556,30 @@ static const struct clk_rpmh_desc clk_rpmh_sm6350 = {
> .num_clks = ARRAY_SIZE(sm6350_rpmh_clocks),
> };
>
> +DEFINE_CLK_RPMH_VRM(sdx65, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4);
> +
> +static struct clk_hw *sdx65_rpmh_clocks[] = {
> + [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw,
> + [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw,
> + [RPMH_LN_BB_CLK1] = &sdx65_ln_bb_clk1.hw,
> + [RPMH_LN_BB_CLK1_A] = &sdx65_ln_bb_clk1_ao.hw,
> + [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw,
> + [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw,
> + [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw,
> + [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw,
> + [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw,
> + [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw,
> + [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw,
> + [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw,
> + [RPMH_IPA_CLK] = &sdm845_ipa.hw,
> + [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw,
> +};
> +
> +static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
> + .clks = sdx65_rpmh_clocks,
> + .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks),
> +};
> +
> static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
> void *data)
> {
> @@ -643,6 +667,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
> { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
> { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
> { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
> + { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65},
> { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
> { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
> { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
> --
> 2.33.1
>
On Wed, 1 Dec 2021 16:21:34 -0800, [email protected] wrote:
> From: Vamsi krishna Lanka <[email protected]>
>
> Add compatible for SDX65 RPMHCC.
>
>
Applied, thanks!
[4/5] dt-bindings: clock: Introduce RPMHCC bindings for SDX65
commit: aa848c8ee8915b2a8c973d90f1c7f8e96d17fd25
Best regards,
--
Bjorn Andersson <[email protected]>
On Wed, 1 Dec 2021 16:21:30 -0800, [email protected] wrote:
> From: Vamsi Krishna Lanka <[email protected]>
>
> Hello,
> Changes from v5:
> - Collected Vinod Koul's and Rob's Reviewed-by for the patches
> - Rebased on the latest tip of Torvald's tree (MAINTAINERS: co-maintain random.c)
>
> [...]
Applied, thanks!
[4/5] dt-bindings: clock: Introduce RPMHCC bindings for SDX65
commit: aa848c8ee8915b2a8c973d90f1c7f8e96d17fd25
[5/5] clk: qcom: Add support for SDX65 RPMh clocks
commit: 40affbf8e615addd8cc877f0a4fff1faafc4bb34
Best regards,
--
Bjorn Andersson <[email protected]>
On Wed, 1 Dec 2021 16:21:35 -0800, [email protected] wrote:
> From: Vamsi krishna Lanka <[email protected]>
>
> Add support for clocks maintained by RPMh in SDX65 SoCs.
>
>
Applied, thanks!
[5/5] clk: qcom: Add support for SDX65 RPMh clocks
commit: 40affbf8e615addd8cc877f0a4fff1faafc4bb34
Best regards,
--
Bjorn Andersson <[email protected]>