2023-06-25 15:21:59

by Adrián Larumbe

[permalink] [raw]
Subject: [PATCH v3 0/3] Add additional YUV420 bus format check for dw-meson's bridge enable

This is a belated follow-up on
https://lore.kernel.org/dri-devel/[email protected]

Commit e67f6037ae1be34b2b68 ("drm/meson: split out encoder from meson_dw_hdmi")
broke 4K display modes for me, and I discovered it was because the right
pixel clock wasn't being chosen in dw_hdmi_phy_init. I misinterpreted the
reason as a problem in figuring out whether we want to enforce YUV420 mode,
but it turned out to be a mismatch between what dw-meson code is doing and
the way the bus format is being picked by the dw-hdmi bus output format drm
helper.

I fixed it by bringing back dw-hdmi bus format check in dw-meson.

The second patch makes sure YUV420 bus format is the only one being
returned by dw-hdmi's output format bridge function when that's the only
drm mode allowed.

Changelog:

v3:
- Change commit message for all three commits to accurately
reflect the modified files' subsystem.
- Add v1's Acked-by tags from subsystem maintainer
v2:
- Add commit message to patch number 3 in the series

Adrián Larumbe (3):
drm/bridge: dw-hdmi: change YUV420 selection logic at clock setup
drm/bridge: dw-hdmi: truly enforce 420-only formats when drm mode
demands it
drm/bridge: dw-hdmi: remove dead code and fix indentation

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 35 +++++++++--------------
drivers/gpu/drm/meson/meson_dw_hdmi.c | 4 +--
include/drm/bridge/dw_hdmi.h | 2 ++
3 files changed, 18 insertions(+), 23 deletions(-)

--
2.40.0



2023-06-27 08:35:59

by Neil Armstrong

[permalink] [raw]
Subject: Re: [PATCH v3 0/3] Add additional YUV420 bus format check for dw-meson's bridge enable

Hi,

On Sun, 25 Jun 2023 15:17:14 +0100, Adrián Larumbe wrote:
> This is a belated follow-up on
> https://lore.kernel.org/dri-devel/[email protected]
>
> Commit e67f6037ae1be34b2b68 ("drm/meson: split out encoder from meson_dw_hdmi")
> broke 4K display modes for me, and I discovered it was because the right
> pixel clock wasn't being chosen in dw_hdmi_phy_init. I misinterpreted the
> reason as a problem in figuring out whether we want to enforce YUV420 mode,
> but it turned out to be a mismatch between what dw-meson code is doing and
> the way the bus format is being picked by the dw-hdmi bus output format drm
> helper.
>
> [...]

Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next)

[1/3] drm/bridge: dw-hdmi: change YUV420 selection logic at clock setup
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=7ed40ff1d134bf3a4aef706eed478b926f35b404
[2/3] drm/bridge: dw-hdmi: truly enforce 420-only formats when drm mode demands it
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=f3710b424a96078f416e1be9cf52b87eadabae78
[3/3] drm/bridge: dw-hdmi: remove dead code and fix indentation
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=2299a8d12c1cbcdc7086027615d9936a970e7d68

--
Neil