This series adds initial support for the Conexant CX92755 SoC. The CX92755 is
one of the Digicolor series of SoCs, all sharing many of the same peripherals.
The code was tested on the CX92755 evaluation kit, AKA Equinox.
Uses attempting to try this code will most likely also want the UART/console
driver available from https://patchwork.kernel.org/patch/5515861/.
Baruch Siach (8):
ARM: initial support for Conexant Digicolor CX92755 SoC
ARM: digicolor: add low level debug support
ARM: digicolor: add minimal device tree description
ARM: devicetree: document supported Conexant Digicolor SoC
irqchip: Conexant CX92755 interrupts controller driver
irqchip: devicetree: document Conexant Digicolor irq binding
clocksource: driver for Conexant Digicolor SoC timer
clocksource: devicetree: document Conexant Digicolor timer binding
.../devicetree/bindings/arm/digicolor.txt | 6 +
.../bindings/interrupt-controller/digicolor-ic.txt | 20 +++
.../devicetree/bindings/timer/digicolor-timer.txt | 18 +++
arch/arm/Kconfig | 2 +
arch/arm/Kconfig.debug | 12 +-
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/conexant_equinox.dts | 67 +++++++++
arch/arm/boot/dts/cx92755.dtsi | 103 ++++++++++++++
arch/arm/include/debug/digicolor.S | 35 +++++
arch/arm/mach-digicolor/Kconfig | 4 +
arch/arm/mach-digicolor/Makefile | 1 +
arch/arm/mach-digicolor/digicolor.c | 19 +++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-digicolor.c | 155 +++++++++++++++++++++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-digicolor.c | 135 ++++++++++++++++++
16 files changed, 578 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/digicolor.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt
create mode 100644 Documentation/devicetree/bindings/timer/digicolor-timer.txt
create mode 100644 arch/arm/boot/dts/conexant_equinox.dts
create mode 100644 arch/arm/boot/dts/cx92755.dtsi
create mode 100644 arch/arm/include/debug/digicolor.S
create mode 100644 arch/arm/mach-digicolor/Kconfig
create mode 100644 arch/arm/mach-digicolor/Makefile
create mode 100644 arch/arm/mach-digicolor/digicolor.c
create mode 100644 drivers/clocksource/timer-digicolor.c
create mode 100644 drivers/irqchip/irq-digicolor.c
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-digicolor.c | 135 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 136 insertions(+)
create mode 100644 drivers/irqchip/irq-digicolor.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 9516a324be6d..42965d2476bb 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -42,3 +42,4 @@ obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o
obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o
obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o
obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o
+obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o
diff --git a/drivers/irqchip/irq-digicolor.c b/drivers/irqchip/irq-digicolor.c
new file mode 100644
index 000000000000..9970090821a9
--- /dev/null
+++ b/drivers/irqchip/irq-digicolor.c
@@ -0,0 +1,135 @@
+/*
+ * Conexant Digicolor SoCs IRQ chip driver
+ *
+ * Author: Baruch Siach <[email protected]>
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#include <asm/exception.h>
+
+#include "irqchip.h"
+
+#define UC_IRQ_CONTROL 0x03a4
+
+#define IC_FLAG_CLEAR_LO 0x40
+#define IC_INT0ENABLE_LO 0x50
+#define IC_INT0ENABLE_XLO 0x54
+#define IC_INT0STATUS_LO 0x58
+#define IC_INT0STATUS_XLO 0x5c
+
+static void __iomem *digicolor_irq_base;
+static struct irq_domain *digicolor_irq_domain;
+
+static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs)
+{
+ u32 status, hwirq;
+
+ do {
+ status = readl(digicolor_irq_base + IC_INT0STATUS_LO);
+ if (status) {
+ hwirq = ffs(status) - 1;
+ } else {
+ status = readl(digicolor_irq_base + IC_INT0STATUS_XLO);
+ if (status)
+ hwirq = ffs(status) - 1 + 32;
+ else
+ return;
+ }
+
+ handle_domain_irq(digicolor_irq_domain, hwirq, regs);
+ } while (1);
+}
+
+static void digicolor_irq_ack(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 8;
+ int reg = irq / 8;
+
+ writeb(BIT(irq_off), digicolor_irq_base + IC_FLAG_CLEAR_LO + reg);
+}
+
+static void digicolor_irq_mask(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 8;
+ int reg = irq / 8;
+ u8 val;
+
+ val = readb(digicolor_irq_base + IC_INT0ENABLE_LO + reg);
+ writeb(val & ~BIT(irq_off),
+ digicolor_irq_base + IC_INT0ENABLE_LO + reg);
+}
+
+static void digicolor_irq_unmask(struct irq_data *irqd)
+{
+ unsigned int irq = irqd_to_hwirq(irqd);
+ unsigned int irq_off = irq % 8;
+ int reg = irq / 8;
+ u8 val;
+
+ val = readb(digicolor_irq_base + IC_INT0ENABLE_LO + reg);
+ writeb(val | BIT(irq_off),
+ digicolor_irq_base + IC_INT0ENABLE_LO + reg);
+}
+
+static struct irq_chip digicolor_irq_chip = {
+ .name = "digicolor_irq",
+ .irq_ack = digicolor_irq_ack,
+ .irq_mask = digicolor_irq_mask,
+ .irq_unmask = digicolor_irq_unmask,
+};
+
+static int digicolor_irq_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(virq, &digicolor_irq_chip, handle_level_irq);
+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops digicolor_irq_ops = {
+ .map = digicolor_irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init digicolor_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ digicolor_irq_base = of_iomap(node, 0);
+ if (!digicolor_irq_base) {
+ pr_err("%s: unable to map IC registers\n", node->full_name);
+ return -ENXIO;
+ }
+
+ /* disable all interrupts */
+ writel(0, digicolor_irq_base + IC_INT0ENABLE_LO);
+ writel(0, digicolor_irq_base + IC_INT0ENABLE_XLO);
+
+ /* channel 1, regular IRQs */
+ writeb(1, digicolor_irq_base + UC_IRQ_CONTROL);
+
+ digicolor_irq_domain = irq_domain_add_linear(node, 64,
+ &digicolor_irq_ops, NULL);
+ if (!digicolor_irq_domain) {
+ pr_err("%s: unable to create IRQ domain\n", node->full_name);
+ return -ENOMEM;
+ }
+
+ set_handle_irq(digicolor_handle_irq);
+
+ return 0;
+}
+IRQCHIP_DECLARE(conexant_digicolor_ic, "cnxt,cx92755-ic", digicolor_of_init);
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
.../devicetree/bindings/timer/digicolor-timer.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/digicolor-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/digicolor-timer.txt b/Documentation/devicetree/bindings/timer/digicolor-timer.txt
new file mode 100644
index 000000000000..623812da03b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/digicolor-timer.txt
@@ -0,0 +1,18 @@
+Conexant Digicolor SoCs Timer Controller
+
+Required properties:
+
+- compatible : should be "cnxt,cx92755-timer"
+- reg : Specifies base physical address and size of the MISC area, that is
+ where the "Agent Communication" registers are located
+- interrupts : Contains 8 interrupts, one for each timer
+- clocks: phandle to the main clock
+
+Example:
+
+ timer@f0000000 {
+ compatible = "cnxt,cx92755-timer";
+ reg = <0xf0000000 0x1000>;
+ interrupts = <19>, <31>, <34>, <35>, <52>, <53>, <54>, <55>;
+ clocks = <&main_clk>;
+ };
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
Documentation/devicetree/bindings/arm/digicolor.txt | 6 ++++++
1 file changed, 6 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/digicolor.txt
diff --git a/Documentation/devicetree/bindings/arm/digicolor.txt b/Documentation/devicetree/bindings/arm/digicolor.txt
new file mode 100644
index 000000000000..658553f40b23
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/digicolor.txt
@@ -0,0 +1,6 @@
+Conexant Digicolor Platforms Device Tree Bindings
+
+Each device tree must specify which Conexant Digicolor SoC it uses.
+Must be the following compatible string:
+
+ cnxt,cx92755
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
arch/arm/mach-digicolor/Kconfig | 1 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-digicolor.c | 155 ++++++++++++++++++++++++++++++++++
3 files changed, 157 insertions(+)
create mode 100644 drivers/clocksource/timer-digicolor.c
diff --git a/arch/arm/mach-digicolor/Kconfig b/arch/arm/mach-digicolor/Kconfig
index 4830122a9dd0..1e53f684a522 100644
--- a/arch/arm/mach-digicolor/Kconfig
+++ b/arch/arm/mach-digicolor/Kconfig
@@ -1,3 +1,4 @@
config ARCH_DIGICOLOR
bool "Conexant Digicolor SoC Support"
depends on ARCH_MULTI_V7
+ select CLKSRC_MMIO
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 94d90b24b56b..a993c108be67 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
obj-$(CONFIG_EM_TIMER_STI) += em_sti.o
obj-$(CONFIG_CLKBLD_I8253) += i8253.o
obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
+obj-$(CONFIG_ARCH_DIGICOLOR) += timer-digicolor.o
obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
diff --git a/drivers/clocksource/timer-digicolor.c b/drivers/clocksource/timer-digicolor.c
new file mode 100644
index 000000000000..16dc17894276
--- /dev/null
+++ b/drivers/clocksource/timer-digicolor.c
@@ -0,0 +1,155 @@
+/*
+ * Conexant Digicolor timer driver
+ *
+ * Author: Baruch Siach <[email protected]>
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * Based on:
+ * Allwinner SoCs hstimer driver
+ *
+ * Copyright (C) 2013 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/*
+ * Conexant Digicolor SoCs have 8 configurable timers, named from "Timer A" to
+ * "Timer H". Timer A is the only one with watchdog support, so it is dedicated
+ * to the watchdog driver. This driver uses Timer B for sched_clock(), and
+ * Timer C for clockevents.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/sched_clock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define AC_TIMER_B_CONTROL 0x0fc8
+#define AC_TIMER_B_COUNT_LO 0x0fcc
+#define AC_TIMER_C_CONTROL 0x0fd0
+#define AC_TIMER_C_COUNT_LO 0x0fd4
+
+static void __iomem *timer_base;
+static u32 ticks_per_jiffy;
+
+static void digicolor_clkevt_mode(enum clock_event_mode mode,
+ struct clock_event_device *clk)
+{
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ writeb(0, timer_base + AC_TIMER_C_CONTROL);
+ writel(ticks_per_jiffy, timer_base + AC_TIMER_C_COUNT_LO);
+ writeb(0x21, timer_base + AC_TIMER_C_CONTROL);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ writeb(0, timer_base + AC_TIMER_C_CONTROL);
+ writeb(0x11, timer_base + AC_TIMER_C_CONTROL);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ default:
+ writeb(0, timer_base + AC_TIMER_C_CONTROL);
+ break;
+ }
+}
+
+static int digicolor_clkevt_next_event(unsigned long evt,
+ struct clock_event_device *unused)
+{
+ writeb(0, timer_base + AC_TIMER_C_CONTROL);
+ writel(evt, timer_base + AC_TIMER_C_COUNT_LO);
+ writeb(0x11, timer_base + AC_TIMER_C_CONTROL);
+
+ return 0;
+}
+
+static struct clock_event_device digicolor_clockevent = {
+ .name = "digicolor_tick",
+ .rating = 340,
+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+ .set_mode = digicolor_clkevt_mode,
+ .set_next_event = digicolor_clkevt_next_event,
+};
+
+
+static irqreturn_t digicolor_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction digicolor_timer_irq = {
+ .name = "digicolor_timerC",
+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
+ .handler = digicolor_timer_interrupt,
+ .dev_id = &digicolor_clockevent,
+};
+
+static u64 digicolor_timer_sched_read(void)
+{
+ return ~readl(timer_base + AC_TIMER_B_COUNT_LO);
+}
+
+static void __init digicolor_timer_init(struct device_node *node)
+{
+ unsigned long rate;
+ struct clk *clk;
+ int ret, irq;
+
+ timer_base = of_iomap(node, 0);
+ if (!timer_base) {
+ pr_err("Can't map registers");
+ return;
+ }
+
+ irq = irq_of_parse_and_map(node, 2); /* Timer C */
+ if (irq <= 0) {
+ pr_err("Can't parse IRQ");
+ return;
+ }
+
+ clk = of_clk_get(node, 0);
+ if (IS_ERR(clk)) {
+ pr_err("Can't get timer clock");
+ return;
+ }
+ clk_prepare_enable(clk);
+ rate = clk_get_rate(clk);
+
+ writeb(0, timer_base + AC_TIMER_B_CONTROL);
+ writel(~0, timer_base + AC_TIMER_B_COUNT_LO);
+ writeb(1, timer_base + AC_TIMER_B_CONTROL);
+
+ sched_clock_register(digicolor_timer_sched_read, 32, rate);
+ clocksource_mmio_init(timer_base + AC_TIMER_B_COUNT_LO, node->name,
+ rate, 340, 32, clocksource_mmio_readl_down);
+
+ ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
+
+ ret = setup_irq(irq, &digicolor_timer_irq);
+ if (ret)
+ pr_warn("failed to setup timer irq %d (%d)\n", irq, ret);
+
+ digicolor_clockevent.cpumask = cpu_possible_mask;
+ digicolor_clockevent.irq = irq;
+
+ clockevents_config_and_register(&digicolor_clockevent, rate, 0,
+ 0xffffffff);
+}
+CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer",
+ digicolor_timer_init);
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
.../bindings/interrupt-controller/digicolor-ic.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt
new file mode 100644
index 000000000000..fdf9a4c59bf3
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt
@@ -0,0 +1,20 @@
+Conexant Digicolor Interrupt Controller
+
+Required properties:
+
+- compatible : should be "cnxt,cx92755-ic"
+- reg : Specifies base physical address and size of the MISC area, that is
+ where the interrupt controller registers are located
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 1.
+
+Example:
+
+ intc: intc@f0000000 {
+ compatible = "cnxt,cx92755-ic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xf0000000 0x1000>;
+ };
+
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
arch/arm/Kconfig.debug | 12 ++++++++++--
arch/arm/include/debug/digicolor.S | 35 +++++++++++++++++++++++++++++++++++
arch/arm/mach-digicolor/digicolor.c | 1 +
3 files changed, 46 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/debug/digicolor.S
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5ddd4906f7a7..7ccab0629dd2 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -241,6 +241,13 @@ choice
Say Y here if you want the debug print routines to direct
their output to the serial port in the DC21285 (Footbridge).
+ config DEBUG_DIGICOLOR_UA0
+ bool "Kernel low-level debugging messages via Digicolor UA0"
+ depends on ARCH_DIGICOLOR
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the UA0 serial port in the CX92755.
+
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
@@ -1204,6 +1211,7 @@ config DEBUG_LL_INCLUDE
default "debug/vt8500.S" if DEBUG_VT8500_UART0
default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
default "debug/bcm63xx.S" if DEBUG_UART_BCM63XX
+ default "debug/digicolor.S" if DEBUG_DIGICOLOR_UA0
default "mach/debug-macro.S"
# Compatibility options for PL01x
@@ -1320,7 +1328,7 @@ config DEBUG_UART_PHYS
DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
- DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || DEBUG_DIGICOLOR_UA0
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
@@ -1398,7 +1406,7 @@ config DEBUG_UART_VIRT
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
- DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
+ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || DEBUG_DIGICOLOR_UA0
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S
new file mode 100644
index 000000000000..c9517150766a
--- /dev/null
+++ b/arch/arm/include/debug/digicolor.S
@@ -0,0 +1,35 @@
+/*
+ * Debugging macro include header for Conexant Digicolor USART
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#define UA0_STATUS 0x0742
+#define UA0_EMI_REC 0x0744
+
+#define UA0_STATUS_TX_READY 0x40
+
+#ifdef CONFIG_DEBUG_UART_PHYS
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =CONFIG_DEBUG_UART_PHYS
+ ldr \rv, =CONFIG_DEBUG_UART_VIRT
+ .endm
+#endif
+
+ .macro senduart,rd,rx
+ strb \rd, [\rx, #UA0_EMI_REC]
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+ .macro busyuart,rd,rx
+1001: ldrb \rd, [\rx, #UA0_STATUS]
+ tst \rd, #UA0_STATUS_TX_READY
+ beq 1001b
+ .endm
diff --git a/arch/arm/mach-digicolor/digicolor.c b/arch/arm/mach-digicolor/digicolor.c
index cfc88d1caa47..7d1eda19d84c 100644
--- a/arch/arm/mach-digicolor/digicolor.c
+++ b/arch/arm/mach-digicolor/digicolor.c
@@ -14,5 +14,6 @@ static const char *digicolor_dt_compat[] __initconst = {
};
DT_MACHINE_START(DIGICOLOR, "Conexant Digicolor (Flattened Device Tree)")
+ .map_io = debug_ll_io_init,
.dt_compat = digicolor_dt_compat,
MACHINE_END
--
2.1.3
Signed-off-by: Baruch Siach <[email protected]>
---
arch/arm/Kconfig | 2 ++
arch/arm/mach-digicolor/Kconfig | 3 +++
arch/arm/mach-digicolor/Makefile | 1 +
arch/arm/mach-digicolor/digicolor.c | 18 ++++++++++++++++++
4 files changed, 24 insertions(+)
create mode 100644 arch/arm/mach-digicolor/Kconfig
create mode 100644 arch/arm/mach-digicolor/Makefile
create mode 100644 arch/arm/mach-digicolor/digicolor.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97d07ed60a0b..86e2202565e6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -858,6 +858,8 @@ source "arch/arm/mach-cns3xxx/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
+source "arch/arm/mach-digicolor/Kconfig"
+
source "arch/arm/mach-dove/Kconfig"
source "arch/arm/mach-ep93xx/Kconfig"
diff --git a/arch/arm/mach-digicolor/Kconfig b/arch/arm/mach-digicolor/Kconfig
new file mode 100644
index 000000000000..4830122a9dd0
--- /dev/null
+++ b/arch/arm/mach-digicolor/Kconfig
@@ -0,0 +1,3 @@
+config ARCH_DIGICOLOR
+ bool "Conexant Digicolor SoC Support"
+ depends on ARCH_MULTI_V7
diff --git a/arch/arm/mach-digicolor/Makefile b/arch/arm/mach-digicolor/Makefile
new file mode 100644
index 000000000000..3d8a1d228408
--- /dev/null
+++ b/arch/arm/mach-digicolor/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_DIGICOLOR) += digicolor.o
diff --git a/arch/arm/mach-digicolor/digicolor.c b/arch/arm/mach-digicolor/digicolor.c
new file mode 100644
index 000000000000..cfc88d1caa47
--- /dev/null
+++ b/arch/arm/mach-digicolor/digicolor.c
@@ -0,0 +1,18 @@
+/*
+ * Support for Conexant Digicolor SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/mach/arch.h>
+
+static const char *digicolor_dt_compat[] __initconst = {
+ "cnxt,cx92755",
+ NULL,
+};
+
+DT_MACHINE_START(DIGICOLOR, "Conexant Digicolor (Flattened Device Tree)")
+ .dt_compat = digicolor_dt_compat,
+MACHINE_END
--
2.1.3
cx92755.dtsi describes CX92755 on chip peripherals. conexant_equinox.dts
describes the Equinox evaluation board for the CX92755 SoC.
Signed-off-by: Baruch Siach <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/conexant_equinox.dts | 67 +++++++++++++++++++++
arch/arm/boot/dts/cx92755.dtsi | 103 +++++++++++++++++++++++++++++++++
3 files changed, 171 insertions(+)
create mode 100644 arch/arm/boot/dts/conexant_equinox.dts
create mode 100644 arch/arm/boot/dts/cx92755.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd62857..fbeb65eaddda 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
+dtb-$(CONFIG_ARCH_DIGICOLOR) += conexant_equinox.dtb
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
exynos3250-rinato.dtb \
diff --git a/arch/arm/boot/dts/conexant_equinox.dts b/arch/arm/boot/dts/conexant_equinox.dts
new file mode 100644
index 000000000000..b2917d914740
--- /dev/null
+++ b/arch/arm/boot/dts/conexant_equinox.dts
@@ -0,0 +1,67 @@
+/*
+ * Device Tree file for the Conexant Equinox CX92755 EVK
+ *
+ * Author: Baruch Siach <[email protected]>
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "cx92755.dtsi"
+
+/ {
+ model = "Conexant Equinox CX92755 EVK";
+ compatible = "cnxt,equinox", "cnxt,cx92755";
+
+ memory@0 {
+ reg = <0 0x8000000>;
+ device_type = "memory";
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/cx92755.dtsi b/arch/arm/boot/dts/cx92755.dtsi
new file mode 100644
index 000000000000..c833eb80d2f7
--- /dev/null
+++ b/arch/arm/boot/dts/cx92755.dtsi
@@ -0,0 +1,103 @@
+/*
+ * Device Tree Include file for the Conexant Digicolor CX92755 SoC
+ *
+ * Author: Baruch Siach <[email protected]>
+ *
+ * Copyright (C) 2014 Paradox Innovation Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "cnxt,cx92755";
+
+ interrupt-parent = <&intc>;
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ };
+
+ main_clk: main_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
+ intc: intc@f0000000 {
+ compatible = "cnxt,cx92755-ic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xf0000000 0x1000>;
+ };
+
+ timer@f0000000 {
+ compatible = "cnxt,cx92755-timer";
+ reg = <0xf0000000 0x1000>;
+ interrupts = <19>, <31>, <34>, <35>, <52>, <53>, <54>, <55>;
+ clocks = <&main_clk>;
+ };
+
+ uart0: uart@f0000740 {
+ compatible = "cnxt,cx92755-usart";
+ reg = <0xf0000740 0x20>;
+ clocks = <&main_clk>;
+ interrupts = <44>;
+ status = "disabled";
+ };
+
+ uart1: uart@f0000760 {
+ compatible = "cnxt,cx92755-usart";
+ reg = <0xf0000760 0x20>;
+ clocks = <&main_clk>;
+ interrupts = <45>;
+ status = "disabled";
+ };
+
+ uart2: uart@f0000780 {
+ compatible = "cnxt,cx92755-usart";
+ reg = <0xf0000780 0x20>;
+ clocks = <&main_clk>;
+ interrupts = <46>;
+ status = "disabled";
+ };
+};
--
2.1.3
On Tuesday 23 December 2014 09:58:39 Baruch Siach wrote:
> @@ -14,5 +14,6 @@ static const char *digicolor_dt_compat[] __initconst = {
> };
>
> DT_MACHINE_START(DIGICOLOR, "Conexant Digicolor (Flattened Device Tree)")
> + .map_io = debug_ll_io_init,
> .dt_compat = digicolor_dt_compat,
> MACHINE_END
This change is not needed, the debug_ll_io_init function is used by default
if no other map_io callback is specified.
Arnd
On Tuesday 23 December 2014 09:58:42 Baruch Siach wrote:
> +static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs)
> +{
> + u32 status, hwirq;
> +
> + do {
> + status = readl(digicolor_irq_base + IC_INT0STATUS_LO);
> + if (status) {
> + hwirq = ffs(status) - 1;
> + } else {
> + status = readl(digicolor_irq_base + IC_INT0STATUS_XLO);
> + if (status)
> + hwirq = ffs(status) - 1 + 32;
> + else
> + return;
> + }
> +
> + handle_domain_irq(digicolor_irq_domain, hwirq, regs);
> + } while (1);
> +}
>
Have you tried using the generic_irqchip code for this? The hardware
seems simple enough.
Arnd
On Tuesday 23 December 2014 09:58:37 Baruch Siach wrote:
> This series adds initial support for the Conexant CX92755 SoC. The CX92755 is
> one of the Digicolor series of SoCs, all sharing many of the same peripherals.
> The code was tested on the CX92755 evaluation kit, AKA Equinox.
>
> Uses attempting to try this code will most likely also want the UART/console
> driver available from https://patchwork.kernel.org/patch/5515861/.
>
Looks very nice overall!
I have replied to two of the patches, the rest looks fine to me.
Arnd
Hi Arnd,
On Tue, Dec 23, 2014 at 10:00:17PM +0100, Arnd Bergmann wrote:
> On Tuesday 23 December 2014 09:58:39 Baruch Siach wrote:
> > @@ -14,5 +14,6 @@ static const char *digicolor_dt_compat[] __initconst = {
> > };
> >
> > DT_MACHINE_START(DIGICOLOR, "Conexant Digicolor (Flattened Device Tree)")
> > + .map_io = debug_ll_io_init,
> > .dt_compat = digicolor_dt_compat,
> > MACHINE_END
>
> This change is not needed, the debug_ll_io_init function is used by default
> if no other map_io callback is specified.
OK. I'll remove it for next version.
Thanks,
baruch
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -
Hi Arnd,
On Tue, Dec 23, 2014 at 10:02:18PM +0100, Arnd Bergmann wrote:
> On Tuesday 23 December 2014 09:58:42 Baruch Siach wrote:
> > +static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs)
> > +{
> > + u32 status, hwirq;
> > +
> > + do {
> > + status = readl(digicolor_irq_base + IC_INT0STATUS_LO);
> > + if (status) {
> > + hwirq = ffs(status) - 1;
> > + } else {
> > + status = readl(digicolor_irq_base + IC_INT0STATUS_XLO);
> > + if (status)
> > + hwirq = ffs(status) - 1 + 32;
> > + else
> > + return;
> > + }
> > +
> > + handle_domain_irq(digicolor_irq_domain, hwirq, regs);
> > + } while (1);
> > +}
> >
>
> Have you tried using the generic_irqchip code for this? The hardware
> seems simple enough.
Thanks for the tip. I'll look into converting to GENERIC_IRQ_CHIP for next
version.
baruch
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -