This patch series contains patches to disable PTM for endpoint mode
as the PCIe compliance tool requires the PTM be disabled for the endpoint
mode.
V2:
* Addressed review comments from Jingoo Han
Vidya Sagar (2):
PCI: Add PCI_PTM_CAP_RES macro
PCI: designware-ep: Disable PTM capabilities for EP mode
.../pci/controller/dwc/pcie-designware-ep.c | 18 ++++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
2 files changed, 19 insertions(+)
--
2.17.1
Add macro defining Responder capable bit in Precision Time Measurement
capability register.
Signed-off-by: Vidya Sagar <[email protected]>
Reviewed-by: Jingoo Han <[email protected]>
---
V2:
* Added "Reviewed-by: Jingoo Han <[email protected]>"
include/uapi/linux/pci_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 57b8e2ffb1dd..1c3591c8e09e 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -1058,6 +1058,7 @@
/* Precision Time Measurement */
#define PCI_PTM_CAP 0x04 /* PTM Capability */
#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */
+#define PCI_PTM_CAP_RES 0x00000002 /* Responder capable */
#define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */
#define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */
#define PCI_PTM_CTRL 0x08 /* PTM Control */
--
2.17.1
On Mon, Sep 26, 2022 at 04:40:16PM +0530, Vidya Sagar wrote:
> Add macro defining Responder capable bit in Precision Time Measurement
> capability register.
>
> Signed-off-by: Vidya Sagar <[email protected]>
> Reviewed-by: Jingoo Han <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
> ---
> V2:
> * Added "Reviewed-by: Jingoo Han <[email protected]>"
>
> include/uapi/linux/pci_regs.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 57b8e2ffb1dd..1c3591c8e09e 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -1058,6 +1058,7 @@
> /* Precision Time Measurement */
> #define PCI_PTM_CAP 0x04 /* PTM Capability */
> #define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */
> +#define PCI_PTM_CAP_RES 0x00000002 /* Responder capable */
> #define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */
> #define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */
> #define PCI_PTM_CTRL 0x08 /* PTM Control */
> --
> 2.17.1
>
Hi Lorenzo,
Do you have any further comments on this series?
Thanks,
Vidya Sagar
On 9/26/2022 4:40 PM, Vidya Sagar wrote:
> This patch series contains patches to disable PTM for endpoint mode
> as the PCIe compliance tool requires the PTM be disabled for the endpoint
> mode.
>
> V2:
> * Addressed review comments from Jingoo Han
>
> Vidya Sagar (2):
> PCI: Add PCI_PTM_CAP_RES macro
> PCI: designware-ep: Disable PTM capabilities for EP mode
>
> .../pci/controller/dwc/pcie-designware-ep.c | 18 ++++++++++++++++++
> include/uapi/linux/pci_regs.h | 1 +
> 2 files changed, 19 insertions(+)
>